From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Song Gao" <gaosong@loongson.cn>,
"Bibo Mao" <maobibo@loongson.cn>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PULL 22/28] target/loongarch: Fill in TCGCPUOps.pointer_wrap
Date: Wed, 28 May 2025 09:14:04 +0100 [thread overview]
Message-ID: <20250528081410.157251-23-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250528081410.157251-1-richard.henderson@linaro.org>
Check va32 state.
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/cpu.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index f7535d1be7..abad84c054 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -334,6 +334,12 @@ static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
}
return false;
}
+
+static vaddr loongarch_pointer_wrap(CPUState *cs, int mmu_idx,
+ vaddr result, vaddr base)
+{
+ return is_va32(cpu_env(cs)) ? (uint32_t)result : result;
+}
#endif
static TCGTBCPUState loongarch_get_tb_cpu_state(CPUState *cs)
@@ -889,6 +895,7 @@ static const TCGCPUOps loongarch_tcg_ops = {
#ifndef CONFIG_USER_ONLY
.tlb_fill = loongarch_cpu_tlb_fill,
+ .pointer_wrap = loongarch_pointer_wrap,
.cpu_exec_interrupt = loongarch_cpu_exec_interrupt,
.cpu_exec_halt = loongarch_cpu_has_work,
.cpu_exec_reset = cpu_reset,
--
2.43.0
next prev parent reply other threads:[~2025-05-28 8:22 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-28 8:13 [PULL 00/28] tcg patch queue Richard Henderson
2025-05-28 8:13 ` [PULL 01/28] accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW Richard Henderson
2025-05-28 8:13 ` [PULL 02/28] system/main: comment lock rationale Richard Henderson
2025-05-28 8:13 ` [PULL 03/28] linux-user: implement pgid field of /proc/self/stat Richard Henderson
2025-05-28 8:13 ` [PULL 04/28] target/microblaze: Split out mb_unaligned_access_internal Richard Henderson
2025-05-28 8:13 ` [PULL 05/28] target/microblaze: Introduce helper_unaligned_access Richard Henderson
2025-05-28 8:13 ` [PULL 06/28] target/microblaze: Split out mb_transaction_failed_internal Richard Henderson
2025-05-28 8:13 ` [PULL 07/28] target/microblaze: Implement extended address load/store out of line Richard Henderson
2025-05-28 8:13 ` [PULL 08/28] target/microblaze: Use uint64_t for CPUMBState.ear Richard Henderson
2025-05-28 8:13 ` [PULL 09/28] target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea Richard Henderson
2025-05-28 8:13 ` [PULL 10/28] target/microblaze: Fix printf format in mmu_translate Richard Henderson
2025-05-28 8:13 ` [PULL 11/28] target/microblaze: Use TARGET_LONG_BITS == 32 for system mode Richard Henderson
2025-05-28 8:13 ` [PULL 12/28] target/microblaze: Drop DisasContext.r0 Richard Henderson
2025-05-28 8:13 ` [PULL 13/28] target/microblaze: Simplify compute_ldst_addr_type{a,b} Richard Henderson
2025-05-28 8:13 ` [PULL 14/28] tcg: Drop TCGContext.tlb_dyn_max_bits Richard Henderson
2025-05-28 8:13 ` [PULL 15/28] tcg: Drop TCGContext.page_{mask,bits} Richard Henderson
2025-05-28 8:13 ` [PULL 16/28] target/sh4: Use MO_ALIGN for system UNALIGN() Richard Henderson
2025-05-28 8:13 ` [PULL 17/28] accel/tcg: Add TCGCPUOps.pointer_wrap Richard Henderson
2025-05-28 8:14 ` [PULL 18/28] target: Use cpu_pointer_wrap_notreached for strict align targets Richard Henderson
2025-08-29 6:55 ` Michael Tokarev
2025-08-30 3:11 ` Richard Henderson
2025-05-28 8:14 ` [PULL 19/28] target: Use cpu_pointer_wrap_uint32 for 32-bit targets Richard Henderson
2025-05-28 8:14 ` [PULL 20/28] target/arm: Fill in TCGCPUOps.pointer_wrap Richard Henderson
2025-05-28 8:14 ` [PULL 21/28] target/i386: " Richard Henderson
2025-05-28 8:14 ` Richard Henderson [this message]
2025-05-28 8:14 ` [PULL 23/28] target/mips: " Richard Henderson
2025-05-28 8:14 ` [PULL 24/28] target/ppc: " Richard Henderson
2025-05-28 8:14 ` [PULL 25/28] target/riscv: " Richard Henderson
2025-05-28 8:14 ` [PULL 26/28] target/s390x: " Richard Henderson
2025-05-28 8:14 ` [PULL 27/28] target/sparc: " Richard Henderson
2025-05-28 8:14 ` [PULL 28/28] accel/tcg: Assert TCGCPUOps.pointer_wrap is set Richard Henderson
2025-05-29 12:35 ` [PULL 00/28] tcg patch queue Stefan Hajnoczi
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