From: Ben Dooks <ben.dooks@codethink.co.uk>
To: nazar.kazakov@codethink.co.uk, joseph.baker@codethink.co.uk,
fran.redondo@codethink.co.uk, lawrence.hunter@codethink.co.uk,
liwei1518@gmail.com, dbarboza@ventanamicro.com,
zhiwei_liu@linux.alibaba.com, alistair.francis@wdc.com,
qemu-riscv@nongnu.org
Cc: ben.dooks@codethink.co.uk, qemu-devel@nongnu.org
Subject: [PATCH v3 3/3] hw/riscv: set cva6 to use TYPE_RISCV_CPU_CVA6
Date: Mon, 9 Jun 2025 14:17:31 +0100 [thread overview]
Message-ID: <20250609131731.1464616-4-ben.dooks@codethink.co.uk> (raw)
In-Reply-To: <20250609131731.1464616-1-ben.dooks@codethink.co.uk>
Change to using TYPE_RISCV_CPU_CVA6 once this is merged.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
---
hw/riscv/cva6.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/riscv/cva6.c b/hw/riscv/cva6.c
index 3adfa8b5cc..e6fd0ebafc 100644
--- a/hw/riscv/cva6.c
+++ b/hw/riscv/cva6.c
@@ -83,8 +83,7 @@ static void cva6_machine_class_init(ObjectClass *oc, const void *data)
mc->init = cva6_machine_init;
mc->max_cpus = 1;
mc->default_ram_id = "cva6.ram";
- /* start with "max" cpu type until we sort out CVA6 type */
- mc->default_cpu_type = TYPE_RISCV_CPU_MAX;
+ mc->default_cpu_type = TYPE_RISCV_CPU_CVA6;
mc->default_ram_size = cva6_memmap[CVA6_DRAM].size;
};
--
2.37.2.352.g3c44437643
next prev parent reply other threads:[~2025-06-09 13:18 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-09 13:17 RISC-V: Add CVA6 machine Ben Dooks
2025-06-09 13:17 ` [PATCH v3 1/3] hw/riscv: add " Ben Dooks
2025-06-09 23:29 ` Alistair Francis
2025-06-09 13:17 ` [PATCH v3 2/3] target/riscv: add cva6 core type Ben Dooks
2025-06-09 23:30 ` Alistair Francis
2025-06-09 13:17 ` Ben Dooks [this message]
2025-06-09 23:30 ` [PATCH v3 3/3] hw/riscv: set cva6 to use TYPE_RISCV_CPU_CVA6 Alistair Francis
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