* [PATCH v3 01/29] hw/i386/acpi-build: Make aml_pci_device_dsm() static
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-16 9:46 ` [PATCH v3 02/29] hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support property Eric Auger
` (27 subsequent siblings)
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
No need to export aml_pci_device_dsm() as it is only used
in hw/i386/acpi-build.c.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
include/hw/acpi/pci.h | 1 -
hw/i386/acpi-build.c | 2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index 6359d574fd..ab0187a894 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -36,7 +36,6 @@ typedef struct AcpiMcfgInfo {
void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
const char *oem_id, const char *oem_table_id);
-Aml *aml_pci_device_dsm(void);
void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 61851cc840..f59026524f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -338,7 +338,7 @@ build_facs(GArray *table_data)
g_array_append_vals(table_data, reserved, 40); /* Reserved */
}
-Aml *aml_pci_device_dsm(void)
+static Aml *aml_pci_device_dsm(void)
{
Aml *method;
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* [PATCH v3 02/29] hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support property
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
2025-06-16 9:46 ` [PATCH v3 01/29] hw/i386/acpi-build: Make aml_pci_device_dsm() static Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:53 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 03/29] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Eric Auger
` (26 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
A new boolean property is introduced. This will be used to turn
ACPI PCI hotplug support. By default it is unset.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
include/hw/acpi/generic_event_device.h | 2 ++
hw/acpi/generic_event_device.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
index d2dac87b4a..f5ffa67a39 100644
--- a/include/hw/acpi/generic_event_device.h
+++ b/include/hw/acpi/generic_event_device.h
@@ -63,6 +63,7 @@
#include "hw/acpi/memory_hotplug.h"
#include "hw/acpi/ghes.h"
#include "hw/acpi/cpu.h"
+#include "hw/acpi/pcihp.h"
#include "qom/object.h"
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -114,6 +115,7 @@ struct AcpiGedState {
MemoryRegion container_memhp;
CPUHotplugState cpuhp_state;
MemoryRegion container_cpuhp;
+ AcpiPciHpState pcihp_state;
GEDState ged_state;
uint32_t ged_event_bitmap;
qemu_irq irq;
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index 7a62f8d5bc..7831db412b 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -318,6 +318,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
static const Property acpi_ged_properties[] = {
DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
+ DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, AcpiGedState,
+ pcihp_state.use_acpi_hotplug_bridge, 0),
};
static const VMStateDescription vmstate_memhp_state = {
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 02/29] hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support property
2025-06-16 9:46 ` [PATCH v3 02/29] hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support property Eric Auger
@ 2025-06-20 8:53 ` Jonathan Cameron via
2025-06-20 11:09 ` Igor Mammedov
0 siblings, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:53 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:31 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> A new boolean property is introduced. This will be used to turn
> ACPI PCI hotplug support. By default it is unset.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
I wonder a bit if it makes sense to do this so early rather than just
before it is first used in the series? Doesn't really matter though.
Just meant I read on a bit before giving an RB on this.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> include/hw/acpi/generic_event_device.h | 2 ++
> hw/acpi/generic_event_device.c | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
> index d2dac87b4a..f5ffa67a39 100644
> --- a/include/hw/acpi/generic_event_device.h
> +++ b/include/hw/acpi/generic_event_device.h
> @@ -63,6 +63,7 @@
> #include "hw/acpi/memory_hotplug.h"
> #include "hw/acpi/ghes.h"
> #include "hw/acpi/cpu.h"
> +#include "hw/acpi/pcihp.h"
> #include "qom/object.h"
>
> #define ACPI_POWER_BUTTON_DEVICE "PWRB"
> @@ -114,6 +115,7 @@ struct AcpiGedState {
> MemoryRegion container_memhp;
> CPUHotplugState cpuhp_state;
> MemoryRegion container_cpuhp;
> + AcpiPciHpState pcihp_state;
> GEDState ged_state;
> uint32_t ged_event_bitmap;
> qemu_irq irq;
> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
> index 7a62f8d5bc..7831db412b 100644
> --- a/hw/acpi/generic_event_device.c
> +++ b/hw/acpi/generic_event_device.c
> @@ -318,6 +318,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
>
> static const Property acpi_ged_properties[] = {
> DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
> + DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, AcpiGedState,
> + pcihp_state.use_acpi_hotplug_bridge, 0),
> };
>
> static const VMStateDescription vmstate_memhp_state = {
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 02/29] hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support property
2025-06-20 8:53 ` Jonathan Cameron via
@ 2025-06-20 11:09 ` Igor Mammedov
2025-06-20 11:27 ` Eric Auger
0 siblings, 1 reply; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 11:09 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 20 Jun 2025 09:53:08 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 16 Jun 2025 11:46:31 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > A new boolean property is introduced. This will be used to turn
> > ACPI PCI hotplug support. By default it is unset.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> I wonder a bit if it makes sense to do this so early rather than just
> before it is first used in the series? Doesn't really matter though.
> Just meant I read on a bit before giving an RB on this.
Just before would be better, but it doesn't really matter.
I guess Eric can rearrange that if there would be need to respin.
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> > ---
> > include/hw/acpi/generic_event_device.h | 2 ++
> > hw/acpi/generic_event_device.c | 2 ++
> > 2 files changed, 4 insertions(+)
> >
> > diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
> > index d2dac87b4a..f5ffa67a39 100644
> > --- a/include/hw/acpi/generic_event_device.h
> > +++ b/include/hw/acpi/generic_event_device.h
> > @@ -63,6 +63,7 @@
> > #include "hw/acpi/memory_hotplug.h"
> > #include "hw/acpi/ghes.h"
> > #include "hw/acpi/cpu.h"
> > +#include "hw/acpi/pcihp.h"
> > #include "qom/object.h"
> >
> > #define ACPI_POWER_BUTTON_DEVICE "PWRB"
> > @@ -114,6 +115,7 @@ struct AcpiGedState {
> > MemoryRegion container_memhp;
> > CPUHotplugState cpuhp_state;
> > MemoryRegion container_cpuhp;
> > + AcpiPciHpState pcihp_state;
> > GEDState ged_state;
> > uint32_t ged_event_bitmap;
> > qemu_irq irq;
> > diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
> > index 7a62f8d5bc..7831db412b 100644
> > --- a/hw/acpi/generic_event_device.c
> > +++ b/hw/acpi/generic_event_device.c
> > @@ -318,6 +318,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
> >
> > static const Property acpi_ged_properties[] = {
> > DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
> > + DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, AcpiGedState,
> > + pcihp_state.use_acpi_hotplug_bridge, 0),
> > };
> >
> > static const VMStateDescription vmstate_memhp_state = {
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 02/29] hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support property
2025-06-20 11:09 ` Igor Mammedov
@ 2025-06-20 11:27 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-20 11:27 UTC (permalink / raw)
To: Igor Mammedov, Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan, Igor,
On 6/20/25 1:09 PM, Igor Mammedov wrote:
> On Fri, 20 Jun 2025 09:53:08 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
>> On Mon, 16 Jun 2025 11:46:31 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> A new boolean property is introduced. This will be used to turn
>>> ACPI PCI hotplug support. By default it is unset.
>>>
>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> I wonder a bit if it makes sense to do this so early rather than just
>> before it is first used in the series? Doesn't really matter though.
>> Just meant I read on a bit before giving an RB on this.
> Just before would be better, but it doesn't really matter.
> I guess Eric can rearrange that if there would be need to respin.
Yes I can definitively rearrange the order.
Thank you for the review
Eric
>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
>> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>>
>>> ---
>>> include/hw/acpi/generic_event_device.h | 2 ++
>>> hw/acpi/generic_event_device.c | 2 ++
>>> 2 files changed, 4 insertions(+)
>>>
>>> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
>>> index d2dac87b4a..f5ffa67a39 100644
>>> --- a/include/hw/acpi/generic_event_device.h
>>> +++ b/include/hw/acpi/generic_event_device.h
>>> @@ -63,6 +63,7 @@
>>> #include "hw/acpi/memory_hotplug.h"
>>> #include "hw/acpi/ghes.h"
>>> #include "hw/acpi/cpu.h"
>>> +#include "hw/acpi/pcihp.h"
>>> #include "qom/object.h"
>>>
>>> #define ACPI_POWER_BUTTON_DEVICE "PWRB"
>>> @@ -114,6 +115,7 @@ struct AcpiGedState {
>>> MemoryRegion container_memhp;
>>> CPUHotplugState cpuhp_state;
>>> MemoryRegion container_cpuhp;
>>> + AcpiPciHpState pcihp_state;
>>> GEDState ged_state;
>>> uint32_t ged_event_bitmap;
>>> qemu_irq irq;
>>> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
>>> index 7a62f8d5bc..7831db412b 100644
>>> --- a/hw/acpi/generic_event_device.c
>>> +++ b/hw/acpi/generic_event_device.c
>>> @@ -318,6 +318,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
>>>
>>> static const Property acpi_ged_properties[] = {
>>> DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
>>> + DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, AcpiGedState,
>>> + pcihp_state.use_acpi_hotplug_bridge, 0),
>>> };
>>>
>>> static const VMStateDescription vmstate_memhp_state = {
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 03/29] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
2025-06-16 9:46 ` [PATCH v3 01/29] hw/i386/acpi-build: Make aml_pci_device_dsm() static Eric Auger
2025-06-16 9:46 ` [PATCH v3 02/29] hw/acpi/ged: Add a acpi-pci-hotplug-with-bridge-support property Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-16 9:46 ` [PATCH v3 04/29] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Eric Auger
` (25 subsequent siblings)
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
We plan to reuse build_x86_acpi_pci_hotplug() implementation
for ARM so let's move the code to generic pcihp.
Associated static aml_pci_pdsm() helper is also moved along.
build_x86_acpi_pci_hotplug is renamed into build_acpi_pci_hotplug().
No code change intended.
Also fix the reference to acpi_pci_hotplug.rst documentation
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
v1 -> v2:
- s/spec/specs in reference to rst (Gustavo)
- fixed double space in commit msg (Gustavo)
rfc -> v1:
- make build_append_pci_dsm_func0_common non static and move it to
pcihp
---
hw/i386/acpi-build.h | 4 -
include/hw/acpi/pcihp.h | 9 +-
hw/acpi/pcihp.c | 174 ++++++++++++++++++++++++++++++++++++++-
hw/i386/acpi-build.c | 176 +---------------------------------------
4 files changed, 183 insertions(+), 180 deletions(-)
diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 275ec058a1..8ba3c33e48 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -5,10 +5,6 @@
extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
-/* PCI Hot-plug registers' base. See docs/specs/acpi_pci_hotplug.rst */
-#define ACPI_PCIHP_SEJ_BASE 0x8
-#define ACPI_PCIHP_BNMR_BASE 0x10
-
void acpi_setup(void);
Object *acpi_get_i386_pci_host(void);
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index a97904bada..971451e8ea 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -3,7 +3,7 @@
*
* QEMU supports PCI hotplug via ACPI. This module
* implements the interface between QEMU and the ACPI BIOS.
- * Interface specification - see docs/specs/acpi_pci_hotplug.txt
+ * Interface specification - see docs/specs/acpi_pci_hotplug.rst
*
* Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
* Copyright (c) 2006 Fabrice Bellard
@@ -33,6 +33,10 @@
#define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base"
#define ACPI_PCIHP_IO_LEN_PROP "acpi-pcihp-io-len"
+/* PCI Hot-plug registers bases. See docs/specs/acpi_pci_hotplug.rst */
+#define ACPI_PCIHP_SEJ_BASE 0x8
+#define ACPI_PCIHP_BNMR_BASE 0x10
+
typedef struct AcpiPciHpPciStatus {
uint32_t up;
uint32_t down;
@@ -69,6 +73,9 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
AcpiPciHpState *s, DeviceState *dev,
Error **errp);
+void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
+void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
+
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index aac90013d4..e0260f67e6 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -26,7 +26,7 @@
#include "qemu/osdep.h"
#include "hw/acpi/pcihp.h"
-
+#include "hw/acpi/aml-build.h"
#include "hw/pci-host/i440fx.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
@@ -513,6 +513,178 @@ void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus,
OBJ_PROP_FLAG_READ);
}
+void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
+{
+ Aml *UUID, *ifctx1;
+ uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
+
+ aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6. _DSM Definitions for PCI
+ */
+ UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
+ ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
+ {
+ /* call is for unsupported UUID, bail out */
+ aml_append(ifctx1, aml_return(retvar));
+ }
+ aml_append(ctx, ifctx1);
+
+ ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
+ {
+ /* call is for unsupported REV, bail out */
+ aml_append(ifctx1, aml_return(retvar));
+ }
+ aml_append(ctx, ifctx1);
+}
+
+static Aml *aml_pci_pdsm(void)
+{
+ Aml *method, *ifctx, *ifctx1;
+ Aml *ret = aml_local(0);
+ Aml *caps = aml_local(1);
+ Aml *acpi_index = aml_local(2);
+ Aml *zero = aml_int(0);
+ Aml *one = aml_int(1);
+ Aml *not_supp = aml_int(0xFFFFFFFF);
+ Aml *func = aml_arg(2);
+ Aml *params = aml_arg(4);
+ Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
+ Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
+
+ method = aml_method("PDSM", 5, AML_SERIALIZED);
+
+ /* get supported functions */
+ ifctx = aml_if(aml_equal(func, zero));
+ {
+ build_append_pci_dsm_func0_common(ifctx, ret);
+
+ aml_append(ifctx, aml_store(zero, caps));
+ aml_append(ifctx,
+ aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
+ /*
+ * advertise function 7 if device has acpi-index
+ * acpi_index values:
+ * 0: not present (default value)
+ * FFFFFFFF: not supported (old QEMU without PIDX reg)
+ * other: device's acpi-index
+ */
+ ifctx1 = aml_if(aml_lnot(
+ aml_or(aml_equal(acpi_index, zero),
+ aml_equal(acpi_index, not_supp), NULL)
+ ));
+ {
+ /* have supported functions */
+ aml_append(ifctx1, aml_or(caps, one, caps));
+ /* support for function 7 */
+ aml_append(ifctx1,
+ aml_or(caps, aml_shiftleft(one, aml_int(7)), caps));
+ }
+ aml_append(ifctx, ifctx1);
+
+ aml_append(ifctx, aml_store(caps, aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ /* handle specific functions requests */
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
+ * Operating Systems
+ */
+ ifctx = aml_if(aml_equal(func, aml_int(7)));
+ {
+ Aml *pkg = aml_package(2);
+
+ aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
+ aml_append(ifctx, aml_store(pkg, ret));
+ /*
+ * Windows calls func=7 without checking if it's available,
+ * as workaround Microsoft has suggested to return invalid for func7
+ * Package, so return 2 elements package but only initialize elements
+ * when acpi_index is supported and leave them uninitialized, which
+ * leads elements to being Uninitialized ObjectType and should trip
+ * Windows into discarding result as an unexpected and prevent setting
+ * bogus 'PCI Label' on the device.
+ */
+ ifctx1 = aml_if(aml_lnot(aml_lor(
+ aml_equal(acpi_index, zero), aml_equal(acpi_index, not_supp)
+ )));
+ {
+ aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero)));
+ /*
+ * optional, if not impl. should return null string
+ */
+ aml_append(ifctx1, aml_store(aml_string("%s", ""),
+ aml_index(ret, one)));
+ }
+ aml_append(ifctx, ifctx1);
+
+ aml_append(ifctx, aml_return(ret));
+ }
+
+ aml_append(method, ifctx);
+ return method;
+}
+
+void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
+{
+ Aml *scope;
+ Aml *field;
+ Aml *method;
+
+ scope = aml_scope("_SB.PCI0");
+
+ aml_append(scope,
+ aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
+ field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
+ aml_append(field, aml_named_field("PCIU", 32));
+ aml_append(field, aml_named_field("PCID", 32));
+ aml_append(scope, field);
+
+ aml_append(scope,
+ aml_operation_region("SEJ", AML_SYSTEM_IO,
+ aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
+ field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
+ aml_append(field, aml_named_field("B0EJ", 32));
+ aml_append(scope, field);
+
+ aml_append(scope,
+ aml_operation_region("BNMR", AML_SYSTEM_IO,
+ aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
+ field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
+ aml_append(field, aml_named_field("BNUM", 32));
+ aml_append(field, aml_named_field("PIDX", 32));
+ aml_append(scope, field);
+
+ aml_append(scope, aml_mutex("BLCK", 0));
+
+ method = aml_method("PCEJ", 2, AML_NOTSERIALIZED);
+ aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
+ aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
+ aml_append(method,
+ aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ")));
+ aml_append(method, aml_release(aml_name("BLCK")));
+ aml_append(method, aml_return(aml_int(0)));
+ aml_append(scope, method);
+
+ method = aml_method("AIDX", 2, AML_NOTSERIALIZED);
+ aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
+ aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
+ aml_append(method,
+ aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX")));
+ aml_append(method, aml_store(aml_name("PIDX"), aml_local(0)));
+ aml_append(method, aml_release(aml_name("BLCK")));
+ aml_append(method, aml_return(aml_local(0)));
+ aml_append(scope, method);
+
+ aml_append(scope, aml_pci_pdsm());
+
+ aml_append(table, scope);
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f59026524f..4f8572eebe 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -361,32 +361,6 @@ static Aml *aml_pci_device_dsm(void)
return method;
}
-static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar)
-{
- Aml *UUID, *ifctx1;
- uint8_t byte_list[1] = { 0 }; /* nothing supported yet */
-
- aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar));
- /*
- * PCI Firmware Specification 3.1
- * 4.6. _DSM Definitions for PCI
- */
- UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D");
- ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID)));
- {
- /* call is for unsupported UUID, bail out */
- aml_append(ifctx1, aml_return(retvar));
- }
- aml_append(ctx, ifctx1);
-
- ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2)));
- {
- /* call is for unsupported REV, bail out */
- aml_append(ifctx1, aml_return(retvar));
- }
- aml_append(ctx, ifctx1);
-}
-
static Aml *aml_pci_edsm(void)
{
Aml *method, *ifctx;
@@ -647,96 +621,6 @@ static bool build_append_notification_callback(Aml *parent_scope,
return !!nr_notifiers;
}
-static Aml *aml_pci_pdsm(void)
-{
- Aml *method, *ifctx, *ifctx1;
- Aml *ret = aml_local(0);
- Aml *caps = aml_local(1);
- Aml *acpi_index = aml_local(2);
- Aml *zero = aml_int(0);
- Aml *one = aml_int(1);
- Aml *not_supp = aml_int(0xFFFFFFFF);
- Aml *func = aml_arg(2);
- Aml *params = aml_arg(4);
- Aml *bnum = aml_derefof(aml_index(params, aml_int(0)));
- Aml *sunum = aml_derefof(aml_index(params, aml_int(1)));
-
- method = aml_method("PDSM", 5, AML_SERIALIZED);
-
- /* get supported functions */
- ifctx = aml_if(aml_equal(func, zero));
- {
- build_append_pci_dsm_func0_common(ifctx, ret);
-
- aml_append(ifctx, aml_store(zero, caps));
- aml_append(ifctx,
- aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
- /*
- * advertise function 7 if device has acpi-index
- * acpi_index values:
- * 0: not present (default value)
- * FFFFFFFF: not supported (old QEMU without PIDX reg)
- * other: device's acpi-index
- */
- ifctx1 = aml_if(aml_lnot(
- aml_or(aml_equal(acpi_index, zero),
- aml_equal(acpi_index, not_supp), NULL)
- ));
- {
- /* have supported functions */
- aml_append(ifctx1, aml_or(caps, one, caps));
- /* support for function 7 */
- aml_append(ifctx1,
- aml_or(caps, aml_shiftleft(one, aml_int(7)), caps));
- }
- aml_append(ifctx, ifctx1);
-
- aml_append(ifctx, aml_store(caps, aml_index(ret, zero)));
- aml_append(ifctx, aml_return(ret));
- }
- aml_append(method, ifctx);
-
- /* handle specific functions requests */
- /*
- * PCI Firmware Specification 3.1
- * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
- * Operating Systems
- */
- ifctx = aml_if(aml_equal(func, aml_int(7)));
- {
- Aml *pkg = aml_package(2);
-
- aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index));
- aml_append(ifctx, aml_store(pkg, ret));
- /*
- * Windows calls func=7 without checking if it's available,
- * as workaround Microsoft has suggested to return invalid for func7
- * Package, so return 2 elements package but only initialize elements
- * when acpi_index is supported and leave them uninitialized, which
- * leads elements to being Uninitialized ObjectType and should trip
- * Windows into discarding result as an unexpected and prevent setting
- * bogus 'PCI Label' on the device.
- */
- ifctx1 = aml_if(aml_lnot(aml_lor(
- aml_equal(acpi_index, zero), aml_equal(acpi_index, not_supp)
- )));
- {
- aml_append(ifctx1, aml_store(acpi_index, aml_index(ret, zero)));
- /*
- * optional, if not impl. should return null string
- */
- aml_append(ifctx1, aml_store(aml_string("%s", ""),
- aml_index(ret, one)));
- }
- aml_append(ifctx, ifctx1);
-
- aml_append(ifctx, aml_return(ret));
- }
-
- aml_append(method, ifctx);
- return method;
-}
-
/*
* build_prt - Define interrupt routing rules
*
@@ -1227,62 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
return dev;
}
-static void build_x86_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
-{
- Aml *scope;
- Aml *field;
- Aml *method;
-
- scope = aml_scope("_SB.PCI0");
-
- aml_append(scope,
- aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
- field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
- aml_append(field, aml_named_field("PCIU", 32));
- aml_append(field, aml_named_field("PCID", 32));
- aml_append(scope, field);
-
- aml_append(scope,
- aml_operation_region("SEJ", AML_SYSTEM_IO,
- aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
- field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
- aml_append(field, aml_named_field("B0EJ", 32));
- aml_append(scope, field);
-
- aml_append(scope,
- aml_operation_region("BNMR", AML_SYSTEM_IO,
- aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
- field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
- aml_append(field, aml_named_field("BNUM", 32));
- aml_append(field, aml_named_field("PIDX", 32));
- aml_append(scope, field);
-
- aml_append(scope, aml_mutex("BLCK", 0));
-
- method = aml_method("PCEJ", 2, AML_NOTSERIALIZED);
- aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
- aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
- aml_append(method,
- aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("B0EJ")));
- aml_append(method, aml_release(aml_name("BLCK")));
- aml_append(method, aml_return(aml_int(0)));
- aml_append(scope, method);
-
- method = aml_method("AIDX", 2, AML_NOTSERIALIZED);
- aml_append(method, aml_acquire(aml_name("BLCK"), 0xFFFF));
- aml_append(method, aml_store(aml_arg(0), aml_name("BNUM")));
- aml_append(method,
- aml_store(aml_shiftleft(aml_int(1), aml_arg(1)), aml_name("PIDX")));
- aml_append(method, aml_store(aml_name("PIDX"), aml_local(0)));
- aml_append(method, aml_release(aml_name("BLCK")));
- aml_append(method, aml_return(aml_local(0)));
- aml_append(scope, method);
-
- aml_append(scope, aml_pci_pdsm());
-
- aml_append(table, scope);
-}
-
static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
{
Aml *if_ctx;
@@ -1394,7 +1222,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
- build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
}
build_piix4_pci0_int(dsdt);
} else if (q35) {
@@ -1438,7 +1266,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en) {
- build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
}
build_q35_pci0_int(dsdt);
}
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* [PATCH v3 04/29] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (2 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 03/29] hw/acpi: Rename and move build_x86_acpi_pci_hotplug to pcihp Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:45 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Eric Auger
` (24 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
native pci hotplug.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
rfc -> v1:
- updated the "Allow OS control for all 5 features" comment
---
hw/pci-host/gpex-acpi.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 0aba47c71c..f34b7cf25e 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
}
}
-static void acpi_dsdt_add_pci_osc(Aml *dev)
+static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
{
Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
@@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
/*
- * Allow OS control for all 5 features:
- * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
+ * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
+ * and PCIeHotplug depending on enable_native_pcie_hotplug
*/
- aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
- aml_name("CTRL")));
+ aml_append(ifctx, aml_and(aml_name("CTRL"),
+ aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
+ aml_name("CTRL")));
ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
@@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
if (is_cxl) {
build_cxl_osc_method(dev);
} else {
- acpi_dsdt_add_pci_osc(dev);
+ acpi_dsdt_add_pci_osc(dev, true);
}
aml_append(scope, dev);
@@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
- acpi_dsdt_add_pci_osc(dev);
+ acpi_dsdt_add_pci_osc(dev, true);
Aml *dev_res0 = aml_device("%s", "RES0");
aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 04/29] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc
2025-06-16 9:46 ` [PATCH v3 04/29] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Eric Auger
@ 2025-06-20 8:45 ` Jonathan Cameron via
0 siblings, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:45 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:33 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add a new argument to acpi_dsdt_add_pci_osc to be able to disable
> native pci hotplug.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
After discussion on earlier version I'm now fine with this.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> ---
>
> rfc -> v1:
> - updated the "Allow OS control for all 5 features" comment
> ---
> hw/pci-host/gpex-acpi.c | 15 ++++++++-------
> 1 file changed, 8 insertions(+), 7 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 0aba47c71c..f34b7cf25e 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,7 +50,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev)
> +static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> {
> Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
>
> @@ -77,11 +77,12 @@ static void acpi_dsdt_add_pci_osc(Aml *dev)
> aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
>
> /*
> - * Allow OS control for all 5 features:
> - * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
> + * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> + * and PCIeHotplug depending on enable_native_pcie_hotplug
> */
> - aml_append(ifctx, aml_and(aml_name("CTRL"), aml_int(0x1F),
> - aml_name("CTRL")));
> + aml_append(ifctx, aml_and(aml_name("CTRL"),
> + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> + aml_name("CTRL")));
>
> ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> @@ -192,7 +193,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
> }
>
> aml_append(scope, dev);
> @@ -267,7 +268,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev);
> + acpi_dsdt_add_pci_osc(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (3 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 04/29] hw/pci-host/gpex-acpi: Add native_pci_hotplug arg to acpi_dsdt_add_pci_osc Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:49 ` Jonathan Cameron via
2025-06-20 11:11 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 06/29] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
` (23 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
From: Gustavo Romero <gustavo.romero@linaro.org>
This commit adds DSDT blobs to the whilelist in the prospect to
allow changes in the GPEX _OSC method.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- fox for microvm
---
tests/qtest/bios-tables-test-allowed-diff.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..75f057767e 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,7 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/aarch64/virt/DSDT",
+"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
+"tests/data/acpi/aarch64/virt/DSDT.memhp",
+"tests/data/acpi/aarch64/virt/DSDT.pxb",
+"tests/data/acpi/aarch64/virt/DSDT.topology",
+"tests/data/acpi/x86/microvm/DSDT.pcie",
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-06-16 9:46 ` [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Eric Auger
@ 2025-06-20 8:49 ` Jonathan Cameron via
2025-06-20 11:29 ` Eric Auger
2025-06-20 11:11 ` Igor Mammedov
1 sibling, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:49 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:34 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> This commit adds DSDT blobs to the whilelist in the prospect to
> allow changes in the GPEX _OSC method.
>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
FWIW given what this is and the involvement of foxes ;)
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> ---
>
> v2 -> v3:
> - fox for microvm
An excellent addition to any microvm.
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index dfb8523c8b..75f057767e 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1 +1,7 @@
> /* List of comma-separated changed AML files to ignore */
> +"tests/data/acpi/aarch64/virt/DSDT",
> +"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
> +"tests/data/acpi/aarch64/virt/DSDT.memhp",
> +"tests/data/acpi/aarch64/virt/DSDT.pxb",
> +"tests/data/acpi/aarch64/virt/DSDT.topology",
> +"tests/data/acpi/x86/microvm/DSDT.pcie",
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-06-20 8:49 ` Jonathan Cameron via
@ 2025-06-20 11:29 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-20 11:29 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On 6/20/25 10:49 AM, Jonathan Cameron wrote:
> On Mon, 16 Jun 2025 11:46:34 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>
>> This commit adds DSDT blobs to the whilelist in the prospect to
>> allow changes in the GPEX _OSC method.
>>
>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> FWIW given what this is and the involvement of foxes ;)
:-)
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Thanks!
Eric
>> ---
>>
>> v2 -> v3:
>> - fox for microvm
> An excellent addition to any microvm.
>
>
>
>> ---
>> tests/qtest/bios-tables-test-allowed-diff.h | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
>> index dfb8523c8b..75f057767e 100644
>> --- a/tests/qtest/bios-tables-test-allowed-diff.h
>> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
>> @@ -1 +1,7 @@
>> /* List of comma-separated changed AML files to ignore */
>> +"tests/data/acpi/aarch64/virt/DSDT",
>> +"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
>> +"tests/data/acpi/aarch64/virt/DSDT.memhp",
>> +"tests/data/acpi/aarch64/virt/DSDT.pxb",
>> +"tests/data/acpi/aarch64/virt/DSDT.topology",
>> +"tests/data/acpi/x86/microvm/DSDT.pcie",
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table
2025-06-16 9:46 ` [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Eric Auger
2025-06-20 8:49 ` Jonathan Cameron via
@ 2025-06-20 11:11 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 11:11 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:34 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> This commit adds DSDT blobs to the whilelist in the prospect to
> allow changes in the GPEX _OSC method.
>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
>
> v2 -> v3:
> - fox for microvm
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index dfb8523c8b..75f057767e 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1 +1,7 @@
> /* List of comma-separated changed AML files to ignore */
> +"tests/data/acpi/aarch64/virt/DSDT",
> +"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
> +"tests/data/acpi/aarch64/virt/DSDT.memhp",
> +"tests/data/acpi/aarch64/virt/DSDT.pxb",
> +"tests/data/acpi/aarch64/virt/DSDT.topology",
> +"tests/data/acpi/x86/microvm/DSDT.pcie",
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 06/29] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (4 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 05/29] tests/qtest/bios-tables-test: Prepare for changes in the DSDT table Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:50 ` Jonathan Cameron via
2025-06-20 11:48 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 07/29] hw/pci-host/gpex-acpi: retrieve and use GED acpi_pcihp setting Eric Auger
` (22 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
it appends the _OSC method but in fact it also appends the _DSM method
for the host bridge. Let's split the function into two separate ones
and let them return the method Aml pointer instead. This matches the
way it is done on x86 (build_q35_osc_method). In a subsequent patch
we will replace the gpex method by the q35 implementation that will
become shared between ARM and x86.
acpi_dsdt_add_host_bridge_methods is a new top helper that generates
both the _OSC and _DSM methods.
We take the opportunity to move SUPP and CTRL in the _osc method
that use them.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- moved
aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
into the _osc function. (Jonathan)
hence discarded Gustavo's and Igor's R-bs
---
hw/pci-host/gpex-acpi.c | 32 +++++++++++++++++++++-----------
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index f34b7cf25e..80fc2bf032 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -50,14 +50,12 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
}
}
-static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
+static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
{
- Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
-
- /* Declare an _OSC (OS Control Handoff) method */
- aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
- aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
+ Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
+ aml_append(method, aml_name_decl("SUPP", aml_int(0)));
+ aml_append(method, aml_name_decl("CTRL", aml_int(0)));
aml_append(method,
aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
@@ -103,9 +101,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
aml_name("CDW1")));
aml_append(elsectx, aml_return(aml_arg(3)));
aml_append(method, elsectx);
- aml_append(dev, method);
+ return method;
+}
- method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
+static Aml *build_host_bridge_dsm(void)
+{
+ Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
+ Aml *UUID, *ifctx, *ifctx1, *buf;
/* PCI Firmware Specification 3.0
* 4.6.1. _DSM for PCI Express Slot Information
@@ -124,7 +126,15 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
byte_list[0] = 0;
buf = aml_buffer(1, byte_list);
aml_append(method, aml_return(buf));
- aml_append(dev, method);
+ return method;
+}
+
+static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
+ bool enable_native_pcie_hotplug)
+{
+ /* Declare an _OSC (OS Control Handoff) method */
+ aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
+ aml_append(dev, build_host_bridge_dsm());
}
void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
@@ -193,7 +203,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
if (is_cxl) {
build_cxl_osc_method(dev);
} else {
- acpi_dsdt_add_pci_osc(dev, true);
+ acpi_dsdt_add_host_bridge_methods(dev, true);
}
aml_append(scope, dev);
@@ -268,7 +278,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
- acpi_dsdt_add_pci_osc(dev, true);
+ acpi_dsdt_add_host_bridge_methods(dev, true);
Aml *dev_res0 = aml_device("%s", "RES0");
aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 06/29] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-06-16 9:46 ` [PATCH v3 06/29] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
@ 2025-06-20 8:50 ` Jonathan Cameron via
2025-06-20 11:48 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:50 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:35 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> it appends the _OSC method but in fact it also appends the _DSM method
> for the host bridge. Let's split the function into two separate ones
> and let them return the method Aml pointer instead. This matches the
> way it is done on x86 (build_q35_osc_method). In a subsequent patch
> we will replace the gpex method by the q35 implementation that will
> become shared between ARM and x86.
>
> acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> both the _OSC and _DSM methods.
>
> We take the opportunity to move SUPP and CTRL in the _osc method
> that use them.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 06/29] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation
2025-06-16 9:46 ` [PATCH v3 06/29] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
2025-06-20 8:50 ` Jonathan Cameron via
@ 2025-06-20 11:48 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 11:48 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:35 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> acpi_dsdt_add_pci_osc() name is confusing as it gives the impression
> it appends the _OSC method but in fact it also appends the _DSM method
> for the host bridge. Let's split the function into two separate ones
> and let them return the method Aml pointer instead. This matches the
> way it is done on x86 (build_q35_osc_method). In a subsequent patch
> we will replace the gpex method by the q35 implementation that will
> become shared between ARM and x86.
>
> acpi_dsdt_add_host_bridge_methods is a new top helper that generates
> both the _OSC and _DSM methods.
I'd get rid of wrapper, but it's not something that worth to fight over,
so
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> We take the opportunity to move SUPP and CTRL in the _osc method
> that use them.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v2 -> v3:
> - moved
> aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> into the _osc function. (Jonathan)
> hence discarded Gustavo's and Igor's R-bs
> ---
> hw/pci-host/gpex-acpi.c | 32 +++++++++++++++++++++-----------
> 1 file changed, 21 insertions(+), 11 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index f34b7cf25e..80fc2bf032 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -50,14 +50,12 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> +static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> {
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx, *buf;
> -
> - /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
> - aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
> + Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
> method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> + aml_append(method, aml_name_decl("SUPP", aml_int(0)));
> + aml_append(method, aml_name_decl("CTRL", aml_int(0)));
> aml_append(method,
> aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
>
> @@ -103,9 +101,13 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> aml_name("CDW1")));
> aml_append(elsectx, aml_return(aml_arg(3)));
> aml_append(method, elsectx);
> - aml_append(dev, method);
> + return method;
> +}
>
> - method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> +static Aml *build_host_bridge_dsm(void)
> +{
> + Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> + Aml *UUID, *ifctx, *ifctx1, *buf;
>
> /* PCI Firmware Specification 3.0
> * 4.6.1. _DSM for PCI Express Slot Information
> @@ -124,7 +126,15 @@ static void acpi_dsdt_add_pci_osc(Aml *dev, bool enable_native_pcie_hotplug)
> byte_list[0] = 0;
> buf = aml_buffer(1, byte_list);
> aml_append(method, aml_return(buf));
> - aml_append(dev, method);
> + return method;
> +}
> +
> +static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> + bool enable_native_pcie_hotplug)
> +{
> + /* Declare an _OSC (OS Control Handoff) method */
> + aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> + aml_append(dev, build_host_bridge_dsm());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> @@ -193,7 +203,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
> }
>
> aml_append(scope, dev);
> @@ -268,7 +278,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_pci_osc(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, true);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 07/29] hw/pci-host/gpex-acpi: retrieve and use GED acpi_pcihp setting
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (5 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 06/29] hw/pci-host/gpex-acpi: Split host bridge OSC and DSM generation Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:52 ` Jonathan Cameron via
2025-06-20 12:07 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 08/29] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method Eric Auger
` (21 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
retrieve the acpi_pcihp option value from the ged. In
case acpi_pcihp is unset we configure pci native hotplug on
pci0. For expander bridges we keep legacy pci native hotplug,
as done on x86 q35.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- don'use the virt arm machine option anymore.
---
include/hw/pci-host/gpex.h | 1 +
hw/arm/virt-acpi-build.c | 5 +++++
hw/pci-host/gpex-acpi.c | 3 ++-
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
index 84471533af..feaf827474 100644
--- a/include/hw/pci-host/gpex.h
+++ b/include/hw/pci-host/gpex.h
@@ -45,6 +45,7 @@ struct GPEXConfig {
MemMapEntry pio;
int irq;
PCIBus *bus;
+ bool pci_native_hotplug;
};
typedef struct GPEXIrq GPEXIrq;
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 7e8e0f0298..d7547c8d3b 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -123,12 +123,17 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
uint32_t irq, VirtMachineState *vms)
{
int ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
+ AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
+ AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
+
+
struct GPEXConfig cfg = {
.mmio32 = memmap[VIRT_PCIE_MMIO],
.pio = memmap[VIRT_PCIE_PIO],
.ecam = memmap[ecam_id],
.irq = irq,
.bus = vms->bus,
+ .pci_native_hotplug = !pcihp_state->use_acpi_hotplug_bridge,
};
if (vms->highmem_mmio) {
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 80fc2bf032..44737a8d81 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -203,6 +203,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
if (is_cxl) {
build_cxl_osc_method(dev);
} else {
+ /* pxb bridges do not have ACPI PCI Hot-plug enabled */
acpi_dsdt_add_host_bridge_methods(dev, true);
}
@@ -278,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
}
aml_append(dev, aml_name_decl("_CRS", rbuf));
- acpi_dsdt_add_host_bridge_methods(dev, true);
+ acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
Aml *dev_res0 = aml_device("%s", "RES0");
aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 07/29] hw/pci-host/gpex-acpi: retrieve and use GED acpi_pcihp setting
2025-06-16 9:46 ` [PATCH v3 07/29] hw/pci-host/gpex-acpi: retrieve and use GED acpi_pcihp setting Eric Auger
@ 2025-06-20 8:52 ` Jonathan Cameron via
2025-06-20 12:07 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:52 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:36 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> retrieve the acpi_pcihp option value from the ged. In
> case acpi_pcihp is unset we configure pci native hotplug on
> pci0. For expander bridges we keep legacy pci native hotplug,
> as done on x86 q35.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
One minor thing inline
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> ---
>
> v2 -> v3:
> - don'use the virt arm machine option anymore.
> ---
> include/hw/pci-host/gpex.h | 1 +
> hw/arm/virt-acpi-build.c | 5 +++++
> hw/pci-host/gpex-acpi.c | 3 ++-
> 3 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
> index 84471533af..feaf827474 100644
> --- a/include/hw/pci-host/gpex.h
> +++ b/include/hw/pci-host/gpex.h
> @@ -45,6 +45,7 @@ struct GPEXConfig {
> MemMapEntry pio;
> int irq;
> PCIBus *bus;
> + bool pci_native_hotplug;
> };
>
> typedef struct GPEXIrq GPEXIrq;
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 7e8e0f0298..d7547c8d3b 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -123,12 +123,17 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> uint32_t irq, VirtMachineState *vms)
> {
> int ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
> +
Trivial, but why 2 blank lines? One seems enough here.
> +
> struct GPEXConfig cfg = {
> .mmio32 = memmap[VIRT_PCIE_MMIO],
> .pio = memmap[VIRT_PCIE_PIO],
> .ecam = memmap[ecam_id],
> .irq = irq,
> .bus = vms->bus,
> + .pci_native_hotplug = !pcihp_state->use_acpi_hotplug_bridge,
> };
>
> if (vms->highmem_mmio) {
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 80fc2bf032..44737a8d81 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -203,6 +203,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
> acpi_dsdt_add_host_bridge_methods(dev, true);
> }
>
> @@ -278,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_host_bridge_methods(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 07/29] hw/pci-host/gpex-acpi: retrieve and use GED acpi_pcihp setting
2025-06-16 9:46 ` [PATCH v3 07/29] hw/pci-host/gpex-acpi: retrieve and use GED acpi_pcihp setting Eric Auger
2025-06-20 8:52 ` Jonathan Cameron via
@ 2025-06-20 12:07 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:07 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:36 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> retrieve the acpi_pcihp option value from the ged. In
> case acpi_pcihp is unset we configure pci native hotplug on
> pci0. For expander bridges we keep legacy pci native hotplug,
I guess it's remnants of from previous version
s/legacy//
> as done on x86 q35.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
>
> v2 -> v3:
> - don'use the virt arm machine option anymore.
> ---
> include/hw/pci-host/gpex.h | 1 +
> hw/arm/virt-acpi-build.c | 5 +++++
> hw/pci-host/gpex-acpi.c | 3 ++-
> 3 files changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h
> index 84471533af..feaf827474 100644
> --- a/include/hw/pci-host/gpex.h
> +++ b/include/hw/pci-host/gpex.h
> @@ -45,6 +45,7 @@ struct GPEXConfig {
> MemMapEntry pio;
> int irq;
> PCIBus *bus;
> + bool pci_native_hotplug;
> };
>
> typedef struct GPEXIrq GPEXIrq;
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index 7e8e0f0298..d7547c8d3b 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -123,12 +123,17 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
> uint32_t irq, VirtMachineState *vms)
> {
> int ecam_id = VIRT_ECAM_ID(vms->highmem_ecam);
> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
1)
> +
> struct GPEXConfig cfg = {
> .mmio32 = memmap[VIRT_PCIE_MMIO],
> .pio = memmap[VIRT_PCIE_PIO],
> .ecam = memmap[ecam_id],
> .irq = irq,
> .bus = vms->bus,
> + .pci_native_hotplug = !pcihp_state->use_acpi_hotplug_bridge,
I'd use property accessor here instead of poking into device internals.
and get rind of [1]
> };
>
> if (vms->highmem_mmio) {
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 80fc2bf032..44737a8d81 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -203,6 +203,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> if (is_cxl) {
> build_cxl_osc_method(dev);
> } else {
> + /* pxb bridges do not have ACPI PCI Hot-plug enabled */
> acpi_dsdt_add_host_bridge_methods(dev, true);
> }
>
> @@ -278,7 +279,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
> }
> aml_append(dev, aml_name_decl("_CRS", rbuf));
>
> - acpi_dsdt_add_host_bridge_methods(dev, true);
> + acpi_dsdt_add_host_bridge_methods(dev, cfg->pci_native_hotplug);
>
> Aml *dev_res0 = aml_device("%s", "RES0");
> aml_append(dev_res0, aml_name_decl("_HID", aml_string("PNP0C02")));
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 08/29] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (6 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 07/29] hw/pci-host/gpex-acpi: retrieve and use GED acpi_pcihp setting Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:54 ` Jonathan Cameron via
2025-06-20 12:11 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 09/29] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
` (20 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
GPEX acpi_dsdt_add_pci_osc() does basically the same as
build_q35_osc_method().
Rename build_q35_osc_method() into build_pci_host_bridge_osc_method()
and move it into hw/acpi/pci.c. In a subsequent patch we will
use this later in place of acpi_dsdt_add_pci_osc().
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- move to hw/acpi/pci.c instead of aml-build.c (Igor)
---
include/hw/acpi/pci.h | 2 ++
hw/acpi/pci.c | 50 +++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 54 ++-----------------------------------------
3 files changed, 54 insertions(+), 52 deletions(-)
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index ab0187a894..8a328b580c 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -42,4 +42,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
void build_srat_generic_affinity_structures(GArray *table_data);
+Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
+
#endif
diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
index d511a85029..2228f1245e 100644
--- a/hw/acpi/pci.c
+++ b/hw/acpi/pci.c
@@ -301,3 +301,53 @@ void build_srat_generic_affinity_structures(GArray *table_data)
object_child_foreach_recursive(object_get_root(), build_acpi_generic_port,
table_data);
}
+
+Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug)
+{
+ Aml *if_ctx;
+ Aml *if_ctx2;
+ Aml *else_ctx;
+ Aml *method;
+ Aml *a_cwd1 = aml_name("CDW1");
+ Aml *a_ctrl = aml_local(0);
+
+ method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
+ aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
+
+ if_ctx = aml_if(aml_equal(
+ aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
+ aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
+ aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
+
+ aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
+
+ /*
+ * Always allow native PME, AER (no dependencies)
+ * Allow SHPC (PCI bridges can have SHPC controller)
+ * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
+ */
+ aml_append(if_ctx, aml_and(a_ctrl,
+ aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
+
+ if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
+ /* Unknown revision */
+ aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
+ aml_append(if_ctx, if_ctx2);
+
+ if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
+ /* Capabilities bits were masked */
+ aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
+ aml_append(if_ctx, if_ctx2);
+
+ /* Update DWORD3 in the buffer */
+ aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
+ aml_append(method, if_ctx);
+
+ else_ctx = aml_else();
+ /* Unrecognized UUID */
+ aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
+ aml_append(method, else_ctx);
+
+ aml_append(method, aml_return(aml_arg(3)));
+ return method;
+}
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 4f8572eebe..91945f716c 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1111,56 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
return dev;
}
-static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
-{
- Aml *if_ctx;
- Aml *if_ctx2;
- Aml *else_ctx;
- Aml *method;
- Aml *a_cwd1 = aml_name("CDW1");
- Aml *a_ctrl = aml_local(0);
-
- method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
- aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
-
- if_ctx = aml_if(aml_equal(
- aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
- aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
- aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
-
- aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
-
- /*
- * Always allow native PME, AER (no dependencies)
- * Allow SHPC (PCI bridges can have SHPC controller)
- * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
- */
- aml_append(if_ctx, aml_and(a_ctrl,
- aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
-
- if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
- /* Unknown revision */
- aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
- aml_append(if_ctx, if_ctx2);
-
- if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
- /* Capabilities bits were masked */
- aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
- aml_append(if_ctx, if_ctx2);
-
- /* Update DWORD3 in the buffer */
- aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
- aml_append(method, if_ctx);
-
- else_ctx = aml_else();
- /* Unrecognized UUID */
- aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
- aml_append(method, else_ctx);
-
- aml_append(method, aml_return(aml_arg(3)));
- return method;
-}
-
static void build_acpi0017(Aml *table)
{
Aml *dev, *scope, *method;
@@ -1231,7 +1181,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
- aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
+ aml_append(dev, build_pci_host_bridge_osc_method(!pm->pcihp_bridge_en));
aml_append(dev, aml_pci_edsm());
aml_append(sb_scope, dev);
if (mcfg_valid) {
@@ -1353,7 +1303,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
/* Expander bridges do not have ACPI PCI Hot-plug enabled */
- aml_append(dev, build_q35_osc_method(true));
+ aml_append(dev, build_pci_host_bridge_osc_method(true));
} else {
aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
}
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 08/29] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
2025-06-16 9:46 ` [PATCH v3 08/29] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method Eric Auger
@ 2025-06-20 8:54 ` Jonathan Cameron via
2025-06-20 12:11 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:54 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:37 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> GPEX acpi_dsdt_add_pci_osc() does basically the same as
> build_q35_osc_method().
>
> Rename build_q35_osc_method() into build_pci_host_bridge_osc_method()
> and move it into hw/acpi/pci.c. In a subsequent patch we will
> use this later in place of acpi_dsdt_add_pci_osc().
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
New location makes sense.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 08/29] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method
2025-06-16 9:46 ` [PATCH v3 08/29] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method Eric Auger
2025-06-20 8:54 ` Jonathan Cameron via
@ 2025-06-20 12:11 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:11 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:37 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> GPEX acpi_dsdt_add_pci_osc() does basically the same as
> build_q35_osc_method().
>
> Rename build_q35_osc_method() into build_pci_host_bridge_osc_method()
> and move it into hw/acpi/pci.c. In a subsequent patch we will
> use this later in place of acpi_dsdt_add_pci_osc().
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
>
> v2 -> v3:
> - move to hw/acpi/pci.c instead of aml-build.c (Igor)
> ---
> include/hw/acpi/pci.h | 2 ++
> hw/acpi/pci.c | 50 +++++++++++++++++++++++++++++++++++++++
> hw/i386/acpi-build.c | 54 ++-----------------------------------------
> 3 files changed, 54 insertions(+), 52 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index ab0187a894..8a328b580c 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -42,4 +42,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
>
> void build_srat_generic_affinity_structures(GArray *table_data);
>
> +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
> +
> #endif
> diff --git a/hw/acpi/pci.c b/hw/acpi/pci.c
> index d511a85029..2228f1245e 100644
> --- a/hw/acpi/pci.c
> +++ b/hw/acpi/pci.c
> @@ -301,3 +301,53 @@ void build_srat_generic_affinity_structures(GArray *table_data)
> object_child_foreach_recursive(object_get_root(), build_acpi_generic_port,
> table_data);
> }
> +
> +Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug)
> +{
> + Aml *if_ctx;
> + Aml *if_ctx2;
> + Aml *else_ctx;
> + Aml *method;
> + Aml *a_cwd1 = aml_name("CDW1");
> + Aml *a_ctrl = aml_local(0);
> +
> + method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> + aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> +
> + if_ctx = aml_if(aml_equal(
> + aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
> + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> + aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> +
> + aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
> +
> + /*
> + * Always allow native PME, AER (no dependencies)
> + * Allow SHPC (PCI bridges can have SHPC controller)
> + * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
> + */
> + aml_append(if_ctx, aml_and(a_ctrl,
> + aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
> +
> + if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
> + /* Unknown revision */
> + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
> + aml_append(if_ctx, if_ctx2);
> +
> + if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
> + /* Capabilities bits were masked */
> + aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
> + aml_append(if_ctx, if_ctx2);
> +
> + /* Update DWORD3 in the buffer */
> + aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
> + aml_append(method, if_ctx);
> +
> + else_ctx = aml_else();
> + /* Unrecognized UUID */
> + aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
> + aml_append(method, else_ctx);
> +
> + aml_append(method, aml_return(aml_arg(3)));
> + return method;
> +}
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index 4f8572eebe..91945f716c 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -1111,56 +1111,6 @@ static Aml *build_q35_dram_controller(const AcpiMcfgInfo *mcfg)
> return dev;
> }
>
> -static Aml *build_q35_osc_method(bool enable_native_pcie_hotplug)
> -{
> - Aml *if_ctx;
> - Aml *if_ctx2;
> - Aml *else_ctx;
> - Aml *method;
> - Aml *a_cwd1 = aml_name("CDW1");
> - Aml *a_ctrl = aml_local(0);
> -
> - method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> - aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> -
> - if_ctx = aml_if(aml_equal(
> - aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
> - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> - aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> -
> - aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
> -
> - /*
> - * Always allow native PME, AER (no dependencies)
> - * Allow SHPC (PCI bridges can have SHPC controller)
> - * Disable PCIe Native Hot-plug if ACPI PCI Hot-plug is enabled.
> - */
> - aml_append(if_ctx, aml_and(a_ctrl,
> - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)), a_ctrl));
> -
> - if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
> - /* Unknown revision */
> - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
> - aml_append(if_ctx, if_ctx2);
> -
> - if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
> - /* Capabilities bits were masked */
> - aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
> - aml_append(if_ctx, if_ctx2);
> -
> - /* Update DWORD3 in the buffer */
> - aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
> - aml_append(method, if_ctx);
> -
> - else_ctx = aml_else();
> - /* Unrecognized UUID */
> - aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
> - aml_append(method, else_ctx);
> -
> - aml_append(method, aml_return(aml_arg(3)));
> - return method;
> -}
> -
> static void build_acpi0017(Aml *table)
> {
> Aml *dev, *scope, *method;
> @@ -1231,7 +1181,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
> aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
> aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid)));
> - aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en));
> + aml_append(dev, build_pci_host_bridge_osc_method(!pm->pcihp_bridge_en));
> aml_append(dev, aml_pci_edsm());
> aml_append(sb_scope, dev);
> if (mcfg_valid) {
> @@ -1353,7 +1303,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
> aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
>
> /* Expander bridges do not have ACPI PCI Hot-plug enabled */
> - aml_append(dev, build_q35_osc_method(true));
> + aml_append(dev, build_pci_host_bridge_osc_method(true));
> } else {
> aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
> }
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 09/29] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (7 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 08/29] hw/i386/acpi-build: Turn build_q35_osc_method into a generic method Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:57 ` Jonathan Cameron via
2025-06-20 12:16 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 10/29] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Eric Auger
` (19 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
gpex build_host_bridge_osc() and x86 originated
build_pci_host_bridge_osc_method() are mostly identical.
In GPEX, SUPP is set to CDW2 but is not further used. CTRL
is same as Local0.
So let gpex code reuse build_pci_host_bridge_osc_method()
and remove build_host_bridge_osc().
The disassembled DSDT difference is given below:
* Original Table Header:
* Signature "DSDT"
- * Length 0x00001A4F (6735)
+ * Length 0x00001A35 (6709)
* Revision 0x02
- * Checksum 0xBF
+ * Checksum 0xDD
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
@@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
- SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
- CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
- CTRL &= 0x1F
+ Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
+ Local0 &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
- If ((CDW3 != CTRL))
+ If ((CDW3 != Local0))
{
CDW1 |= 0x10
}
- CDW3 = CTRL /* \_SB_.PCI0.CTRL */
- Return (Arg3)
+ CDW3 = Local0
}
Else
{
CDW1 |= 0x04
- Return (Arg3)
}
+
+ Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
v1 -> v2:
- move in the dsdt.dsl diff in the commit message and remove useless
info (Gustavo, Michael)
---
hw/pci-host/gpex-acpi.c | 62 ++++-------------------------------------
1 file changed, 5 insertions(+), 57 deletions(-)
diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
index 44737a8d81..952a0ace19 100644
--- a/hw/pci-host/gpex-acpi.c
+++ b/hw/pci-host/gpex-acpi.c
@@ -1,5 +1,6 @@
#include "qemu/osdep.h"
#include "hw/acpi/aml-build.h"
+#include "hw/acpi/pci.h"
#include "hw/pci-host/gpex.h"
#include "hw/arm/virt.h"
#include "hw/pci/pci_bus.h"
@@ -50,61 +51,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
}
}
-static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
-{
- Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
- method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
- aml_append(method, aml_name_decl("SUPP", aml_int(0)));
- aml_append(method, aml_name_decl("CTRL", aml_int(0)));
- aml_append(method,
- aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
-
- /* PCI Firmware Specification 3.0
- * 4.5.1. _OSC Interface for PCI Host Bridge Devices
- * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is
- * identified by the Universal Unique IDentifier (UUID)
- * 33DB4D5B-1FF7-401C-9657-7441C03DD766
- */
- UUID = aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766");
- ifctx = aml_if(aml_equal(aml_arg(0), UUID));
- aml_append(ifctx,
- aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
- aml_append(ifctx,
- aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
- aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
- aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
-
- /*
- * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
- * and PCIeHotplug depending on enable_native_pcie_hotplug
- */
- aml_append(ifctx, aml_and(aml_name("CTRL"),
- aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
- aml_name("CTRL")));
-
- ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
- aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
- aml_name("CDW1")));
- aml_append(ifctx, ifctx1);
-
- ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"))));
- aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10),
- aml_name("CDW1")));
- aml_append(ifctx, ifctx1);
-
- aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3")));
- aml_append(ifctx, aml_return(aml_arg(3)));
- aml_append(method, ifctx);
-
- elsectx = aml_else();
- aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4),
- aml_name("CDW1")));
- aml_append(elsectx, aml_return(aml_arg(3)));
- aml_append(method, elsectx);
- return method;
-}
-
-static Aml *build_host_bridge_dsm(void)
+static Aml *build_pci_host_bridge_dsm_method(void)
{
Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
Aml *UUID, *ifctx, *ifctx1, *buf;
@@ -133,8 +80,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
bool enable_native_pcie_hotplug)
{
/* Declare an _OSC (OS Control Handoff) method */
- aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
- aml_append(dev, build_host_bridge_dsm());
+ aml_append(dev,
+ build_pci_host_bridge_osc_method(enable_native_pcie_hotplug));
+ aml_append(dev, build_pci_host_bridge_dsm_method());
}
void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 09/29] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
2025-06-16 9:46 ` [PATCH v3 09/29] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
@ 2025-06-20 8:57 ` Jonathan Cameron via
2025-06-20 12:16 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:57 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:38 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> gpex build_host_bridge_osc() and x86 originated
> build_pci_host_bridge_osc_method() are mostly identical.
>
> In GPEX, SUPP is set to CDW2 but is not further used. CTRL
> is same as Local0.
>
> So let gpex code reuse build_pci_host_bridge_osc_method()
> and remove build_host_bridge_osc().
>
> The disassembled DSDT difference is given below:
>
> * Original Table Header:
> * Signature "DSDT"
> - * Length 0x00001A4F (6735)
> + * Length 0x00001A35 (6709)
> * Revision 0x02
> - * Checksum 0xBF
> + * Checksum 0xDD
> * OEM ID "BOCHS "
> * OEM Table ID "BXPC "
> * OEM Revision 0x00000001 (1)
> @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
> {
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> - SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
> - CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - CTRL &= 0x1F
> + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> + Local0 &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> }
>
> - If ((CDW3 != CTRL))
> + If ((CDW3 != Local0))
> {
> CDW1 |= 0x10
> }
>
> - CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> - Return (Arg3)
> + CDW3 = Local0
> }
> Else
> {
> CDW1 |= 0x04
> - Return (Arg3)
> }
> +
> + Return (Arg3)
> }
>
> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 09/29] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method
2025-06-16 9:46 ` [PATCH v3 09/29] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
2025-06-20 8:57 ` Jonathan Cameron via
@ 2025-06-20 12:16 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:16 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:38 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> gpex build_host_bridge_osc() and x86 originated
> build_pci_host_bridge_osc_method() are mostly identical.
>
> In GPEX, SUPP is set to CDW2 but is not further used. CTRL
> is same as Local0.
>
> So let gpex code reuse build_pci_host_bridge_osc_method()
> and remove build_host_bridge_osc().
qtest fails with
FAILED: qemu-system-mips64el
cc -m64 @qemu-system-mips64el.rsp
/usr/bin/ld: libsystem.a.p/hw_pci-host_gpex-acpi.c.o: in function `acpi_dsdt_add_host_bridge_methods':
./hw/pci-host/gpex-acpi.c:83: undefined reference to `build_pci_host_bridge_osc_method'
>
> The disassembled DSDT difference is given below:
>
> * Original Table Header:
> * Signature "DSDT"
> - * Length 0x00001A4F (6735)
> + * Length 0x00001A35 (6709)
> * Revision 0x02
> - * Checksum 0xBF
> + * Checksum 0xDD
> * OEM ID "BOCHS "
> * OEM Table ID "BXPC "
> * OEM Revision 0x00000001 (1)
> @@ -1849,27 +1849,26 @@ DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
> {
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> - SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
> - CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - CTRL &= 0x1F
> + Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> + Local0 &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> }
>
> - If ((CDW3 != CTRL))
> + If ((CDW3 != Local0))
> {
> CDW1 |= 0x10
> }
>
> - CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> - Return (Arg3)
> + CDW3 = Local0
> }
> Else
> {
> CDW1 |= 0x04
> - Return (Arg3)
> }
> +
> + Return (Arg3)
> }
>
> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
>
> v1 -> v2:
> - move in the dsdt.dsl diff in the commit message and remove useless
> info (Gustavo, Michael)
> ---
> hw/pci-host/gpex-acpi.c | 62 ++++-------------------------------------
> 1 file changed, 5 insertions(+), 57 deletions(-)
>
> diff --git a/hw/pci-host/gpex-acpi.c b/hw/pci-host/gpex-acpi.c
> index 44737a8d81..952a0ace19 100644
> --- a/hw/pci-host/gpex-acpi.c
> +++ b/hw/pci-host/gpex-acpi.c
> @@ -1,5 +1,6 @@
> #include "qemu/osdep.h"
> #include "hw/acpi/aml-build.h"
> +#include "hw/acpi/pci.h"
> #include "hw/pci-host/gpex.h"
> #include "hw/arm/virt.h"
> #include "hw/pci/pci_bus.h"
> @@ -50,61 +51,7 @@ static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq,
> }
> }
>
> -static Aml *build_host_bridge_osc(bool enable_native_pcie_hotplug)
> -{
> - Aml *method, *UUID, *ifctx, *ifctx1, *elsectx;
> - method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
> - aml_append(method, aml_name_decl("SUPP", aml_int(0)));
> - aml_append(method, aml_name_decl("CTRL", aml_int(0)));
> - aml_append(method,
> - aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
> -
> - /* PCI Firmware Specification 3.0
> - * 4.5.1. _OSC Interface for PCI Host Bridge Devices
> - * The _OSC interface for a PCI/PCI-X/PCI Express hierarchy is
> - * identified by the Universal Unique IDentifier (UUID)
> - * 33DB4D5B-1FF7-401C-9657-7441C03DD766
> - */
> - UUID = aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766");
> - ifctx = aml_if(aml_equal(aml_arg(0), UUID));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
> - aml_append(ifctx,
> - aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
> - aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
> - aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
> -
> - /*
> - * Allow OS control for SHPCHotplug, PME, AER, PCIeCapability,
> - * and PCIeHotplug depending on enable_native_pcie_hotplug
> - */
> - aml_append(ifctx, aml_and(aml_name("CTRL"),
> - aml_int(0x1E | (enable_native_pcie_hotplug ? 0x1 : 0x0)),
> - aml_name("CTRL")));
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x08),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - ifctx1 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), aml_name("CTRL"))));
> - aml_append(ifctx1, aml_or(aml_name("CDW1"), aml_int(0x10),
> - aml_name("CDW1")));
> - aml_append(ifctx, ifctx1);
> -
> - aml_append(ifctx, aml_store(aml_name("CTRL"), aml_name("CDW3")));
> - aml_append(ifctx, aml_return(aml_arg(3)));
> - aml_append(method, ifctx);
> -
> - elsectx = aml_else();
> - aml_append(elsectx, aml_or(aml_name("CDW1"), aml_int(4),
> - aml_name("CDW1")));
> - aml_append(elsectx, aml_return(aml_arg(3)));
> - aml_append(method, elsectx);
> - return method;
> -}
> -
> -static Aml *build_host_bridge_dsm(void)
> +static Aml *build_pci_host_bridge_dsm_method(void)
> {
> Aml *method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
> Aml *UUID, *ifctx, *ifctx1, *buf;
> @@ -133,8 +80,9 @@ static void acpi_dsdt_add_host_bridge_methods(Aml *dev,
> bool enable_native_pcie_hotplug)
> {
> /* Declare an _OSC (OS Control Handoff) method */
> - aml_append(dev, build_host_bridge_osc(enable_native_pcie_hotplug));
> - aml_append(dev, build_host_bridge_dsm());
> + aml_append(dev,
> + build_pci_host_bridge_osc_method(enable_native_pcie_hotplug));
> + aml_append(dev, build_pci_host_bridge_dsm_method());
> }
>
> void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 10/29] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (8 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 09/29] hw/pci-host/gpex-acpi: Use build_pci_host_bridge_osc_method Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 8:59 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 11/29] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper Eric Auger
` (18 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Update the reference DSDT blobs after GPEX _OSC change. The _OSC change
affects the aarch64 'virt' and the x86 'microvm' machines.
DSDT diff is the same for all the machines/tests:
@@ -1798,6 +1798,8 @@
0x0000008000000000, // Length
,, , AddressRangeMemory, TypeStatic)
})
+ Name (SUPP, Zero)
+ Name (CTRL, Zero)
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
{
CreateDWordField (Arg3, Zero, CDW1)
@@ -1805,26 +1807,27 @@
{
CreateDWordField (Arg3, 0x04, CDW2)
CreateDWordField (Arg3, 0x08, CDW3)
- Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
- Local0 &= 0x1F
+ SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
+ CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
+ CTRL &= 0x1F
If ((Arg1 != One))
{
CDW1 |= 0x08
}
- If ((CDW3 != Local0))
+ If ((CDW3 != CTRL))
{
CDW1 |= 0x10
}
- CDW3 = Local0
+ CDW3 = CTRL /* \_SB_.PCI0.CTRL */
+ Return (Arg3)
}
Else
{
CDW1 |= 0x04
+ Return (Arg3)
}
-
- Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
---
tests/qtest/bios-tables-test-allowed-diff.h | 6 ------
tests/data/acpi/aarch64/virt/DSDT | Bin 5196 -> 5158 bytes
.../data/acpi/aarch64/virt/DSDT.acpihmatvirt | Bin 5282 -> 5244 bytes
tests/data/acpi/aarch64/virt/DSDT.memhp | Bin 6557 -> 6519 bytes
tests/data/acpi/aarch64/virt/DSDT.pxb | Bin 7679 -> 7603 bytes
tests/data/acpi/aarch64/virt/DSDT.topology | Bin 5398 -> 5360 bytes
tests/data/acpi/x86/microvm/DSDT.pcie | Bin 3023 -> 2985 bytes
7 files changed, 6 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 75f057767e..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,7 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/aarch64/virt/DSDT",
-"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
-"tests/data/acpi/aarch64/virt/DSDT.memhp",
-"tests/data/acpi/aarch64/virt/DSDT.pxb",
-"tests/data/acpi/aarch64/virt/DSDT.topology",
-"tests/data/acpi/x86/microvm/DSDT.pcie",
diff --git a/tests/data/acpi/aarch64/virt/DSDT b/tests/data/acpi/aarch64/virt/DSDT
index 36d3e5d5a5e47359b6dcb3706f98b4f225677591..acab6e65febbc210158d4c39be0680bbb90250f5 100644
GIT binary patch
delta 114
zcmX@3u}p)@CD<iIO@x7g>C8kfX{JVpjp}Y(OkR^V=X2?C2#NTx$NL96vvg%MIJ<-!
zF7RWWyjw`i#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;W@BMV
FMgSUfAKd@|
delta 152
zcmZ3caYlp7CD<jzM}&caNqQoeG*i3NMs+tXCWon;^SSgm<T!#u0|FR0oI`?q7)0DS
z<Nbr3S-P?roL#~V7kIEwUN5BOX9QAG;Or7^3{q7MBDmy1<N|?7lQS7>L29`;z&gYx
bO@^t12n&FO3qXoN;!Cm@@@?i7mSh9~5Tq&5
diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt b/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
index e6154d0355f84fdcc51387b4db8f9ee63acae4e9..54c27e7d95b4956ed1b5dee0d299ccb08dc2a73e 100644
GIT binary patch
delta 114
zcmZ3a`A37xCD<jTMudTZsdFNiG*i3lM)f&dOkR^VALY{H5EAiWkM|FDX6ediaCQkd
zT;Rt#Sx{KZ#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;=1yTr
FMgUJNAb|h?
delta 152
zcmeyPu}G84CD<iokq83=(~XH-(oDVX8`bA<F*!`#e3VO%LyjXjG$4S1!#O0#he5=R
zGu}VgnWZb6!PzC;aDfN=WL9A<KO>Nm0%w<SW00z95Wyu6A{Piunw-g43sTF)0oEZl
bX);V5L|6bMTmVuG5?_+NkZ*Icup}b@<J&8B
diff --git a/tests/data/acpi/aarch64/virt/DSDT.memhp b/tests/data/acpi/aarch64/virt/DSDT.memhp
index 33f011d6b635035a04c0b39ce9b4e219f7ae74b7..4330bc97cba0950191c45ac833533db7a190db81 100644
GIT binary patch
delta 114
zcmbPh{N0GlCD<jTT#|u->Fq==X{M&B8`a&on7k%!&gatO5EAiWkM|FDX6ediaCQkd
zT;Rt#dAE?3iE%=80+)Qk0)a`BGZ||^GF%*BdErTuon69>6Ch#&AhCi3kjO%w&Bnr6
FYyg6XAvXX3
delta 152
zcmexvG}oBRCD<iot|S8klg&gfX{L_p8`a&om>i~V&gatOkmCpr4G3W1a1IIbVGwcS
zjQ0<AX6ediaCQkdT;RbzdA*R9pAkq&fwN1vF-TQ4h~Sb3kqZPSP0nPj1*zrY0P7H&
bG#RE2A}jzBE&wS8i7&}s$hVnSIExJcpiV0*
diff --git a/tests/data/acpi/aarch64/virt/DSDT.pxb b/tests/data/acpi/aarch64/virt/DSDT.pxb
index c0fdc6e9c1396cc2259dc4bc665ba023adcf4c9b..7fdbc03e2bf9fb7d35704779253de36e362f0bf9 100644
GIT binary patch
delta 207
zcmexwz1f<}CD<iovn&Gx)9r~|(oB6fHmbXEG5NM`&ga^|E+pc^9`7IQ%+i(3;Or7^
zxWJEfa-NKqiE%=80+)Qk0)a`BGZ||^GF%*BdErTuon69>6Ch#&AhCi3kjO%w$<JhL
aH-8e+V`TE0v{^|+kAs?qZ+<2t$p`>t?mg51
delta 282
zcmdmN{ok6)CD<k8zbpd-Q^!OuX{N5b8`a&on4CK{=W}gfm*WTy4G3W1a1IIbVGwcS
zjQ0<AX6ediaCQkdT;Rbz*-%K!&j_TXz}Y3-7^JEiL~zN2$OQtECTB9%g4A+xfOUvX
unhaA15f%Um7l0Il#Fu0*<lEdYl+DQGFm>}EVLcA|TR*v9$aeB|nL7Yd7E^Zs
diff --git a/tests/data/acpi/aarch64/virt/DSDT.topology b/tests/data/acpi/aarch64/virt/DSDT.topology
index 029d03eecc4efddc001e5377e85ac8e831294362..969b4f6560d3ae39f5b7e0064b7122905476fce8 100644
GIT binary patch
delta 114
zcmbQH^+A)%CD<k8g9rly)24}B(oEex8`TB4nY<=#w&d315EAiWkM|FDX6ediaCQkd
zT;Rt#xm8%p#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;=D)&{
Fi~vUbAmso6
delta 152
zcmeyMIZcbpCD<iIOq79viGL!OG*hGhMs)#hCWon;ExGkL<T!#u0|FR0oI`?q7)0DS
z<Nbr3S-P?roL#~V7kIEwt`yetGXg0oaCQkd2C1qB5nS>ha)H34$(f9`Ahlc^U>#zU
bCd1T0gatst1t7&B@g>;{`8Hn{mSh9~yBaCk
diff --git a/tests/data/acpi/x86/microvm/DSDT.pcie b/tests/data/acpi/x86/microvm/DSDT.pcie
index 8eacd21d6ecdf9a3cd3e4f03cf1b40748dcbf53e..ba258f454dc0e59ef2fd67e0ce37e270e7c122e8 100644
GIT binary patch
delta 113
zcmX>vzEYgaCD<ioB{u^D)Axy7(oD|VH>#&HG5Ji`+{YxqAtd6%9`7IQ%+i(3;Or7^
zxWJEf@*XZN6XS&H1TMLR1p<>MXEN4;WVkrM^1_oQJG+D%CqTpmKw<?6Ad!VUlTEm1
F0{}^9AprmY
delta 151
zcmZ1}eqNl*CD<k8JU0Ualj}q-X(rE|8`V>pn4BhW?qd?*kmCpr4G3W1a1IIbVGwcS
zjQ0<AX6ediaCQkdT;Rbzc>|Z0pAkq&fwN1vF-TQ4h~Sb3kqZPSP0nPj1*zrY0P7H&
aG#RE2A}jzBE&wS8i7&}s$Tyjfdo}=5#47aw
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 10/29] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change
2025-06-16 9:46 ` [PATCH v3 10/29] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Eric Auger
@ 2025-06-20 8:59 ` Jonathan Cameron via
2025-06-20 11:33 ` Eric Auger
0 siblings, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 8:59 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:39 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Update the reference DSDT blobs after GPEX _OSC change. The _OSC change
> affects the aarch64 'virt' and the x86 'microvm' machines.
>
> DSDT diff is the same for all the machines/tests:
Is this diff backwards? It's the opposite of the one in patch 9.
> @@ -1798,6 +1798,8 @@
> 0x0000008000000000, // Length
> ,, , AddressRangeMemory, TypeStatic)
> })
> + Name (SUPP, Zero)
> + Name (CTRL, Zero)
> Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
> {
> CreateDWordField (Arg3, Zero, CDW1)
> @@ -1805,26 +1807,27 @@
> {
> CreateDWordField (Arg3, 0x04, CDW2)
> CreateDWordField (Arg3, 0x08, CDW3)
> - Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> - Local0 &= 0x1F
> + SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
> + CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
> + CTRL &= 0x1F
> If ((Arg1 != One))
> {
> CDW1 |= 0x08
> }
>
> - If ((CDW3 != Local0))
> + If ((CDW3 != CTRL))
> {
> CDW1 |= 0x10
> }
>
> - CDW3 = Local0
> + CDW3 = CTRL /* \_SB_.PCI0.CTRL */
> + Return (Arg3)
> }
> Else
> {
> CDW1 |= 0x04
> + Return (Arg3)
> }
> -
> - Return (Arg3)
> }
>
> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 6 ------
> tests/data/acpi/aarch64/virt/DSDT | Bin 5196 -> 5158 bytes
> .../data/acpi/aarch64/virt/DSDT.acpihmatvirt | Bin 5282 -> 5244 bytes
> tests/data/acpi/aarch64/virt/DSDT.memhp | Bin 6557 -> 6519 bytes
> tests/data/acpi/aarch64/virt/DSDT.pxb | Bin 7679 -> 7603 bytes
> tests/data/acpi/aarch64/virt/DSDT.topology | Bin 5398 -> 5360 bytes
> tests/data/acpi/x86/microvm/DSDT.pcie | Bin 3023 -> 2985 bytes
> 7 files changed, 6 deletions(-)
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index 75f057767e..dfb8523c8b 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1,7 +1 @@
> /* List of comma-separated changed AML files to ignore */
> -"tests/data/acpi/aarch64/virt/DSDT",
> -"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
> -"tests/data/acpi/aarch64/virt/DSDT.memhp",
> -"tests/data/acpi/aarch64/virt/DSDT.pxb",
> -"tests/data/acpi/aarch64/virt/DSDT.topology",
> -"tests/data/acpi/x86/microvm/DSDT.pcie",
> diff --git a/tests/data/acpi/aarch64/virt/DSDT b/tests/data/acpi/aarch64/virt/DSDT
> index 36d3e5d5a5e47359b6dcb3706f98b4f225677591..acab6e65febbc210158d4c39be0680bbb90250f5 100644
> GIT binary patch
> delta 114
> zcmX@3u}p)@CD<iIO@x7g>C8kfX{JVpjp}Y(OkR^V=X2?C2#NTx$NL96vvg%MIJ<-!
> zF7RWWyjw`i#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;W@BMV
> FMgSUfAKd@|
>
> delta 152
> zcmZ3caYlp7CD<jzM}&caNqQoeG*i3NMs+tXCWon;^SSgm<T!#u0|FR0oI`?q7)0DS
> z<Nbr3S-P?roL#~V7kIEwUN5BOX9QAG;Or7^3{q7MBDmy1<N|?7lQS7>L29`;z&gYx
> bO@^t12n&FO3qXoN;!Cm@@@?i7mSh9~5Tq&5
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt b/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
> index e6154d0355f84fdcc51387b4db8f9ee63acae4e9..54c27e7d95b4956ed1b5dee0d299ccb08dc2a73e 100644
> GIT binary patch
> delta 114
> zcmZ3a`A37xCD<jTMudTZsdFNiG*i3lM)f&dOkR^VALY{H5EAiWkM|FDX6ediaCQkd
> zT;Rt#Sx{KZ#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;=1yTr
> FMgUJNAb|h?
>
> delta 152
> zcmeyPu}G84CD<iokq83=(~XH-(oDVX8`bA<F*!`#e3VO%LyjXjG$4S1!#O0#he5=R
> zGu}VgnWZb6!PzC;aDfN=WL9A<KO>Nm0%w<SW00z95Wyu6A{Piunw-g43sTF)0oEZl
> bX);V5L|6bMTmVuG5?_+NkZ*Icup}b@<J&8B
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.memhp b/tests/data/acpi/aarch64/virt/DSDT.memhp
> index 33f011d6b635035a04c0b39ce9b4e219f7ae74b7..4330bc97cba0950191c45ac833533db7a190db81 100644
> GIT binary patch
> delta 114
> zcmbPh{N0GlCD<jTT#|u->Fq==X{M&B8`a&on7k%!&gatO5EAiWkM|FDX6ediaCQkd
> zT;Rt#dAE?3iE%=80+)Qk0)a`BGZ||^GF%*BdErTuon69>6Ch#&AhCi3kjO%w&Bnr6
> FYyg6XAvXX3
>
> delta 152
> zcmexvG}oBRCD<iot|S8klg&gfX{L_p8`a&om>i~V&gatOkmCpr4G3W1a1IIbVGwcS
> zjQ0<AX6ediaCQkdT;RbzdA*R9pAkq&fwN1vF-TQ4h~Sb3kqZPSP0nPj1*zrY0P7H&
> bG#RE2A}jzBE&wS8i7&}s$hVnSIExJcpiV0*
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.pxb b/tests/data/acpi/aarch64/virt/DSDT.pxb
> index c0fdc6e9c1396cc2259dc4bc665ba023adcf4c9b..7fdbc03e2bf9fb7d35704779253de36e362f0bf9 100644
> GIT binary patch
> delta 207
> zcmexwz1f<}CD<iovn&Gx)9r~|(oB6fHmbXEG5NM`&ga^|E+pc^9`7IQ%+i(3;Or7^
> zxWJEfa-NKqiE%=80+)Qk0)a`BGZ||^GF%*BdErTuon69>6Ch#&AhCi3kjO%w$<JhL
> aH-8e+V`TE0v{^|+kAs?qZ+<2t$p`>t?mg51
>
> delta 282
> zcmdmN{ok6)CD<k8zbpd-Q^!OuX{N5b8`a&on4CK{=W}gfm*WTy4G3W1a1IIbVGwcS
> zjQ0<AX6ediaCQkdT;Rbz*-%K!&j_TXz}Y3-7^JEiL~zN2$OQtECTB9%g4A+xfOUvX
> unhaA15f%Um7l0Il#Fu0*<lEdYl+DQGFm>}EVLcA|TR*v9$aeB|nL7Yd7E^Zs
>
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.topology b/tests/data/acpi/aarch64/virt/DSDT.topology
> index 029d03eecc4efddc001e5377e85ac8e831294362..969b4f6560d3ae39f5b7e0064b7122905476fce8 100644
> GIT binary patch
> delta 114
> zcmbQH^+A)%CD<k8g9rly)24}B(oEex8`TB4nY<=#w&d315EAiWkM|FDX6ediaCQkd
> zT;Rt#xm8%p#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;=D)&{
> Fi~vUbAmso6
>
> delta 152
> zcmeyMIZcbpCD<iIOq79viGL!OG*hGhMs)#hCWon;ExGkL<T!#u0|FR0oI`?q7)0DS
> z<Nbr3S-P?roL#~V7kIEwt`yetGXg0oaCQkd2C1qB5nS>ha)H34$(f9`Ahlc^U>#zU
> bCd1T0gatst1t7&B@g>;{`8Hn{mSh9~yBaCk
>
> diff --git a/tests/data/acpi/x86/microvm/DSDT.pcie b/tests/data/acpi/x86/microvm/DSDT.pcie
> index 8eacd21d6ecdf9a3cd3e4f03cf1b40748dcbf53e..ba258f454dc0e59ef2fd67e0ce37e270e7c122e8 100644
> GIT binary patch
> delta 113
> zcmX>vzEYgaCD<ioB{u^D)Axy7(oD|VH>#&HG5Ji`+{YxqAtd6%9`7IQ%+i(3;Or7^
> zxWJEf@*XZN6XS&H1TMLR1p<>MXEN4;WVkrM^1_oQJG+D%CqTpmKw<?6Ad!VUlTEm1
> F0{}^9AprmY
>
> delta 151
> zcmZ1}eqNl*CD<k8JU0Ualj}q-X(rE|8`V>pn4BhW?qd?*kmCpr4G3W1a1IIbVGwcS
> zjQ0<AX6ediaCQkdT;Rbzc>|Z0pAkq&fwN1vF-TQ4h~Sb3kqZPSP0nPj1*zrY0P7H&
> aG#RE2A}jzBE&wS8i7&}s$Tyjfdo}=5#47aw
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 10/29] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change
2025-06-20 8:59 ` Jonathan Cameron via
@ 2025-06-20 11:33 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-20 11:33 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 6/20/25 10:59 AM, Jonathan Cameron wrote:
> On Mon, 16 Jun 2025 11:46:39 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Update the reference DSDT blobs after GPEX _OSC change. The _OSC change
>> affects the aarch64 'virt' and the x86 'microvm' machines.
>>
>> DSDT diff is the same for all the machines/tests:
> Is this diff backwards? It's the opposite of the one in patch 9.
argh. Most probably. I must have messed with the diff :-(
Eric
>
>
>
>> @@ -1798,6 +1798,8 @@
>> 0x0000008000000000, // Length
>> ,, , AddressRangeMemory, TypeStatic)
>> })
>> + Name (SUPP, Zero)
>> + Name (CTRL, Zero)
>> Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
>> {
>> CreateDWordField (Arg3, Zero, CDW1)
>> @@ -1805,26 +1807,27 @@
>> {
>> CreateDWordField (Arg3, 0x04, CDW2)
>> CreateDWordField (Arg3, 0x08, CDW3)
>> - Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
>> - Local0 &= 0x1F
>> + SUPP = CDW2 /* \_SB_.PCI0._OSC.CDW2 */
>> + CTRL = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
>> + CTRL &= 0x1F
>> If ((Arg1 != One))
>> {
>> CDW1 |= 0x08
>> }
>>
>> - If ((CDW3 != Local0))
>> + If ((CDW3 != CTRL))
>> {
>> CDW1 |= 0x10
>> }
>>
>> - CDW3 = Local0
>> + CDW3 = CTRL /* \_SB_.PCI0.CTRL */
>> + Return (Arg3)
>> }
>> Else
>> {
>> CDW1 |= 0x04
>> + Return (Arg3)
>> }
>> -
>> - Return (Arg3)
>> }
>>
>> Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>> ---
>> tests/qtest/bios-tables-test-allowed-diff.h | 6 ------
>> tests/data/acpi/aarch64/virt/DSDT | Bin 5196 -> 5158 bytes
>> .../data/acpi/aarch64/virt/DSDT.acpihmatvirt | Bin 5282 -> 5244 bytes
>> tests/data/acpi/aarch64/virt/DSDT.memhp | Bin 6557 -> 6519 bytes
>> tests/data/acpi/aarch64/virt/DSDT.pxb | Bin 7679 -> 7603 bytes
>> tests/data/acpi/aarch64/virt/DSDT.topology | Bin 5398 -> 5360 bytes
>> tests/data/acpi/x86/microvm/DSDT.pcie | Bin 3023 -> 2985 bytes
>> 7 files changed, 6 deletions(-)
>>
>> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
>> index 75f057767e..dfb8523c8b 100644
>> --- a/tests/qtest/bios-tables-test-allowed-diff.h
>> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
>> @@ -1,7 +1 @@
>> /* List of comma-separated changed AML files to ignore */
>> -"tests/data/acpi/aarch64/virt/DSDT",
>> -"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
>> -"tests/data/acpi/aarch64/virt/DSDT.memhp",
>> -"tests/data/acpi/aarch64/virt/DSDT.pxb",
>> -"tests/data/acpi/aarch64/virt/DSDT.topology",
>> -"tests/data/acpi/x86/microvm/DSDT.pcie",
>> diff --git a/tests/data/acpi/aarch64/virt/DSDT b/tests/data/acpi/aarch64/virt/DSDT
>> index 36d3e5d5a5e47359b6dcb3706f98b4f225677591..acab6e65febbc210158d4c39be0680bbb90250f5 100644
>> GIT binary patch
>> delta 114
>> zcmX@3u}p)@CD<iIO@x7g>C8kfX{JVpjp}Y(OkR^V=X2?C2#NTx$NL96vvg%MIJ<-!
>> zF7RWWyjw`i#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;W@BMV
>> FMgSUfAKd@|
>>
>> delta 152
>> zcmZ3caYlp7CD<jzM}&caNqQoeG*i3NMs+tXCWon;^SSgm<T!#u0|FR0oI`?q7)0DS
>> z<Nbr3S-P?roL#~V7kIEwUN5BOX9QAG;Or7^3{q7MBDmy1<N|?7lQS7>L29`;z&gYx
>> bO@^t12n&FO3qXoN;!Cm@@@?i7mSh9~5Tq&5
>>
>> diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt b/tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
>> index e6154d0355f84fdcc51387b4db8f9ee63acae4e9..54c27e7d95b4956ed1b5dee0d299ccb08dc2a73e 100644
>> GIT binary patch
>> delta 114
>> zcmZ3a`A37xCD<jTMudTZsdFNiG*i3lM)f&dOkR^VALY{H5EAiWkM|FDX6ediaCQkd
>> zT;Rt#Sx{KZ#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;=1yTr
>> FMgUJNAb|h?
>>
>> delta 152
>> zcmeyPu}G84CD<iokq83=(~XH-(oDVX8`bA<F*!`#e3VO%LyjXjG$4S1!#O0#he5=R
>> zGu}VgnWZb6!PzC;aDfN=WL9A<KO>Nm0%w<SW00z95Wyu6A{Piunw-g43sTF)0oEZl
>> bX);V5L|6bMTmVuG5?_+NkZ*Icup}b@<J&8B
>>
>> diff --git a/tests/data/acpi/aarch64/virt/DSDT.memhp b/tests/data/acpi/aarch64/virt/DSDT.memhp
>> index 33f011d6b635035a04c0b39ce9b4e219f7ae74b7..4330bc97cba0950191c45ac833533db7a190db81 100644
>> GIT binary patch
>> delta 114
>> zcmbPh{N0GlCD<jTT#|u->Fq==X{M&B8`a&on7k%!&gatO5EAiWkM|FDX6ediaCQkd
>> zT;Rt#dAE?3iE%=80+)Qk0)a`BGZ||^GF%*BdErTuon69>6Ch#&AhCi3kjO%w&Bnr6
>> FYyg6XAvXX3
>>
>> delta 152
>> zcmexvG}oBRCD<iot|S8klg&gfX{L_p8`a&om>i~V&gatOkmCpr4G3W1a1IIbVGwcS
>> zjQ0<AX6ediaCQkdT;RbzdA*R9pAkq&fwN1vF-TQ4h~Sb3kqZPSP0nPj1*zrY0P7H&
>> bG#RE2A}jzBE&wS8i7&}s$hVnSIExJcpiV0*
>>
>> diff --git a/tests/data/acpi/aarch64/virt/DSDT.pxb b/tests/data/acpi/aarch64/virt/DSDT.pxb
>> index c0fdc6e9c1396cc2259dc4bc665ba023adcf4c9b..7fdbc03e2bf9fb7d35704779253de36e362f0bf9 100644
>> GIT binary patch
>> delta 207
>> zcmexwz1f<}CD<iovn&Gx)9r~|(oB6fHmbXEG5NM`&ga^|E+pc^9`7IQ%+i(3;Or7^
>> zxWJEfa-NKqiE%=80+)Qk0)a`BGZ||^GF%*BdErTuon69>6Ch#&AhCi3kjO%w$<JhL
>> aH-8e+V`TE0v{^|+kAs?qZ+<2t$p`>t?mg51
>>
>> delta 282
>> zcmdmN{ok6)CD<k8zbpd-Q^!OuX{N5b8`a&on4CK{=W}gfm*WTy4G3W1a1IIbVGwcS
>> zjQ0<AX6ediaCQkdT;Rbz*-%K!&j_TXz}Y3-7^JEiL~zN2$OQtECTB9%g4A+xfOUvX
>> unhaA15f%Um7l0Il#Fu0*<lEdYl+DQGFm>}EVLcA|TR*v9$aeB|nL7Yd7E^Zs
>>
>> diff --git a/tests/data/acpi/aarch64/virt/DSDT.topology b/tests/data/acpi/aarch64/virt/DSDT.topology
>> index 029d03eecc4efddc001e5377e85ac8e831294362..969b4f6560d3ae39f5b7e0064b7122905476fce8 100644
>> GIT binary patch
>> delta 114
>> zcmbQH^+A)%CD<k8g9rly)24}B(oEex8`TB4nY<=#w&d315EAiWkM|FDX6ediaCQkd
>> zT;Rt#xm8%p#5kckflEGNfxx86nT)j{87>a6yzr#S&Mx7`2@o*>kXS(iNMs?;=D)&{
>> Fi~vUbAmso6
>>
>> delta 152
>> zcmeyMIZcbpCD<iIOq79viGL!OG*hGhMs)#hCWon;ExGkL<T!#u0|FR0oI`?q7)0DS
>> z<Nbr3S-P?roL#~V7kIEwt`yetGXg0oaCQkd2C1qB5nS>ha)H34$(f9`Ahlc^U>#zU
>> bCd1T0gatst1t7&B@g>;{`8Hn{mSh9~yBaCk
>>
>> diff --git a/tests/data/acpi/x86/microvm/DSDT.pcie b/tests/data/acpi/x86/microvm/DSDT.pcie
>> index 8eacd21d6ecdf9a3cd3e4f03cf1b40748dcbf53e..ba258f454dc0e59ef2fd67e0ce37e270e7c122e8 100644
>> GIT binary patch
>> delta 113
>> zcmX>vzEYgaCD<ioB{u^D)Axy7(oD|VH>#&HG5Ji`+{YxqAtd6%9`7IQ%+i(3;Or7^
>> zxWJEf@*XZN6XS&H1TMLR1p<>MXEN4;WVkrM^1_oQJG+D%CqTpmKw<?6Ad!VUlTEm1
>> F0{}^9AprmY
>>
>> delta 151
>> zcmZ1}eqNl*CD<k8JU0Ualj}q-X(rE|8`V>pn4BhW?qd?*kmCpr4G3W1a1IIbVGwcS
>> zjQ0<AX6ediaCQkdT;Rbzc>|Z0pAkq&fwN1vF-TQ4h~Sb3kqZPSP0nPj1*zrY0P7H&
>> aG#RE2A}jzBE&wS8i7&}s$Tyjfdo}=5#47aw
>>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 11/29] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (9 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 10/29] tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _OSC change Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-16 9:46 ` [PATCH v3 12/29] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug Eric Auger
` (17 subsequent siblings)
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Extract the code that reserves resources for ACPI PCI hotplug
into a new helper named build_append_pcihp_resources() and
move it to pcihp.c. We will reuse it on ARM.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
v2 -> v3:
- fixed indent (Jonathan)
---
include/hw/acpi/pcihp.h | 2 ++
hw/acpi/pcihp.c | 18 ++++++++++++++++++
hw/i386/acpi-build.c | 15 ++-------------
3 files changed, 22 insertions(+), 13 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 971451e8ea..8a46a414cc 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -75,6 +75,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
+void build_append_pcihp_resources(Aml *table,
+ uint64_t io_addr, uint64_t io_len);
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index e0260f67e6..47fa434a62 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -685,6 +685,24 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
aml_append(table, scope);
}
+/* Reserve PCIHP resources */
+void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
+ uint64_t io_addr, uint64_t io_len)
+{
+ Aml *dev, *crs;
+
+ dev = aml_device("PHPR");
+ aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
+ aml_append(dev,
+ aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
+ /* device present, functioning, decoding, not shown in UI */
+ aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
+ crs = aml_resource_template();
+ aml_append(crs, aml_io(AML_DECODE16, io_addr, io_addr, 1, io_len));
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ aml_append(scope, dev);
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 91945f716c..52cef834ed 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1432,19 +1432,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
/* reserve PCIHP resources */
if (pm->pcihp_io_len && (pm->pcihp_bridge_en || pm->pcihp_root_en)) {
- dev = aml_device("PHPR");
- aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A06")));
- aml_append(dev,
- aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
- /* device present, functioning, decoding, not shown in UI */
- aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
- crs = aml_resource_template();
- aml_append(crs,
- aml_io(AML_DECODE16, pm->pcihp_io_base, pm->pcihp_io_base, 1,
- pm->pcihp_io_len)
- );
- aml_append(dev, aml_name_decl("_CRS", crs));
- aml_append(scope, dev);
+ build_append_pcihp_resources(scope,
+ pm->pcihp_io_base, pm->pcihp_io_len);
}
aml_append(dsdt, scope);
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* [PATCH v3 12/29] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (10 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 11/29] hw/i386/acpi-build: Introduce build_append_pcihp_resources() helper Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-16 9:46 ` [PATCH v3 13/29] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Eric Auger
` (16 subsequent siblings)
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
On ARM we will put the operation regions in AML_SYSTEM_MEMORY.
So let's allow this configuration.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
include/hw/acpi/pcihp.h | 3 ++-
hw/acpi/pcihp.c | 8 ++++----
hw/i386/acpi-build.c | 4 ++--
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 8a46a414cc..253ac6e483 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -28,6 +28,7 @@
#define HW_ACPI_PCIHP_H
#include "hw/acpi/acpi.h"
+#include "hw/acpi/aml-build.h"
#include "hw/hotplug.h"
#define ACPI_PCIHP_IO_BASE_PROP "acpi-pcihp-io-base"
@@ -73,7 +74,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev,
AcpiPciHpState *s, DeviceState *dev,
Error **errp);
-void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr);
+void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr);
void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
void build_append_pcihp_resources(Aml *table,
uint64_t io_addr, uint64_t io_len);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 47fa434a62..e3cc57b954 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -629,7 +629,7 @@ static Aml *aml_pci_pdsm(void)
return method;
}
-void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
+void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr)
{
Aml *scope;
Aml *field;
@@ -638,21 +638,21 @@ void build_acpi_pci_hotplug(Aml *table, uint64_t pcihp_addr)
scope = aml_scope("_SB.PCI0");
aml_append(scope,
- aml_operation_region("PCST", AML_SYSTEM_IO, aml_int(pcihp_addr), 0x08));
+ aml_operation_region("PCST", rs, aml_int(pcihp_addr), 0x08));
field = aml_field("PCST", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
aml_append(field, aml_named_field("PCIU", 32));
aml_append(field, aml_named_field("PCID", 32));
aml_append(scope, field);
aml_append(scope,
- aml_operation_region("SEJ", AML_SYSTEM_IO,
+ aml_operation_region("SEJ", rs,
aml_int(pcihp_addr + ACPI_PCIHP_SEJ_BASE), 0x04));
field = aml_field("SEJ", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
aml_append(field, aml_named_field("B0EJ", 32));
aml_append(scope, field);
aml_append(scope,
- aml_operation_region("BNMR", AML_SYSTEM_IO,
+ aml_operation_region("BNMR", rs,
aml_int(pcihp_addr + ACPI_PCIHP_BNMR_BASE), 0x08));
field = aml_field("BNMR", AML_DWORD_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
aml_append(field, aml_named_field("BNUM", 32));
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 52cef834ed..6ca2b34ef8 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1172,7 +1172,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
- build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base);
}
build_piix4_pci0_int(dsdt);
} else if (q35) {
@@ -1216,7 +1216,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
aml_append(dsdt, sb_scope);
if (pm->pcihp_bridge_en) {
- build_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
+ build_acpi_pci_hotplug(dsdt, AML_SYSTEM_IO, pm->pcihp_io_base);
}
build_q35_pci0_int(dsdt);
}
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* [PATCH v3 13/29] hw/i386/acpi-build: Move build_append_notification_callback to pcihp
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (11 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 12/29] hw/acpi/pcihp: Add an AmlRegionSpace arg to build_acpi_pci_hotplug Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-16 9:46 ` [PATCH v3 14/29] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots " Eric Auger
` (15 subsequent siblings)
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
We plan to reuse build_append_notification_callback() on ARM
so let's move it to pcihp.c.
No functional change intended.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
include/hw/acpi/pcihp.h | 1 +
hw/acpi/pcihp.c | 58 +++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 58 -----------------------------------------
3 files changed, 59 insertions(+), 58 deletions(-)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 253ac6e483..f4fd44cb32 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -78,6 +78,7 @@ void build_acpi_pci_hotplug(Aml *table, AmlRegionSpace rs, uint64_t pcihp_addr);
void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar);
void build_append_pcihp_resources(Aml *table,
uint64_t io_addr, uint64_t io_len);
+bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index e3cc57b954..333099b8ba 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -39,6 +39,7 @@
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "qom/qom-qobject.h"
+#include "qobject/qnum.h"
#include "trace.h"
#define ACPI_PCIHP_SIZE 0x0018
@@ -703,6 +704,63 @@ void build_append_pcihp_resources(Aml *scope /* \\_SB.PCI0 */,
aml_append(scope, dev);
}
+bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
+{
+ Aml *method;
+ PCIBus *sec;
+ QObject *bsel;
+ int nr_notifiers = 0;
+ GQueue *pcnt_bus_list = g_queue_new();
+
+ QLIST_FOREACH(sec, &bus->child, sibling) {
+ Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
+ if (pci_bus_is_root(sec)) {
+ continue;
+ }
+ nr_notifiers = nr_notifiers +
+ build_append_notification_callback(br_scope, sec);
+ /*
+ * add new child scope to parent
+ * and keep track of bus that have PCNT,
+ * bus list is used later to call children PCNTs from this level PCNT
+ */
+ if (nr_notifiers) {
+ g_queue_push_tail(pcnt_bus_list, sec);
+ aml_append(parent_scope, br_scope);
+ }
+ }
+
+ /*
+ * Append PCNT method to notify about events on local and child buses.
+ * ps: hostbridge might not have hotplug (bsel) enabled but might have
+ * child bridges that do have bsel.
+ */
+ method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
+
+ /* If bus supports hotplug select it and notify about local events */
+ bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
+ if (bsel) {
+ uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
+
+ aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
+ aml_append(method, aml_call2("DVNT", aml_name("PCIU"),
+ aml_int(1))); /* Device Check */
+ aml_append(method, aml_call2("DVNT", aml_name("PCID"),
+ aml_int(3))); /* Eject Request */
+ nr_notifiers++;
+ }
+
+ /* Notify about child bus events in any case */
+ while ((sec = g_queue_pop_head(pcnt_bus_list))) {
+ aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
+ }
+
+ aml_append(parent_scope, method);
+ qobject_unref(bsel);
+ g_queue_free(pcnt_bus_list);
+ return !!nr_notifiers;
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6ca2b34ef8..3275675e60 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -563,64 +563,6 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
}
}
-static bool build_append_notification_callback(Aml *parent_scope,
- const PCIBus *bus)
-{
- Aml *method;
- PCIBus *sec;
- QObject *bsel;
- int nr_notifiers = 0;
- GQueue *pcnt_bus_list = g_queue_new();
-
- QLIST_FOREACH(sec, &bus->child, sibling) {
- Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn);
- if (pci_bus_is_root(sec)) {
- continue;
- }
- nr_notifiers = nr_notifiers +
- build_append_notification_callback(br_scope, sec);
- /*
- * add new child scope to parent
- * and keep track of bus that have PCNT,
- * bus list is used later to call children PCNTs from this level PCNT
- */
- if (nr_notifiers) {
- g_queue_push_tail(pcnt_bus_list, sec);
- aml_append(parent_scope, br_scope);
- }
- }
-
- /*
- * Append PCNT method to notify about events on local and child buses.
- * ps: hostbridge might not have hotplug (bsel) enabled but might have
- * child bridges that do have bsel.
- */
- method = aml_method("PCNT", 0, AML_NOTSERIALIZED);
-
- /* If bus supports hotplug select it and notify about local events */
- bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL);
- if (bsel) {
- uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
-
- aml_append(method, aml_store(aml_int(bsel_val), aml_name("BNUM")));
- aml_append(method, aml_call2("DVNT", aml_name("PCIU"),
- aml_int(1))); /* Device Check */
- aml_append(method, aml_call2("DVNT", aml_name("PCID"),
- aml_int(3))); /* Eject Request */
- nr_notifiers++;
- }
-
- /* Notify about child bus events in any case */
- while ((sec = g_queue_pop_head(pcnt_bus_list))) {
- aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn));
- }
-
- aml_append(parent_scope, method);
- qobject_unref(bsel);
- g_queue_free(pcnt_bus_list);
- return !!nr_notifiers;
-}
-
/*
* build_prt - Define interrupt routing rules
*
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* [PATCH v3 14/29] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots to pcihp
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (12 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 13/29] hw/i386/acpi-build: Move build_append_notification_callback to pcihp Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-16 9:46 ` [PATCH v3 15/29] hw/i386/acpi-build: Use AcpiPciHpState::root in acpi_set_pci_info Eric Auger
` (14 subsequent siblings)
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
We intend to reuse build_append_pci_bus_devices and build_append_pcihp_slots
on ARM. So let's move them to hw/acpi/pcihp.c as well as all static
helpers they use.
No functional change intended.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
---
v2 -> v3:
- changed the layout of the commit message
- reordered the moved functions to match the original ordering
(Jonathan)
---
include/hw/acpi/pci.h | 1 -
include/hw/acpi/pcihp.h | 2 +
hw/acpi/pcihp.c | 173 ++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 172 ---------------------------------------
4 files changed, 175 insertions(+), 173 deletions(-)
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index 8a328b580c..69bae95eac 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -37,7 +37,6 @@ typedef struct AcpiMcfgInfo {
void build_mcfg(GArray *table_data, BIOSLinker *linker, AcpiMcfgInfo *info,
const char *oem_id, const char *oem_table_id);
-void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
void build_srat_generic_affinity_structures(GArray *table_data);
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index f4fd44cb32..5506a58862 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -80,6 +80,8 @@ void build_append_pcihp_resources(Aml *table,
uint64_t io_addr, uint64_t io_len);
bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus);
+void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus);
+
/* Called on reset */
void acpi_pcihp_reset(AcpiPciHpState *s);
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 333099b8ba..236e175b69 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -27,6 +27,7 @@
#include "qemu/osdep.h"
#include "hw/acpi/pcihp.h"
#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
#include "hw/pci-host/i440fx.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_bridge.h"
@@ -761,6 +762,178 @@ bool build_append_notification_callback(Aml *parent_scope, const PCIBus *bus)
return !!nr_notifiers;
}
+static Aml *aml_pci_device_dsm(void)
+{
+ Aml *method;
+
+ method = aml_method("_DSM", 4, AML_SERIALIZED);
+ {
+ Aml *params = aml_local(0);
+ Aml *pkg = aml_package(2);
+ aml_append(pkg, aml_int(0));
+ aml_append(pkg, aml_int(0));
+ aml_append(method, aml_store(pkg, params));
+ aml_append(method,
+ aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
+ aml_append(method,
+ aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
+ aml_append(method,
+ aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
+ aml_arg(2), aml_arg(3), params))
+ );
+ }
+ return method;
+}
+
+static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
+{
+ Aml *method;
+
+ g_assert(pdev->acpi_index != 0);
+ method = aml_method("_DSM", 4, AML_SERIALIZED);
+ {
+ Aml *params = aml_local(0);
+ Aml *pkg = aml_package(1);
+ aml_append(pkg, aml_int(pdev->acpi_index));
+ aml_append(method, aml_store(pkg, params));
+ aml_append(method,
+ aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
+ aml_arg(2), aml_arg(3), params))
+ );
+ }
+ return method;
+}
+
+static void build_append_pcihp_notify_entry(Aml *method, int slot)
+{
+ Aml *if_ctx;
+ int32_t devfn = PCI_DEVFN(slot, 0);
+
+ if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
+ aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
+ aml_append(method, if_ctx);
+}
+
+static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
+{
+ const PCIDevice *pdev = bus->devices[devfn];
+
+ if (PCI_FUNC(devfn)) {
+ if (IS_PCI_BRIDGE(pdev)) {
+ /*
+ * Ignore only hotplugged PCI bridges on !0 functions, but
+ * allow describing cold plugged bridges on all functions
+ */
+ if (DEVICE(pdev)->hotplugged) {
+ return true;
+ }
+ }
+ }
+ return false;
+}
+
+static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
+{
+ PCIDevice *pdev = bus->devices[devfn];
+ if (pdev) {
+ return is_devfn_ignored_generic(devfn, bus) ||
+ !DEVICE_GET_CLASS(pdev)->hotpluggable ||
+ /* Cold plugged bridges aren't themselves hot-pluggable */
+ (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
+ } else { /* non populated slots */
+ /*
+ * hotplug is supported only for non-multifunction device
+ * so generate device description only for function 0
+ */
+ if (PCI_FUNC(devfn) ||
+ (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
+ return true;
+ }
+ }
+ return false;
+}
+
+void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
+{
+ int devfn;
+ Aml *dev, *notify_method = NULL, *method;
+ QObject *bsel = object_property_get_qobject(OBJECT(bus),
+ ACPI_PCIHP_PROP_BSEL, NULL);
+ uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
+ qobject_unref(bsel);
+
+ aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
+ notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ int slot = PCI_SLOT(devfn);
+ int adr = slot << 16 | PCI_FUNC(devfn);
+
+ if (is_devfn_ignored_hotplug(devfn, bus)) {
+ continue;
+ }
+
+ if (bus->devices[devfn]) {
+ dev = aml_scope("S%.02X", devfn);
+ } else {
+ dev = aml_device("S%.02X", devfn);
+ aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
+ }
+
+ /*
+ * Can't declare _SUN here for every device as it changes 'slot'
+ * enumeration order in linux kernel, so use another variable for it
+ */
+ aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
+ aml_append(dev, aml_pci_device_dsm());
+
+ aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
+ /* add _EJ0 to make slot hotpluggable */
+ method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
+ aml_append(method,
+ aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
+ );
+ aml_append(dev, method);
+
+ build_append_pcihp_notify_entry(notify_method, slot);
+
+ /* device descriptor has been composed, add it into parent context */
+ aml_append(parent_scope, dev);
+ }
+ aml_append(parent_scope, notify_method);
+}
+
+void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
+{
+ int devfn;
+ Aml *dev;
+
+ for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+ /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
+ int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
+ PCIDevice *pdev = bus->devices[devfn];
+
+ if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
+ continue;
+ }
+
+ /* start to compose PCI device descriptor */
+ dev = aml_device("S%.02X", devfn);
+ aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
+
+ call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
+ /* add _DSM if device has acpi-index set */
+ if (pdev->acpi_index &&
+ !object_property_get_bool(OBJECT(pdev), "hotpluggable",
+ &error_abort)) {
+ aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
+ }
+
+ /* device descriptor has been composed, add it into parent context */
+ aml_append(parent_scope, dev);
+ }
+}
+
const VMStateDescription vmstate_acpi_pcihp_pci_status = {
.name = "acpi_pcihp_pci_status",
.version_id = 1,
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 3275675e60..fe8bc62c03 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -338,29 +338,6 @@ build_facs(GArray *table_data)
g_array_append_vals(table_data, reserved, 40); /* Reserved */
}
-static Aml *aml_pci_device_dsm(void)
-{
- Aml *method;
-
- method = aml_method("_DSM", 4, AML_SERIALIZED);
- {
- Aml *params = aml_local(0);
- Aml *pkg = aml_package(2);
- aml_append(pkg, aml_int(0));
- aml_append(pkg, aml_int(0));
- aml_append(method, aml_store(pkg, params));
- aml_append(method,
- aml_store(aml_name("BSEL"), aml_index(params, aml_int(0))));
- aml_append(method,
- aml_store(aml_name("ASUN"), aml_index(params, aml_int(1))));
- aml_append(method,
- aml_return(aml_call5("PDSM", aml_arg(0), aml_arg(1),
- aml_arg(2), aml_arg(3), params))
- );
- }
- return method;
-}
-
static Aml *aml_pci_edsm(void)
{
Aml *method, *ifctx;
@@ -414,155 +391,6 @@ static Aml *aml_pci_edsm(void)
return method;
}
-static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev)
-{
- Aml *method;
-
- g_assert(pdev->acpi_index != 0);
- method = aml_method("_DSM", 4, AML_SERIALIZED);
- {
- Aml *params = aml_local(0);
- Aml *pkg = aml_package(1);
- aml_append(pkg, aml_int(pdev->acpi_index));
- aml_append(method, aml_store(pkg, params));
- aml_append(method,
- aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1),
- aml_arg(2), aml_arg(3), params))
- );
- }
- return method;
-}
-
-static void build_append_pcihp_notify_entry(Aml *method, int slot)
-{
- Aml *if_ctx;
- int32_t devfn = PCI_DEVFN(slot, 0);
-
- if_ctx = aml_if(aml_and(aml_arg(0), aml_int(0x1U << slot), NULL));
- aml_append(if_ctx, aml_notify(aml_name("S%.02X", devfn), aml_arg(1)));
- aml_append(method, if_ctx);
-}
-
-static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus)
-{
- const PCIDevice *pdev = bus->devices[devfn];
-
- if (PCI_FUNC(devfn)) {
- if (IS_PCI_BRIDGE(pdev)) {
- /*
- * Ignore only hotplugged PCI bridges on !0 functions, but
- * allow describing cold plugged bridges on all functions
- */
- if (DEVICE(pdev)->hotplugged) {
- return true;
- }
- }
- }
- return false;
-}
-
-static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus)
-{
- PCIDevice *pdev = bus->devices[devfn];
- if (pdev) {
- return is_devfn_ignored_generic(devfn, bus) ||
- !DEVICE_GET_CLASS(pdev)->hotpluggable ||
- /* Cold plugged bridges aren't themselves hot-pluggable */
- (IS_PCI_BRIDGE(pdev) && !DEVICE(pdev)->hotplugged);
- } else { /* non populated slots */
- /*
- * hotplug is supported only for non-multifunction device
- * so generate device description only for function 0
- */
- if (PCI_FUNC(devfn) ||
- (pci_bus_is_express(bus) && PCI_SLOT(devfn) > 0)) {
- return true;
- }
- }
- return false;
-}
-
-void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus)
-{
- int devfn;
- Aml *dev, *notify_method = NULL, *method;
- QObject *bsel = object_property_get_qobject(OBJECT(bus),
- ACPI_PCIHP_PROP_BSEL, NULL);
- uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel));
- qobject_unref(bsel);
-
- aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val)));
- notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED);
-
- for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
- int slot = PCI_SLOT(devfn);
- int adr = slot << 16 | PCI_FUNC(devfn);
-
- if (is_devfn_ignored_hotplug(devfn, bus)) {
- continue;
- }
-
- if (bus->devices[devfn]) {
- dev = aml_scope("S%.02X", devfn);
- } else {
- dev = aml_device("S%.02X", devfn);
- aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
- }
-
- /*
- * Can't declare _SUN here for every device as it changes 'slot'
- * enumeration order in linux kernel, so use another variable for it
- */
- aml_append(dev, aml_name_decl("ASUN", aml_int(slot)));
- aml_append(dev, aml_pci_device_dsm());
-
- aml_append(dev, aml_name_decl("_SUN", aml_int(slot)));
- /* add _EJ0 to make slot hotpluggable */
- method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
- aml_append(method,
- aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
- );
- aml_append(dev, method);
-
- build_append_pcihp_notify_entry(notify_method, slot);
-
- /* device descriptor has been composed, add it into parent context */
- aml_append(parent_scope, dev);
- }
- aml_append(parent_scope, notify_method);
-}
-
-void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus)
-{
- int devfn;
- Aml *dev;
-
- for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
- /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */
- int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn);
- PCIDevice *pdev = bus->devices[devfn];
-
- if (!pdev || is_devfn_ignored_generic(devfn, bus)) {
- continue;
- }
-
- /* start to compose PCI device descriptor */
- dev = aml_device("S%.02X", devfn);
- aml_append(dev, aml_name_decl("_ADR", aml_int(adr)));
-
- call_dev_aml_func(DEVICE(bus->devices[devfn]), dev);
- /* add _DSM if device has acpi-index set */
- if (pdev->acpi_index &&
- !object_property_get_bool(OBJECT(pdev), "hotpluggable",
- &error_abort)) {
- aml_append(dev, aml_pci_static_endpoint_dsm(pdev));
- }
-
- /* device descriptor has been composed, add it into parent context */
- aml_append(parent_scope, dev);
- }
-}
-
/*
* build_prt - Define interrupt routing rules
*
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* [PATCH v3 15/29] hw/i386/acpi-build: Use AcpiPciHpState::root in acpi_set_pci_info
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (13 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 14/29] hw/i386/acpi-build: Move build_append_pci_bus_devices/pcihp_slots " Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 9:05 ` Jonathan Cameron via
2025-06-20 12:20 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place Eric Auger
` (13 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
pcihp acpi_set_pci_info() generic code currently uses
acpi_get_i386_pci_host() to retrieve the pci host bridge.
To make it work also on ARM we get rid of that call and
directly use AcpiPciHpState::root.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Suggested-by: Igor Mammedov <imammedo@redhat.com>
---
v2 -> v3:
- Use AcpiPciHpState::root
v1 -> v2
- described the fact we changed the implementation of
acpi_get_pci_host() in the commit msg.
---
hw/acpi/pcihp.c | 11 ++++-------
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index 236e175b69..e79a24b821 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -99,10 +99,10 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque)
return info;
}
-static void acpi_set_pci_info(bool has_bridge_hotplug)
+static void acpi_set_pci_info(AcpiPciHpState *s)
{
static bool bsel_is_set;
- Object *host = acpi_get_i386_pci_host();
+ bool has_bridge_hotplug = s->use_acpi_hotplug_bridge;
PCIBus *bus;
BSELInfo info = { .bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT,
.has_bridge_hotplug = has_bridge_hotplug };
@@ -112,11 +112,8 @@ static void acpi_set_pci_info(bool has_bridge_hotplug)
}
bsel_is_set = true;
- if (!host) {
- return;
- }
- bus = PCI_HOST_BRIDGE(host)->bus;
+ bus = s->root;
if (bus) {
/* Scan all PCI buses. Set property to enable acpi based hotplug. */
pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &info);
@@ -266,7 +263,7 @@ static void acpi_pcihp_update(AcpiPciHpState *s)
void acpi_pcihp_reset(AcpiPciHpState *s)
{
- acpi_set_pci_info(s->use_acpi_hotplug_bridge);
+ acpi_set_pci_info(s);
acpi_pcihp_update(s);
}
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 15/29] hw/i386/acpi-build: Use AcpiPciHpState::root in acpi_set_pci_info
2025-06-16 9:46 ` [PATCH v3 15/29] hw/i386/acpi-build: Use AcpiPciHpState::root in acpi_set_pci_info Eric Auger
@ 2025-06-20 9:05 ` Jonathan Cameron via
2025-06-20 12:20 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 9:05 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:44 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> pcihp acpi_set_pci_info() generic code currently uses
> acpi_get_i386_pci_host() to retrieve the pci host bridge.
>
> To make it work also on ARM we get rid of that call and
> directly use AcpiPciHpState::root.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Suggested-by: Igor Mammedov <imammedo@redhat.com>
Nice
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> ---
>
> v2 -> v3:
> - Use AcpiPciHpState::root
>
> v1 -> v2
> - described the fact we changed the implementation of
> acpi_get_pci_host() in the commit msg.
> ---
> hw/acpi/pcihp.c | 11 ++++-------
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 236e175b69..e79a24b821 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -99,10 +99,10 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque)
> return info;
> }
>
> -static void acpi_set_pci_info(bool has_bridge_hotplug)
> +static void acpi_set_pci_info(AcpiPciHpState *s)
> {
> static bool bsel_is_set;
> - Object *host = acpi_get_i386_pci_host();
> + bool has_bridge_hotplug = s->use_acpi_hotplug_bridge;
> PCIBus *bus;
> BSELInfo info = { .bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT,
> .has_bridge_hotplug = has_bridge_hotplug };
> @@ -112,11 +112,8 @@ static void acpi_set_pci_info(bool has_bridge_hotplug)
> }
> bsel_is_set = true;
>
> - if (!host) {
> - return;
> - }
>
> - bus = PCI_HOST_BRIDGE(host)->bus;
> + bus = s->root;
> if (bus) {
> /* Scan all PCI buses. Set property to enable acpi based hotplug. */
> pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &info);
> @@ -266,7 +263,7 @@ static void acpi_pcihp_update(AcpiPciHpState *s)
>
> void acpi_pcihp_reset(AcpiPciHpState *s)
> {
> - acpi_set_pci_info(s->use_acpi_hotplug_bridge);
> + acpi_set_pci_info(s);
> acpi_pcihp_update(s);
> }
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 15/29] hw/i386/acpi-build: Use AcpiPciHpState::root in acpi_set_pci_info
2025-06-16 9:46 ` [PATCH v3 15/29] hw/i386/acpi-build: Use AcpiPciHpState::root in acpi_set_pci_info Eric Auger
2025-06-20 9:05 ` Jonathan Cameron via
@ 2025-06-20 12:20 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:20 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:44 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> pcihp acpi_set_pci_info() generic code currently uses
> acpi_get_i386_pci_host() to retrieve the pci host bridge.
>
> To make it work also on ARM we get rid of that call and
> directly use AcpiPciHpState::root.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Suggested-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> ---
>
> v2 -> v3:
> - Use AcpiPciHpState::root
>
> v1 -> v2
> - described the fact we changed the implementation of
> acpi_get_pci_host() in the commit msg.
> ---
> hw/acpi/pcihp.c | 11 ++++-------
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index 236e175b69..e79a24b821 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -99,10 +99,10 @@ static void *acpi_set_bsel(PCIBus *bus, void *opaque)
> return info;
> }
>
> -static void acpi_set_pci_info(bool has_bridge_hotplug)
> +static void acpi_set_pci_info(AcpiPciHpState *s)
> {
> static bool bsel_is_set;
> - Object *host = acpi_get_i386_pci_host();
> + bool has_bridge_hotplug = s->use_acpi_hotplug_bridge;
> PCIBus *bus;
> BSELInfo info = { .bsel_alloc = ACPI_PCIHP_BSEL_DEFAULT,
> .has_bridge_hotplug = has_bridge_hotplug };
> @@ -112,11 +112,8 @@ static void acpi_set_pci_info(bool has_bridge_hotplug)
> }
> bsel_is_set = true;
>
> - if (!host) {
> - return;
> - }
>
> - bus = PCI_HOST_BRIDGE(host)->bus;
> + bus = s->root;
> if (bus) {
> /* Scan all PCI buses. Set property to enable acpi based hotplug. */
> pci_for_each_bus_depth_first(bus, acpi_set_bsel, NULL, &info);
> @@ -266,7 +263,7 @@ static void acpi_pcihp_update(AcpiPciHpState *s)
>
> void acpi_pcihp_reset(AcpiPciHpState *s)
> {
> - acpi_set_pci_info(s->use_acpi_hotplug_bridge);
> + acpi_set_pci_info(s);
> acpi_pcihp_update(s);
> }
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (14 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 15/29] hw/i386/acpi-build: Use AcpiPciHpState::root in acpi_set_pci_info Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 9:19 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Eric Auger
` (12 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
ARM and acpi-index support.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- move to pci-bridge.c instead of pcihp.c (Igor)
---
include/hw/acpi/pci.h | 1 +
hw/acpi/pci-bridge.c | 54 +++++++++++++++++++++++++++++++++++++++++++
hw/i386/acpi-build.c | 53 ------------------------------------------
3 files changed, 55 insertions(+), 53 deletions(-)
diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
index 69bae95eac..05e72815c8 100644
--- a/include/hw/acpi/pci.h
+++ b/include/hw/acpi/pci.h
@@ -42,5 +42,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
void build_srat_generic_affinity_structures(GArray *table_data);
Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
+Aml *aml_pci_edsm(void);
#endif
diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c
index 7baa7034a1..be68a98c34 100644
--- a/hw/acpi/pci-bridge.c
+++ b/hw/acpi/pci-bridge.c
@@ -35,3 +35,57 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope)
}
}
}
+
+Aml *aml_pci_edsm(void)
+{
+ Aml *method, *ifctx;
+ Aml *zero = aml_int(0);
+ Aml *func = aml_arg(2);
+ Aml *ret = aml_local(0);
+ Aml *aidx = aml_local(1);
+ Aml *params = aml_arg(4);
+
+ method = aml_method("EDSM", 5, AML_SERIALIZED);
+
+ /* get supported functions */
+ ifctx = aml_if(aml_equal(func, zero));
+ {
+ /* 1: have supported functions */
+ /* 7: support for function 7 */
+ const uint8_t caps = 1 | BIT(7);
+ build_append_pci_dsm_func0_common(ifctx, ret);
+ aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ /* handle specific functions requests */
+ /*
+ * PCI Firmware Specification 3.1
+ * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
+ * Operating Systems
+ */
+ ifctx = aml_if(aml_equal(func, aml_int(7)));
+ {
+ Aml *pkg = aml_package(2);
+ aml_append(pkg, zero);
+ /* optional, if not impl. should return null string */
+ aml_append(pkg, aml_string("%s", ""));
+ aml_append(ifctx, aml_store(pkg, ret));
+
+ /*
+ * IASL is fine when initializing Package with computational data,
+ * however it makes guest unhappy /it fails to process such AML/.
+ * So use runtime assignment to set acpi-index after initializer
+ * to make OSPM happy.
+ */
+ aml_append(ifctx,
+ aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
+ aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
+ aml_append(ifctx, aml_return(ret));
+ }
+ aml_append(method, ifctx);
+
+ return method;
+}
+
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index fe8bc62c03..6cf623392e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -338,59 +338,6 @@ build_facs(GArray *table_data)
g_array_append_vals(table_data, reserved, 40); /* Reserved */
}
-static Aml *aml_pci_edsm(void)
-{
- Aml *method, *ifctx;
- Aml *zero = aml_int(0);
- Aml *func = aml_arg(2);
- Aml *ret = aml_local(0);
- Aml *aidx = aml_local(1);
- Aml *params = aml_arg(4);
-
- method = aml_method("EDSM", 5, AML_SERIALIZED);
-
- /* get supported functions */
- ifctx = aml_if(aml_equal(func, zero));
- {
- /* 1: have supported functions */
- /* 7: support for function 7 */
- const uint8_t caps = 1 | BIT(7);
- build_append_pci_dsm_func0_common(ifctx, ret);
- aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
- aml_append(ifctx, aml_return(ret));
- }
- aml_append(method, ifctx);
-
- /* handle specific functions requests */
- /*
- * PCI Firmware Specification 3.1
- * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
- * Operating Systems
- */
- ifctx = aml_if(aml_equal(func, aml_int(7)));
- {
- Aml *pkg = aml_package(2);
- aml_append(pkg, zero);
- /* optional, if not impl. should return null string */
- aml_append(pkg, aml_string("%s", ""));
- aml_append(ifctx, aml_store(pkg, ret));
-
- /*
- * IASL is fine when initializing Package with computational data,
- * however it makes guest unhappy /it fails to process such AML/.
- * So use runtime assignment to set acpi-index after initializer
- * to make OSPM happy.
- */
- aml_append(ifctx,
- aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
- aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
- aml_append(ifctx, aml_return(ret));
- }
- aml_append(method, ifctx);
-
- return method;
-}
-
/*
* build_prt - Define interrupt routing rules
*
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-06-16 9:46 ` [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place Eric Auger
@ 2025-06-20 9:19 ` Jonathan Cameron via
2025-06-20 9:28 ` Jonathan Cameron via
2025-06-20 12:27 ` Igor Mammedov
0 siblings, 2 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 9:19 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:45 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
> ARM and acpi-index support.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
A request for a bit of documentation inline. aml_pci_edsm() sounds
like we should be able to grep the spec for edsm and find it but
that's just internal method naming in qemu.
More interesting is I don't think this will ever be called as
the kernel has no idea how to call it and unlike on x86 the
blobs don't show wrapping the call in a _DSM() (see aml_pci_static_endpoint_dsm())
Did EDSM usage get dropped as this set evolved leaving this behind?
>
> ---
>
> v2 -> v3:
> - move to pci-bridge.c instead of pcihp.c (Igor)
> ---
> include/hw/acpi/pci.h | 1 +
> hw/acpi/pci-bridge.c | 54 +++++++++++++++++++++++++++++++++++++++++++
> hw/i386/acpi-build.c | 53 ------------------------------------------
> 3 files changed, 55 insertions(+), 53 deletions(-)
>
> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> index 69bae95eac..05e72815c8 100644
> --- a/include/hw/acpi/pci.h
> +++ b/include/hw/acpi/pci.h
> @@ -42,5 +42,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
> void build_srat_generic_affinity_structures(GArray *table_data);
>
> Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
> +Aml *aml_pci_edsm(void);
>
> #endif
> diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c
> index 7baa7034a1..be68a98c34 100644
> --- a/hw/acpi/pci-bridge.c
> +++ b/hw/acpi/pci-bridge.c
> @@ -35,3 +35,57 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope)
> }
> }
> }
> +
> +Aml *aml_pci_edsm(void)
Can we have some comments, or a more descriptive name than
the resulting method name? There is stuff in the function obviously
that associates it with the naming DSM but given this is moving to
generic code maybe it needs a brief intro comment?
> +{
> + Aml *method, *ifctx;
> + Aml *zero = aml_int(0);
> + Aml *func = aml_arg(2);
> + Aml *ret = aml_local(0);
> + Aml *aidx = aml_local(1);
> + Aml *params = aml_arg(4);
> +
> + method = aml_method("EDSM", 5, AML_SERIALIZED);
> +
> + /* get supported functions */
> + ifctx = aml_if(aml_equal(func, zero));
> + {
> + /* 1: have supported functions */
> + /* 7: support for function 7 */
> + const uint8_t caps = 1 | BIT(7);
> + build_append_pci_dsm_func0_common(ifctx, ret);
> + aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> + aml_append(ifctx, aml_return(ret));
> + }
> + aml_append(method, ifctx);
> +
> + /* handle specific functions requests */
> + /*
> + * PCI Firmware Specification 3.1
> + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> + * Operating Systems
> + */
> + ifctx = aml_if(aml_equal(func, aml_int(7)));
> + {
> + Aml *pkg = aml_package(2);
> + aml_append(pkg, zero);
> + /* optional, if not impl. should return null string */
> + aml_append(pkg, aml_string("%s", ""));
> + aml_append(ifctx, aml_store(pkg, ret));
> +
> + /*
> + * IASL is fine when initializing Package with computational data,
> + * however it makes guest unhappy /it fails to process such AML/.
> + * So use runtime assignment to set acpi-index after initializer
> + * to make OSPM happy.
> + */
> + aml_append(ifctx,
> + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> + aml_append(ifctx, aml_return(ret));
> + }
> + aml_append(method, ifctx);
> +
> + return method;
> +}
> +
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index fe8bc62c03..6cf623392e 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -338,59 +338,6 @@ build_facs(GArray *table_data)
> g_array_append_vals(table_data, reserved, 40); /* Reserved */
> }
>
> -static Aml *aml_pci_edsm(void)
> -{
> - Aml *method, *ifctx;
> - Aml *zero = aml_int(0);
> - Aml *func = aml_arg(2);
> - Aml *ret = aml_local(0);
> - Aml *aidx = aml_local(1);
> - Aml *params = aml_arg(4);
> -
> - method = aml_method("EDSM", 5, AML_SERIALIZED);
> -
> - /* get supported functions */
> - ifctx = aml_if(aml_equal(func, zero));
> - {
> - /* 1: have supported functions */
> - /* 7: support for function 7 */
> - const uint8_t caps = 1 | BIT(7);
> - build_append_pci_dsm_func0_common(ifctx, ret);
> - aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> - aml_append(ifctx, aml_return(ret));
> - }
> - aml_append(method, ifctx);
> -
> - /* handle specific functions requests */
> - /*
> - * PCI Firmware Specification 3.1
> - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> - * Operating Systems
> - */
> - ifctx = aml_if(aml_equal(func, aml_int(7)));
> - {
> - Aml *pkg = aml_package(2);
> - aml_append(pkg, zero);
> - /* optional, if not impl. should return null string */
> - aml_append(pkg, aml_string("%s", ""));
> - aml_append(ifctx, aml_store(pkg, ret));
> -
> - /*
> - * IASL is fine when initializing Package with computational data,
> - * however it makes guest unhappy /it fails to process such AML/.
> - * So use runtime assignment to set acpi-index after initializer
> - * to make OSPM happy.
> - */
> - aml_append(ifctx,
> - aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> - aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> - aml_append(ifctx, aml_return(ret));
> - }
> - aml_append(method, ifctx);
> -
> - return method;
> -}
> -
> /*
> * build_prt - Define interrupt routing rules
> *
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-06-20 9:19 ` Jonathan Cameron via
@ 2025-06-20 9:28 ` Jonathan Cameron via
2025-06-20 12:27 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 9:28 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 20 Jun 2025 10:19:36 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 16 Jun 2025 11:46:45 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
> > ARM and acpi-index support.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> A request for a bit of documentation inline. aml_pci_edsm() sounds
> like we should be able to grep the spec for edsm and find it but
> that's just internal method naming in qemu.
>
>
> More interesting is I don't think this will ever be called as
> the kernel has no idea how to call it and unlike on x86 the
> blobs don't show wrapping the call in a _DSM() (see aml_pci_static_endpoint_dsm())
>
> Did EDSM usage get dropped as this set evolved leaving this behind?
Doh. You moved and use build_append_pci_bus_devices().
So this is fine. Ignore me.
I'd still like a comment though - particularly as it turns up in the blobs
with no callers because the examples don't use it yet.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
>
>
> >
> > ---
> >
> > v2 -> v3:
> > - move to pci-bridge.c instead of pcihp.c (Igor)
> > ---
> > include/hw/acpi/pci.h | 1 +
> > hw/acpi/pci-bridge.c | 54 +++++++++++++++++++++++++++++++++++++++++++
> > hw/i386/acpi-build.c | 53 ------------------------------------------
> > 3 files changed, 55 insertions(+), 53 deletions(-)
> >
> > diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> > index 69bae95eac..05e72815c8 100644
> > --- a/include/hw/acpi/pci.h
> > +++ b/include/hw/acpi/pci.h
> > @@ -42,5 +42,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
> > void build_srat_generic_affinity_structures(GArray *table_data);
> >
> > Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
> > +Aml *aml_pci_edsm(void);
> >
> > #endif
> > diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c
> > index 7baa7034a1..be68a98c34 100644
> > --- a/hw/acpi/pci-bridge.c
> > +++ b/hw/acpi/pci-bridge.c
> > @@ -35,3 +35,57 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope)
> > }
> > }
> > }
> > +
> > +Aml *aml_pci_edsm(void)
>
> Can we have some comments, or a more descriptive name than
> the resulting method name? There is stuff in the function obviously
> that associates it with the naming DSM but given this is moving to
> generic code maybe it needs a brief intro comment?
>
>
> > +{
> > + Aml *method, *ifctx;
> > + Aml *zero = aml_int(0);
> > + Aml *func = aml_arg(2);
> > + Aml *ret = aml_local(0);
> > + Aml *aidx = aml_local(1);
> > + Aml *params = aml_arg(4);
> > +
> > + method = aml_method("EDSM", 5, AML_SERIALIZED);
> > +
> > + /* get supported functions */
> > + ifctx = aml_if(aml_equal(func, zero));
> > + {
> > + /* 1: have supported functions */
> > + /* 7: support for function 7 */
> > + const uint8_t caps = 1 | BIT(7);
> > + build_append_pci_dsm_func0_common(ifctx, ret);
> > + aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> > + aml_append(ifctx, aml_return(ret));
> > + }
> > + aml_append(method, ifctx);
> > +
> > + /* handle specific functions requests */
> > + /*
> > + * PCI Firmware Specification 3.1
> > + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> > + * Operating Systems
> > + */
> > + ifctx = aml_if(aml_equal(func, aml_int(7)));
> > + {
> > + Aml *pkg = aml_package(2);
> > + aml_append(pkg, zero);
> > + /* optional, if not impl. should return null string */
> > + aml_append(pkg, aml_string("%s", ""));
> > + aml_append(ifctx, aml_store(pkg, ret));
> > +
> > + /*
> > + * IASL is fine when initializing Package with computational data,
> > + * however it makes guest unhappy /it fails to process such AML/.
> > + * So use runtime assignment to set acpi-index after initializer
> > + * to make OSPM happy.
> > + */
> > + aml_append(ifctx,
> > + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> > + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> > + aml_append(ifctx, aml_return(ret));
> > + }
> > + aml_append(method, ifctx);
> > +
> > + return method;
> > +}
> > +
> > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > index fe8bc62c03..6cf623392e 100644
> > --- a/hw/i386/acpi-build.c
> > +++ b/hw/i386/acpi-build.c
> > @@ -338,59 +338,6 @@ build_facs(GArray *table_data)
> > g_array_append_vals(table_data, reserved, 40); /* Reserved */
> > }
> >
> > -static Aml *aml_pci_edsm(void)
> > -{
> > - Aml *method, *ifctx;
> > - Aml *zero = aml_int(0);
> > - Aml *func = aml_arg(2);
> > - Aml *ret = aml_local(0);
> > - Aml *aidx = aml_local(1);
> > - Aml *params = aml_arg(4);
> > -
> > - method = aml_method("EDSM", 5, AML_SERIALIZED);
> > -
> > - /* get supported functions */
> > - ifctx = aml_if(aml_equal(func, zero));
> > - {
> > - /* 1: have supported functions */
> > - /* 7: support for function 7 */
> > - const uint8_t caps = 1 | BIT(7);
> > - build_append_pci_dsm_func0_common(ifctx, ret);
> > - aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> > - aml_append(ifctx, aml_return(ret));
> > - }
> > - aml_append(method, ifctx);
> > -
> > - /* handle specific functions requests */
> > - /*
> > - * PCI Firmware Specification 3.1
> > - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> > - * Operating Systems
> > - */
> > - ifctx = aml_if(aml_equal(func, aml_int(7)));
> > - {
> > - Aml *pkg = aml_package(2);
> > - aml_append(pkg, zero);
> > - /* optional, if not impl. should return null string */
> > - aml_append(pkg, aml_string("%s", ""));
> > - aml_append(ifctx, aml_store(pkg, ret));
> > -
> > - /*
> > - * IASL is fine when initializing Package with computational data,
> > - * however it makes guest unhappy /it fails to process such AML/.
> > - * So use runtime assignment to set acpi-index after initializer
> > - * to make OSPM happy.
> > - */
> > - aml_append(ifctx,
> > - aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> > - aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> > - aml_append(ifctx, aml_return(ret));
> > - }
> > - aml_append(method, ifctx);
> > -
> > - return method;
> > -}
> > -
> > /*
> > * build_prt - Define interrupt routing rules
> > *
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-06-20 9:19 ` Jonathan Cameron via
2025-06-20 9:28 ` Jonathan Cameron via
@ 2025-06-20 12:27 ` Igor Mammedov
2025-06-24 16:05 ` Eric Auger
1 sibling, 1 reply; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:27 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 20 Jun 2025 10:19:36 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 16 Jun 2025 11:46:45 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
> > ARM and acpi-index support.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> A request for a bit of documentation inline. aml_pci_edsm() sounds
> like we should be able to grep the spec for edsm and find it but
> that's just internal method naming in qemu.
agree, aml_ prefix is typically reserved for ACPI spec items.
perhaps rename it to follow build_ prefix scheme?
>
>
> More interesting is I don't think this will ever be called as
> the kernel has no idea how to call it and unlike on x86 the
> blobs don't show wrapping the call in a _DSM() (see aml_pci_static_endpoint_dsm())
>
> Did EDSM usage get dropped as this set evolved leaving this behind?
>
>
>
> >
> > ---
> >
> > v2 -> v3:
> > - move to pci-bridge.c instead of pcihp.c (Igor)
> > ---
> > include/hw/acpi/pci.h | 1 +
> > hw/acpi/pci-bridge.c | 54 +++++++++++++++++++++++++++++++++++++++++++
> > hw/i386/acpi-build.c | 53 ------------------------------------------
> > 3 files changed, 55 insertions(+), 53 deletions(-)
> >
> > diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
> > index 69bae95eac..05e72815c8 100644
> > --- a/include/hw/acpi/pci.h
> > +++ b/include/hw/acpi/pci.h
> > @@ -42,5 +42,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
> > void build_srat_generic_affinity_structures(GArray *table_data);
> >
> > Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
> > +Aml *aml_pci_edsm(void);
> >
> > #endif
> > diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c
> > index 7baa7034a1..be68a98c34 100644
> > --- a/hw/acpi/pci-bridge.c
> > +++ b/hw/acpi/pci-bridge.c
> > @@ -35,3 +35,57 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope)
> > }
> > }
> > }
> > +
> > +Aml *aml_pci_edsm(void)
>
> Can we have some comments, or a more descriptive name than
> the resulting method name? There is stuff in the function obviously
> that associates it with the naming DSM but given this is moving to
> generic code maybe it needs a brief intro comment?
>
>
> > +{
> > + Aml *method, *ifctx;
> > + Aml *zero = aml_int(0);
> > + Aml *func = aml_arg(2);
> > + Aml *ret = aml_local(0);
> > + Aml *aidx = aml_local(1);
> > + Aml *params = aml_arg(4);
> > +
> > + method = aml_method("EDSM", 5, AML_SERIALIZED);
> > +
> > + /* get supported functions */
> > + ifctx = aml_if(aml_equal(func, zero));
> > + {
> > + /* 1: have supported functions */
> > + /* 7: support for function 7 */
> > + const uint8_t caps = 1 | BIT(7);
> > + build_append_pci_dsm_func0_common(ifctx, ret);
> > + aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> > + aml_append(ifctx, aml_return(ret));
> > + }
> > + aml_append(method, ifctx);
> > +
> > + /* handle specific functions requests */
> > + /*
> > + * PCI Firmware Specification 3.1
> > + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> > + * Operating Systems
> > + */
> > + ifctx = aml_if(aml_equal(func, aml_int(7)));
> > + {
> > + Aml *pkg = aml_package(2);
> > + aml_append(pkg, zero);
> > + /* optional, if not impl. should return null string */
> > + aml_append(pkg, aml_string("%s", ""));
> > + aml_append(ifctx, aml_store(pkg, ret));
> > +
> > + /*
> > + * IASL is fine when initializing Package with computational data,
> > + * however it makes guest unhappy /it fails to process such AML/.
> > + * So use runtime assignment to set acpi-index after initializer
> > + * to make OSPM happy.
> > + */
> > + aml_append(ifctx,
> > + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> > + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> > + aml_append(ifctx, aml_return(ret));
> > + }
> > + aml_append(method, ifctx);
> > +
> > + return method;
> > +}
> > +
> > diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> > index fe8bc62c03..6cf623392e 100644
> > --- a/hw/i386/acpi-build.c
> > +++ b/hw/i386/acpi-build.c
> > @@ -338,59 +338,6 @@ build_facs(GArray *table_data)
> > g_array_append_vals(table_data, reserved, 40); /* Reserved */
> > }
> >
> > -static Aml *aml_pci_edsm(void)
> > -{
> > - Aml *method, *ifctx;
> > - Aml *zero = aml_int(0);
> > - Aml *func = aml_arg(2);
> > - Aml *ret = aml_local(0);
> > - Aml *aidx = aml_local(1);
> > - Aml *params = aml_arg(4);
> > -
> > - method = aml_method("EDSM", 5, AML_SERIALIZED);
> > -
> > - /* get supported functions */
> > - ifctx = aml_if(aml_equal(func, zero));
> > - {
> > - /* 1: have supported functions */
> > - /* 7: support for function 7 */
> > - const uint8_t caps = 1 | BIT(7);
> > - build_append_pci_dsm_func0_common(ifctx, ret);
> > - aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
> > - aml_append(ifctx, aml_return(ret));
> > - }
> > - aml_append(method, ifctx);
> > -
> > - /* handle specific functions requests */
> > - /*
> > - * PCI Firmware Specification 3.1
> > - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
> > - * Operating Systems
> > - */
> > - ifctx = aml_if(aml_equal(func, aml_int(7)));
> > - {
> > - Aml *pkg = aml_package(2);
> > - aml_append(pkg, zero);
> > - /* optional, if not impl. should return null string */
> > - aml_append(pkg, aml_string("%s", ""));
> > - aml_append(ifctx, aml_store(pkg, ret));
> > -
> > - /*
> > - * IASL is fine when initializing Package with computational data,
> > - * however it makes guest unhappy /it fails to process such AML/.
> > - * So use runtime assignment to set acpi-index after initializer
> > - * to make OSPM happy.
> > - */
> > - aml_append(ifctx,
> > - aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
> > - aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
> > - aml_append(ifctx, aml_return(ret));
> > - }
> > - aml_append(method, ifctx);
> > -
> > - return method;
> > -}
> > -
> > /*
> > * build_prt - Define interrupt routing rules
> > *
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place
2025-06-20 12:27 ` Igor Mammedov
@ 2025-06-24 16:05 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-24 16:05 UTC (permalink / raw)
To: Igor Mammedov, Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Igor, Jonathan,
On 6/20/25 2:27 PM, Igor Mammedov wrote:
> On Fri, 20 Jun 2025 10:19:36 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
>> On Mon, 16 Jun 2025 11:46:45 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> Move aml_pci_edsm to pci-bridge.c since we want to reuse that for
>>> ARM and acpi-index support.
>>>
>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> A request for a bit of documentation inline. aml_pci_edsm() sounds
>> like we should be able to grep the spec for edsm and find it but
>> that's just internal method naming in qemu.
> agree, aml_ prefix is typically reserved for ACPI spec items.
renamed into build_pci_bridge_edsm()
Thanks
Eric
>
> perhaps rename it to follow build_ prefix scheme?
>
>>
>> More interesting is I don't think this will ever be called as
>> the kernel has no idea how to call it and unlike on x86 the
>> blobs don't show wrapping the call in a _DSM() (see aml_pci_static_endpoint_dsm())
>>
>> Did EDSM usage get dropped as this set evolved leaving this behind?
>>
>>
>>
>>> ---
>>>
>>> v2 -> v3:
>>> - move to pci-bridge.c instead of pcihp.c (Igor)
>>> ---
>>> include/hw/acpi/pci.h | 1 +
>>> hw/acpi/pci-bridge.c | 54 +++++++++++++++++++++++++++++++++++++++++++
>>> hw/i386/acpi-build.c | 53 ------------------------------------------
>>> 3 files changed, 55 insertions(+), 53 deletions(-)
>>>
>>> diff --git a/include/hw/acpi/pci.h b/include/hw/acpi/pci.h
>>> index 69bae95eac..05e72815c8 100644
>>> --- a/include/hw/acpi/pci.h
>>> +++ b/include/hw/acpi/pci.h
>>> @@ -42,5 +42,6 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope);
>>> void build_srat_generic_affinity_structures(GArray *table_data);
>>>
>>> Aml *build_pci_host_bridge_osc_method(bool enable_native_pcie_hotplug);
>>> +Aml *aml_pci_edsm(void);
>>>
>>> #endif
>>> diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c
>>> index 7baa7034a1..be68a98c34 100644
>>> --- a/hw/acpi/pci-bridge.c
>>> +++ b/hw/acpi/pci-bridge.c
>>> @@ -35,3 +35,57 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope)
>>> }
>>> }
>>> }
>>> +
>>> +Aml *aml_pci_edsm(void)
>> Can we have some comments, or a more descriptive name than
>> the resulting method name? There is stuff in the function obviously
>> that associates it with the naming DSM but given this is moving to
>> generic code maybe it needs a brief intro comment?
>>
>>
>>> +{
>>> + Aml *method, *ifctx;
>>> + Aml *zero = aml_int(0);
>>> + Aml *func = aml_arg(2);
>>> + Aml *ret = aml_local(0);
>>> + Aml *aidx = aml_local(1);
>>> + Aml *params = aml_arg(4);
>>> +
>>> + method = aml_method("EDSM", 5, AML_SERIALIZED);
>>> +
>>> + /* get supported functions */
>>> + ifctx = aml_if(aml_equal(func, zero));
>>> + {
>>> + /* 1: have supported functions */
>>> + /* 7: support for function 7 */
>>> + const uint8_t caps = 1 | BIT(7);
>>> + build_append_pci_dsm_func0_common(ifctx, ret);
>>> + aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
>>> + aml_append(ifctx, aml_return(ret));
>>> + }
>>> + aml_append(method, ifctx);
>>> +
>>> + /* handle specific functions requests */
>>> + /*
>>> + * PCI Firmware Specification 3.1
>>> + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
>>> + * Operating Systems
>>> + */
>>> + ifctx = aml_if(aml_equal(func, aml_int(7)));
>>> + {
>>> + Aml *pkg = aml_package(2);
>>> + aml_append(pkg, zero);
>>> + /* optional, if not impl. should return null string */
>>> + aml_append(pkg, aml_string("%s", ""));
>>> + aml_append(ifctx, aml_store(pkg, ret));
>>> +
>>> + /*
>>> + * IASL is fine when initializing Package with computational data,
>>> + * however it makes guest unhappy /it fails to process such AML/.
>>> + * So use runtime assignment to set acpi-index after initializer
>>> + * to make OSPM happy.
>>> + */
>>> + aml_append(ifctx,
>>> + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
>>> + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
>>> + aml_append(ifctx, aml_return(ret));
>>> + }
>>> + aml_append(method, ifctx);
>>> +
>>> + return method;
>>> +}
>>> +
>>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
>>> index fe8bc62c03..6cf623392e 100644
>>> --- a/hw/i386/acpi-build.c
>>> +++ b/hw/i386/acpi-build.c
>>> @@ -338,59 +338,6 @@ build_facs(GArray *table_data)
>>> g_array_append_vals(table_data, reserved, 40); /* Reserved */
>>> }
>>>
>>> -static Aml *aml_pci_edsm(void)
>>> -{
>>> - Aml *method, *ifctx;
>>> - Aml *zero = aml_int(0);
>>> - Aml *func = aml_arg(2);
>>> - Aml *ret = aml_local(0);
>>> - Aml *aidx = aml_local(1);
>>> - Aml *params = aml_arg(4);
>>> -
>>> - method = aml_method("EDSM", 5, AML_SERIALIZED);
>>> -
>>> - /* get supported functions */
>>> - ifctx = aml_if(aml_equal(func, zero));
>>> - {
>>> - /* 1: have supported functions */
>>> - /* 7: support for function 7 */
>>> - const uint8_t caps = 1 | BIT(7);
>>> - build_append_pci_dsm_func0_common(ifctx, ret);
>>> - aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero)));
>>> - aml_append(ifctx, aml_return(ret));
>>> - }
>>> - aml_append(method, ifctx);
>>> -
>>> - /* handle specific functions requests */
>>> - /*
>>> - * PCI Firmware Specification 3.1
>>> - * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under
>>> - * Operating Systems
>>> - */
>>> - ifctx = aml_if(aml_equal(func, aml_int(7)));
>>> - {
>>> - Aml *pkg = aml_package(2);
>>> - aml_append(pkg, zero);
>>> - /* optional, if not impl. should return null string */
>>> - aml_append(pkg, aml_string("%s", ""));
>>> - aml_append(ifctx, aml_store(pkg, ret));
>>> -
>>> - /*
>>> - * IASL is fine when initializing Package with computational data,
>>> - * however it makes guest unhappy /it fails to process such AML/.
>>> - * So use runtime assignment to set acpi-index after initializer
>>> - * to make OSPM happy.
>>> - */
>>> - aml_append(ifctx,
>>> - aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx));
>>> - aml_append(ifctx, aml_store(aidx, aml_index(ret, zero)));
>>> - aml_append(ifctx, aml_return(ret));
>>> - }
>>> - aml_append(method, ifctx);
>>> -
>>> - return method;
>>> -}
>>> -
>>> /*
>>> * build_prt - Define interrupt routing rules
>>> *
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (15 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 16/29] hw/i386/acpi-build: Move aml_pci_edsm to a generic place Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 9:35 ` Jonathan Cameron via
2025-06-20 12:33 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 18/29] hw/acpi/ged: Add a bus link property Eric Auger
` (11 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Modify the DSDT ACPI table to enable ACPI PCI hotplug.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
- use cihp_state->use_acpi_hotplug_bridge
---
include/hw/acpi/pcihp.h | 2 ++
include/hw/arm/virt.h | 1 +
hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
hw/arm/virt.c | 2 ++
hw/arm/Kconfig | 2 ++
5 files changed, 29 insertions(+)
diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
index 5506a58862..9ff548650b 100644
--- a/include/hw/acpi/pcihp.h
+++ b/include/hw/acpi/pcihp.h
@@ -38,6 +38,8 @@
#define ACPI_PCIHP_SEJ_BASE 0x8
#define ACPI_PCIHP_BNMR_BASE 0x10
+#define ACPI_PCIHP_SIZE 0x0018
+
typedef struct AcpiPciHpPciStatus {
uint32_t up;
uint32_t down;
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 9a1b0f53d2..0ed2e6b732 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -79,6 +79,7 @@ enum {
VIRT_ACPI_GED,
VIRT_NVDIMM_ACPI,
VIRT_PVTIME,
+ VIRT_ACPI_PCIHP,
VIRT_LOWMEMMAP_LAST,
};
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index d7547c8d3b..a2e58288f8 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -34,6 +34,7 @@
#include "hw/core/cpu.h"
#include "hw/acpi/acpi-defs.h"
#include "hw/acpi/acpi.h"
+#include "hw/acpi/pcihp.h"
#include "hw/nvram/fw_cfg_acpi.h"
#include "hw/acpi/bios-linker-loader.h"
#include "hw/acpi/aml-build.h"
@@ -809,6 +810,8 @@ static void
build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
{
VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
+ AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
+ AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
Aml *scope, *dsdt;
MachineState *ms = MACHINE(vms);
const MemMapEntry *memmap = vms->memmap;
@@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
aml_append(dsdt, scope);
+ if (pcihp_state->use_acpi_hotplug_bridge) {
+ Aml *pci0_scope = aml_scope("\\_SB.PCI0");
+
+ aml_append(pci0_scope, aml_pci_edsm());
+ build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
+ memmap[VIRT_ACPI_PCIHP].base);
+ build_append_pcihp_resources(pci0_scope,
+ memmap[VIRT_ACPI_PCIHP].base,
+ memmap[VIRT_ACPI_PCIHP].size);
+
+ /* Scan all PCI buses. Generate tables to support hotplug. */
+ build_append_pci_bus_devices(pci0_scope, vms->bus);
+ if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
+ build_append_pcihp_slots(pci0_scope, vms->bus);
+ }
+ build_append_notification_callback(pci0_scope, vms->bus);
+ aml_append(dsdt, pci0_scope);
+ }
+
/* copy AML table into ACPI tables blob */
g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9a6cd085a3..08bd808499 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -75,6 +75,7 @@
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
#include "hw/acpi/acpi.h"
+#include "hw/acpi/pcihp.h"
#include "target/arm/cpu-qom.h"
#include "target/arm/internals.h"
#include "target/arm/multiprocessing.h"
@@ -183,6 +184,7 @@ static const MemMapEntry base_memmap[] = {
[VIRT_NVDIMM_ACPI] = { 0x09090000, NVDIMM_ACPI_IO_LEN},
[VIRT_PVTIME] = { 0x090a0000, 0x00010000 },
[VIRT_SECURE_GPIO] = { 0x090b0000, 0x00001000 },
+ [VIRT_ACPI_PCIHP] = { 0x090c0000, ACPI_PCIHP_SIZE },
[VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index f543d944c3..dee4d6dd25 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -34,6 +34,8 @@ config ARM_VIRT
select ACPI_HW_REDUCED
select ACPI_APEI
select ACPI_VIOT
+ select ACPI_PCIHP
+ select ACPI_PCI_BRIDGE
select VIRTIO_MEM_SUPPORTED
select ACPI_CXL
select ACPI_HMAT
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-16 9:46 ` [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Eric Auger
@ 2025-06-20 9:35 ` Jonathan Cameron via
2025-06-20 12:38 ` Igor Mammedov
2025-06-20 12:33 ` Igor Mammedov
1 sibling, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 9:35 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:46 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Modify the DSDT ACPI table to enable ACPI PCI hotplug.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
> v2 -> v3:
> - use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
> - use cihp_state->use_acpi_hotplug_bridge
pcihp_state
Takes a bit of searching to find the various bits of the
same support on x86 but this seems to match up.
Exactly when things are built does vary but not I think
in a way that matters. e.g. I think on x86 the
EDSM stuff is built whether or not we have pcihp enabled
whereas here you've made it conditional on using acpi
hp. Perhaps a tiny bit more description on that would be
useful if you do a v4?
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> include/hw/acpi/pcihp.h | 2 ++
> include/hw/arm/virt.h | 1 +
> hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
> hw/arm/virt.c | 2 ++
> hw/arm/Kconfig | 2 ++
> 5 files changed, 29 insertions(+)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 5506a58862..9ff548650b 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -38,6 +38,8 @@
> #define ACPI_PCIHP_SEJ_BASE 0x8
> #define ACPI_PCIHP_BNMR_BASE 0x10
>
> +#define ACPI_PCIHP_SIZE 0x0018
> +
> typedef struct AcpiPciHpPciStatus {
> uint32_t up;
> uint32_t down;
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 9a1b0f53d2..0ed2e6b732 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -79,6 +79,7 @@ enum {
> VIRT_ACPI_GED,
> VIRT_NVDIMM_ACPI,
> VIRT_PVTIME,
> + VIRT_ACPI_PCIHP,
> VIRT_LOWMEMMAP_LAST,
> };
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index d7547c8d3b..a2e58288f8 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -34,6 +34,7 @@
> #include "hw/core/cpu.h"
> #include "hw/acpi/acpi-defs.h"
> #include "hw/acpi/acpi.h"
> +#include "hw/acpi/pcihp.h"
> #include "hw/nvram/fw_cfg_acpi.h"
> #include "hw/acpi/bios-linker-loader.h"
> #include "hw/acpi/aml-build.h"
> @@ -809,6 +810,8 @@ static void
> build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> {
> VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
> Aml *scope, *dsdt;
> MachineState *ms = MACHINE(vms);
> const MemMapEntry *memmap = vms->memmap;
> @@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>
> aml_append(dsdt, scope);
>
> + if (pcihp_state->use_acpi_hotplug_bridge) {
> + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
> +
> + aml_append(pci0_scope, aml_pci_edsm());
> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
> + memmap[VIRT_ACPI_PCIHP].base);
> + build_append_pcihp_resources(pci0_scope,
> + memmap[VIRT_ACPI_PCIHP].base,
> + memmap[VIRT_ACPI_PCIHP].size);
> +
> + /* Scan all PCI buses. Generate tables to support hotplug. */
> + build_append_pci_bus_devices(pci0_scope, vms->bus);
> + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
> + build_append_pcihp_slots(pci0_scope, vms->bus);
> + }
> + build_append_notification_callback(pci0_scope, vms->bus);
> + aml_append(dsdt, pci0_scope);
> + }
> +
> /* copy AML table into ACPI tables blob */
> g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-20 9:35 ` Jonathan Cameron via
@ 2025-06-20 12:38 ` Igor Mammedov
2025-06-20 16:13 ` Jonathan Cameron via
2025-06-24 15:51 ` Eric Auger
0 siblings, 2 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:38 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 20 Jun 2025 10:35:38 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 16 Jun 2025 11:46:46 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > Modify the DSDT ACPI table to enable ACPI PCI hotplug.
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> >
> > ---
> > v2 -> v3:
> > - use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
> > - use cihp_state->use_acpi_hotplug_bridge
>
> pcihp_state
>
> Takes a bit of searching to find the various bits of the
> same support on x86 but this seems to match up.
> Exactly when things are built does vary but not I think
> in a way that matters. e.g. I think on x86 the
> EDSM stuff is built whether or not we have pcihp enabled
> whereas here you've made it conditional on using acpi
> hp. Perhaps a tiny bit more description on that would be
> useful if you do a v4?
edsm should be built regardless of pcihp
(well intention was there, whether I messed it up or not I don't know)
idea is that non hotplug ports can have a static acpi-index,
so it doesn't depend on pcihp.
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
>
> > ---
> > include/hw/acpi/pcihp.h | 2 ++
> > include/hw/arm/virt.h | 1 +
> > hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
> > hw/arm/virt.c | 2 ++
> > hw/arm/Kconfig | 2 ++
> > 5 files changed, 29 insertions(+)
> >
> > diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> > index 5506a58862..9ff548650b 100644
> > --- a/include/hw/acpi/pcihp.h
> > +++ b/include/hw/acpi/pcihp.h
> > @@ -38,6 +38,8 @@
> > #define ACPI_PCIHP_SEJ_BASE 0x8
> > #define ACPI_PCIHP_BNMR_BASE 0x10
> >
> > +#define ACPI_PCIHP_SIZE 0x0018
> > +
> > typedef struct AcpiPciHpPciStatus {
> > uint32_t up;
> > uint32_t down;
> > diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> > index 9a1b0f53d2..0ed2e6b732 100644
> > --- a/include/hw/arm/virt.h
> > +++ b/include/hw/arm/virt.h
> > @@ -79,6 +79,7 @@ enum {
> > VIRT_ACPI_GED,
> > VIRT_NVDIMM_ACPI,
> > VIRT_PVTIME,
> > + VIRT_ACPI_PCIHP,
> > VIRT_LOWMEMMAP_LAST,
> > };
> >
> > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > index d7547c8d3b..a2e58288f8 100644
> > --- a/hw/arm/virt-acpi-build.c
> > +++ b/hw/arm/virt-acpi-build.c
> > @@ -34,6 +34,7 @@
> > #include "hw/core/cpu.h"
> > #include "hw/acpi/acpi-defs.h"
> > #include "hw/acpi/acpi.h"
> > +#include "hw/acpi/pcihp.h"
> > #include "hw/nvram/fw_cfg_acpi.h"
> > #include "hw/acpi/bios-linker-loader.h"
> > #include "hw/acpi/aml-build.h"
> > @@ -809,6 +810,8 @@ static void
> > build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> > {
> > VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
> > + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> > + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
> > Aml *scope, *dsdt;
> > MachineState *ms = MACHINE(vms);
> > const MemMapEntry *memmap = vms->memmap;
> > @@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> >
> > aml_append(dsdt, scope);
> >
> > + if (pcihp_state->use_acpi_hotplug_bridge) {
> > + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
> > +
> > + aml_append(pci0_scope, aml_pci_edsm());
> > + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
> > + memmap[VIRT_ACPI_PCIHP].base);
> > + build_append_pcihp_resources(pci0_scope,
> > + memmap[VIRT_ACPI_PCIHP].base,
> > + memmap[VIRT_ACPI_PCIHP].size);
> > +
> > + /* Scan all PCI buses. Generate tables to support hotplug. */
> > + build_append_pci_bus_devices(pci0_scope, vms->bus);
> > + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
> > + build_append_pcihp_slots(pci0_scope, vms->bus);
> > + }
> > + build_append_notification_callback(pci0_scope, vms->bus);
> > + aml_append(dsdt, pci0_scope);
> > + }
> > +
> > /* copy AML table into ACPI tables blob */
> > g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
> >
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-20 12:38 ` Igor Mammedov
@ 2025-06-20 16:13 ` Jonathan Cameron via
2025-06-25 15:23 ` Eric Auger
2025-06-24 15:51 ` Eric Auger
1 sibling, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 16:13 UTC (permalink / raw)
To: Igor Mammedov
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 20 Jun 2025 14:38:22 +0200
Igor Mammedov <imammedo@redhat.com> wrote:
> On Fri, 20 Jun 2025 10:35:38 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
> > On Mon, 16 Jun 2025 11:46:46 +0200
> > Eric Auger <eric.auger@redhat.com> wrote:
> >
> > > Modify the DSDT ACPI table to enable ACPI PCI hotplug.
> > >
> > > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > >
> > > ---
> > > v2 -> v3:
> > > - use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
> > > - use cihp_state->use_acpi_hotplug_bridge
> >
> > pcihp_state
> >
> > Takes a bit of searching to find the various bits of the
> > same support on x86 but this seems to match up.
> > Exactly when things are built does vary but not I think
> > in a way that matters. e.g. I think on x86 the
> > EDSM stuff is built whether or not we have pcihp enabled
> > whereas here you've made it conditional on using acpi
> > hp. Perhaps a tiny bit more description on that would be
> > useful if you do a v4?
>
> edsm should be built regardless of pcihp
> (well intention was there, whether I messed it up or not I don't know)
>
> idea is that non hotplug ports can have a static acpi-index,
> so it doesn't depend on pcihp.
That makes sense - so here should that edsm feature be enabled whether
or not we have pcihp_state->use_acpi_hotplug_bridge == true
i.e. is it really a separate thing from the rest of this series?
Thanks,
J
>
> >
> > Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> >
> >
> > > ---
> > > include/hw/acpi/pcihp.h | 2 ++
> > > include/hw/arm/virt.h | 1 +
> > > hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
> > > hw/arm/virt.c | 2 ++
> > > hw/arm/Kconfig | 2 ++
> > > 5 files changed, 29 insertions(+)
> > >
> > > diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> > > index 5506a58862..9ff548650b 100644
> > > --- a/include/hw/acpi/pcihp.h
> > > +++ b/include/hw/acpi/pcihp.h
> > > @@ -38,6 +38,8 @@
> > > #define ACPI_PCIHP_SEJ_BASE 0x8
> > > #define ACPI_PCIHP_BNMR_BASE 0x10
> > >
> > > +#define ACPI_PCIHP_SIZE 0x0018
> > > +
> > > typedef struct AcpiPciHpPciStatus {
> > > uint32_t up;
> > > uint32_t down;
> > > diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> > > index 9a1b0f53d2..0ed2e6b732 100644
> > > --- a/include/hw/arm/virt.h
> > > +++ b/include/hw/arm/virt.h
> > > @@ -79,6 +79,7 @@ enum {
> > > VIRT_ACPI_GED,
> > > VIRT_NVDIMM_ACPI,
> > > VIRT_PVTIME,
> > > + VIRT_ACPI_PCIHP,
> > > VIRT_LOWMEMMAP_LAST,
> > > };
> > >
> > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> > > index d7547c8d3b..a2e58288f8 100644
> > > --- a/hw/arm/virt-acpi-build.c
> > > +++ b/hw/arm/virt-acpi-build.c
> > > @@ -34,6 +34,7 @@
> > > #include "hw/core/cpu.h"
> > > #include "hw/acpi/acpi-defs.h"
> > > #include "hw/acpi/acpi.h"
> > > +#include "hw/acpi/pcihp.h"
> > > #include "hw/nvram/fw_cfg_acpi.h"
> > > #include "hw/acpi/bios-linker-loader.h"
> > > #include "hw/acpi/aml-build.h"
> > > @@ -809,6 +810,8 @@ static void
> > > build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> > > {
> > > VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
> > > + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> > > + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
> > > Aml *scope, *dsdt;
> > > MachineState *ms = MACHINE(vms);
> > > const MemMapEntry *memmap = vms->memmap;
> > > @@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> > >
> > > aml_append(dsdt, scope);
> > >
> > > + if (pcihp_state->use_acpi_hotplug_bridge) {
> > > + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
> > > +
> > > + aml_append(pci0_scope, aml_pci_edsm());
> > > + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
> > > + memmap[VIRT_ACPI_PCIHP].base);
> > > + build_append_pcihp_resources(pci0_scope,
> > > + memmap[VIRT_ACPI_PCIHP].base,
> > > + memmap[VIRT_ACPI_PCIHP].size);
> > > +
> > > + /* Scan all PCI buses. Generate tables to support hotplug. */
> > > + build_append_pci_bus_devices(pci0_scope, vms->bus);
> > > + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
> > > + build_append_pcihp_slots(pci0_scope, vms->bus);
> > > + }
> > > + build_append_notification_callback(pci0_scope, vms->bus);
> > > + aml_append(dsdt, pci0_scope);
> > > + }
> > > +
> > > /* copy AML table into ACPI tables blob */
> > > g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
> > >
> >
>
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-20 16:13 ` Jonathan Cameron via
@ 2025-06-25 15:23 ` Eric Auger
2025-06-26 8:44 ` Eric Auger
0 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-25 15:23 UTC (permalink / raw)
To: Jonathan Cameron, Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Igor, Jonathan,
On 6/20/25 6:13 PM, Jonathan Cameron wrote:
> On Fri, 20 Jun 2025 14:38:22 +0200
> Igor Mammedov <imammedo@redhat.com> wrote:
>
>> On Fri, 20 Jun 2025 10:35:38 +0100
>> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>>
>>> On Mon, 16 Jun 2025 11:46:46 +0200
>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>
>>>> Modify the DSDT ACPI table to enable ACPI PCI hotplug.
>>>>
>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>
>>>> ---
>>>> v2 -> v3:
>>>> - use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
>>>> - use cihp_state->use_acpi_hotplug_bridge
>>> pcihp_state
>>>
>>> Takes a bit of searching to find the various bits of the
>>> same support on x86 but this seems to match up.
>>> Exactly when things are built does vary but not I think
>>> in a way that matters. e.g. I think on x86 the
>>> EDSM stuff is built whether or not we have pcihp enabled
>>> whereas here you've made it conditional on using acpi
>>> hp. Perhaps a tiny bit more description on that would be
>>> useful if you do a v4?
>> edsm should be built regardless of pcihp
>> (well intention was there, whether I messed it up or not I don't know)
>>
>> idea is that non hotplug ports can have a static acpi-index,
>> so it doesn't depend on pcihp.
> That makes sense - so here should that edsm feature be enabled whether
> or not we have pcihp_state->use_acpi_hotplug_bridge == true
>
> i.e. is it really a separate thing from the rest of this series?
Further studying this comment,
EDSM is invoked by code generated in aml_pci_static_endpoint_dsm() whcih
itself is invoked by build_append_pci_bus_devices()
So to me it means that if we generate edsm unconditionally we also need
to call the following block unconditionnally
+ aml_append(pci0_scope, build_pci_bridge_edsm());
+ build_append_pci_bus_devices(pci0_scope, vms->bus);
+ if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
+ build_append_pcihp_slots(pci0_scope, vms->bus);
+ }
which seems to be done that way in hw/i386/acpi-build.c/build_dsdt()
Igor, if I recall correctly you said that addition changes related to
"S%.02X" could change the guest ABI. And in that case this wouldn't be
guarded by any new option/compat. So that's annoying.
By the way I tested static acpi-index on ARM with resulting code and it
does not not seem to work - maybe I try with a wrong topology though
(pcie root port + virtio-net acpi-index)-. I have not checked on x86 yet.
So I wonder if it makes sense to do that refinement now. Maybe we can
check try to improve that afterwards?
What do you think?
Eric
>
> Thanks,
>
> J
>>> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>>>
>>>
>>>> ---
>>>> include/hw/acpi/pcihp.h | 2 ++
>>>> include/hw/arm/virt.h | 1 +
>>>> hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
>>>> hw/arm/virt.c | 2 ++
>>>> hw/arm/Kconfig | 2 ++
>>>> 5 files changed, 29 insertions(+)
>>>>
>>>> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
>>>> index 5506a58862..9ff548650b 100644
>>>> --- a/include/hw/acpi/pcihp.h
>>>> +++ b/include/hw/acpi/pcihp.h
>>>> @@ -38,6 +38,8 @@
>>>> #define ACPI_PCIHP_SEJ_BASE 0x8
>>>> #define ACPI_PCIHP_BNMR_BASE 0x10
>>>>
>>>> +#define ACPI_PCIHP_SIZE 0x0018
>>>> +
>>>> typedef struct AcpiPciHpPciStatus {
>>>> uint32_t up;
>>>> uint32_t down;
>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>> index 9a1b0f53d2..0ed2e6b732 100644
>>>> --- a/include/hw/arm/virt.h
>>>> +++ b/include/hw/arm/virt.h
>>>> @@ -79,6 +79,7 @@ enum {
>>>> VIRT_ACPI_GED,
>>>> VIRT_NVDIMM_ACPI,
>>>> VIRT_PVTIME,
>>>> + VIRT_ACPI_PCIHP,
>>>> VIRT_LOWMEMMAP_LAST,
>>>> };
>>>>
>>>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>>>> index d7547c8d3b..a2e58288f8 100644
>>>> --- a/hw/arm/virt-acpi-build.c
>>>> +++ b/hw/arm/virt-acpi-build.c
>>>> @@ -34,6 +34,7 @@
>>>> #include "hw/core/cpu.h"
>>>> #include "hw/acpi/acpi-defs.h"
>>>> #include "hw/acpi/acpi.h"
>>>> +#include "hw/acpi/pcihp.h"
>>>> #include "hw/nvram/fw_cfg_acpi.h"
>>>> #include "hw/acpi/bios-linker-loader.h"
>>>> #include "hw/acpi/aml-build.h"
>>>> @@ -809,6 +810,8 @@ static void
>>>> build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>>>> {
>>>> VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
>>>> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
>>>> + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
>>>> Aml *scope, *dsdt;
>>>> MachineState *ms = MACHINE(vms);
>>>> const MemMapEntry *memmap = vms->memmap;
>>>> @@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>>>>
>>>> aml_append(dsdt, scope);
>>>>
>>>> + if (pcihp_state->use_acpi_hotplug_bridge) {
>>>> + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
>>>> +
>>>> + aml_append(pci0_scope, aml_pci_edsm());
>>>> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
>>>> + memmap[VIRT_ACPI_PCIHP].base);
>>>> + build_append_pcihp_resources(pci0_scope,
>>>> + memmap[VIRT_ACPI_PCIHP].base,
>>>> + memmap[VIRT_ACPI_PCIHP].size);
>>>> +
>>>> + /* Scan all PCI buses. Generate tables to support hotplug. */
>>>> + build_append_pci_bus_devices(pci0_scope, vms->bus);
>>>> + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
>>>> + build_append_pcihp_slots(pci0_scope, vms->bus);
>>>> + }
>>>> + build_append_notification_callback(pci0_scope, vms->bus);
>>>> + aml_append(dsdt, pci0_scope);
>>>> + }
>>>> +
>>>> /* copy AML table into ACPI tables blob */
>>>> g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
>>>>
>>>
>>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-25 15:23 ` Eric Auger
@ 2025-06-26 8:44 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-26 8:44 UTC (permalink / raw)
To: eric.auger, Jonathan Cameron, Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Igor,
On 6/25/25 5:23 PM, Eric Auger wrote:
> Hi Igor, Jonathan,
>
> On 6/20/25 6:13 PM, Jonathan Cameron wrote:
>> On Fri, 20 Jun 2025 14:38:22 +0200
>> Igor Mammedov <imammedo@redhat.com> wrote:
>>
>>> On Fri, 20 Jun 2025 10:35:38 +0100
>>> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>>>
>>>> On Mon, 16 Jun 2025 11:46:46 +0200
>>>> Eric Auger <eric.auger@redhat.com> wrote:
>>>>
>>>>> Modify the DSDT ACPI table to enable ACPI PCI hotplug.
>>>>>
>>>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>>>
>>>>> ---
>>>>> v2 -> v3:
>>>>> - use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
>>>>> - use cihp_state->use_acpi_hotplug_bridge
>>>> pcihp_state
>>>>
>>>> Takes a bit of searching to find the various bits of the
>>>> same support on x86 but this seems to match up.
>>>> Exactly when things are built does vary but not I think
>>>> in a way that matters. e.g. I think on x86 the
>>>> EDSM stuff is built whether or not we have pcihp enabled
>>>> whereas here you've made it conditional on using acpi
>>>> hp. Perhaps a tiny bit more description on that would be
>>>> useful if you do a v4?
>>> edsm should be built regardless of pcihp
>>> (well intention was there, whether I messed it up or not I don't know)
>>>
>>> idea is that non hotplug ports can have a static acpi-index,
>>> so it doesn't depend on pcihp.
>> That makes sense - so here should that edsm feature be enabled whether
>> or not we have pcihp_state->use_acpi_hotplug_bridge == true
>>
>> i.e. is it really a separate thing from the rest of this series?
>
> Further studying this comment,
>
> EDSM is invoked by code generated in aml_pci_static_endpoint_dsm() whcih
> itself is invoked by build_append_pci_bus_devices()
>
> So to me it means that if we generate edsm unconditionally we also need
> to call the following block unconditionnally
>
> + aml_append(pci0_scope, build_pci_bridge_edsm());
> + build_append_pci_bus_devices(pci0_scope, vms->bus);
> + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
> + build_append_pcihp_slots(pci0_scope, vms->bus);
> + }
>
> which seems to be done that way in hw/i386/acpi-build.c/build_dsdt()
>
> Igor, if I recall correctly you said that addition changes related to
> "S%.02X" could change the guest ABI. And in that case this wouldn't be
> guarded by any new option/compat. So that's annoying.
>
> By the way I tested static acpi-index on ARM with resulting code and it
> does not not seem to work - maybe I try with a wrong topology though
> (pcie root port + virtio-net acpi-index)-. I have not checked on x86 yet.
I tested on x86 and if you turn off acpi pci hotplug by setting
-global ICH9-LPC.acpi-pci-hotplug-with-bridge-support=off
and you statically instantiate a virtio-net-pci device on a pcie root
port with ,acpi-index=3, acpi-index does not work either.
guest exposes enp5s0.
if you remove the global prop setting (acpi pcihp enabled by default),
guest exposes eno3.
so static acpi-index also seems to be dependent on acpi-pcihp on x86.
So I intend to leave the code as is with edsm added within the
acpi_pcihp conditional block. It is also simpler in terms of ref blob
and most importantly with regards to compat handling.
Thanks
Eric
>
> So I wonder if it makes sense to do that refinement now. Maybe we can
> check try to improve that afterwards?
>
> What do you think?
>
> Eric
>
>
>
>>
>> Thanks,
>>
>> J
>>>> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>>>>
>>>>
>>>>> ---
>>>>> include/hw/acpi/pcihp.h | 2 ++
>>>>> include/hw/arm/virt.h | 1 +
>>>>> hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
>>>>> hw/arm/virt.c | 2 ++
>>>>> hw/arm/Kconfig | 2 ++
>>>>> 5 files changed, 29 insertions(+)
>>>>>
>>>>> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
>>>>> index 5506a58862..9ff548650b 100644
>>>>> --- a/include/hw/acpi/pcihp.h
>>>>> +++ b/include/hw/acpi/pcihp.h
>>>>> @@ -38,6 +38,8 @@
>>>>> #define ACPI_PCIHP_SEJ_BASE 0x8
>>>>> #define ACPI_PCIHP_BNMR_BASE 0x10
>>>>>
>>>>> +#define ACPI_PCIHP_SIZE 0x0018
>>>>> +
>>>>> typedef struct AcpiPciHpPciStatus {
>>>>> uint32_t up;
>>>>> uint32_t down;
>>>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>>>> index 9a1b0f53d2..0ed2e6b732 100644
>>>>> --- a/include/hw/arm/virt.h
>>>>> +++ b/include/hw/arm/virt.h
>>>>> @@ -79,6 +79,7 @@ enum {
>>>>> VIRT_ACPI_GED,
>>>>> VIRT_NVDIMM_ACPI,
>>>>> VIRT_PVTIME,
>>>>> + VIRT_ACPI_PCIHP,
>>>>> VIRT_LOWMEMMAP_LAST,
>>>>> };
>>>>>
>>>>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>>>>> index d7547c8d3b..a2e58288f8 100644
>>>>> --- a/hw/arm/virt-acpi-build.c
>>>>> +++ b/hw/arm/virt-acpi-build.c
>>>>> @@ -34,6 +34,7 @@
>>>>> #include "hw/core/cpu.h"
>>>>> #include "hw/acpi/acpi-defs.h"
>>>>> #include "hw/acpi/acpi.h"
>>>>> +#include "hw/acpi/pcihp.h"
>>>>> #include "hw/nvram/fw_cfg_acpi.h"
>>>>> #include "hw/acpi/bios-linker-loader.h"
>>>>> #include "hw/acpi/aml-build.h"
>>>>> @@ -809,6 +810,8 @@ static void
>>>>> build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>>>>> {
>>>>> VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
>>>>> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
>>>>> + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
>>>>> Aml *scope, *dsdt;
>>>>> MachineState *ms = MACHINE(vms);
>>>>> const MemMapEntry *memmap = vms->memmap;
>>>>> @@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>>>>>
>>>>> aml_append(dsdt, scope);
>>>>>
>>>>> + if (pcihp_state->use_acpi_hotplug_bridge) {
>>>>> + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
>>>>> +
>>>>> + aml_append(pci0_scope, aml_pci_edsm());
>>>>> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
>>>>> + memmap[VIRT_ACPI_PCIHP].base);
>>>>> + build_append_pcihp_resources(pci0_scope,
>>>>> + memmap[VIRT_ACPI_PCIHP].base,
>>>>> + memmap[VIRT_ACPI_PCIHP].size);
>>>>> +
>>>>> + /* Scan all PCI buses. Generate tables to support hotplug. */
>>>>> + build_append_pci_bus_devices(pci0_scope, vms->bus);
>>>>> + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
>>>>> + build_append_pcihp_slots(pci0_scope, vms->bus);
>>>>> + }
>>>>> + build_append_notification_callback(pci0_scope, vms->bus);
>>>>> + aml_append(dsdt, pci0_scope);
>>>>> + }
>>>>> +
>>>>> /* copy AML table into ACPI tables blob */
>>>>> g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
>>>>>
>>>>
>>>
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-20 12:38 ` Igor Mammedov
2025-06-20 16:13 ` Jonathan Cameron via
@ 2025-06-24 15:51 ` Eric Auger
1 sibling, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-24 15:51 UTC (permalink / raw)
To: Igor Mammedov, Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On 6/20/25 2:38 PM, Igor Mammedov wrote:
> On Fri, 20 Jun 2025 10:35:38 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
>> On Mon, 16 Jun 2025 11:46:46 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> Modify the DSDT ACPI table to enable ACPI PCI hotplug.
>>>
>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>>
>>> ---
>>> v2 -> v3:
>>> - use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
>>> - use cihp_state->use_acpi_hotplug_bridge
>> pcihp_state
>>
>> Takes a bit of searching to find the various bits of the
>> same support on x86 but this seems to match up.
>> Exactly when things are built does vary but not I think
>> in a way that matters. e.g. I think on x86 the
>> EDSM stuff is built whether or not we have pcihp enabled
>> whereas here you've made it conditional on using acpi
>> hp. Perhaps a tiny bit more description on that would be
>> useful if you do a v4?
> edsm should be built regardless of pcihp
> (well intention was there, whether I messed it up or not I don't know)
>
> idea is that non hotplug ports can have a static acpi-index,
> so it doesn't depend on pcihp.
OK I can make it unconditional. The drawback is that it will oblige to
rebuild reference blobs again with native pci hotplug.
Eric
>
>> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>>
>>
>>> ---
>>> include/hw/acpi/pcihp.h | 2 ++
>>> include/hw/arm/virt.h | 1 +
>>> hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
>>> hw/arm/virt.c | 2 ++
>>> hw/arm/Kconfig | 2 ++
>>> 5 files changed, 29 insertions(+)
>>>
>>> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
>>> index 5506a58862..9ff548650b 100644
>>> --- a/include/hw/acpi/pcihp.h
>>> +++ b/include/hw/acpi/pcihp.h
>>> @@ -38,6 +38,8 @@
>>> #define ACPI_PCIHP_SEJ_BASE 0x8
>>> #define ACPI_PCIHP_BNMR_BASE 0x10
>>>
>>> +#define ACPI_PCIHP_SIZE 0x0018
>>> +
>>> typedef struct AcpiPciHpPciStatus {
>>> uint32_t up;
>>> uint32_t down;
>>> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
>>> index 9a1b0f53d2..0ed2e6b732 100644
>>> --- a/include/hw/arm/virt.h
>>> +++ b/include/hw/arm/virt.h
>>> @@ -79,6 +79,7 @@ enum {
>>> VIRT_ACPI_GED,
>>> VIRT_NVDIMM_ACPI,
>>> VIRT_PVTIME,
>>> + VIRT_ACPI_PCIHP,
>>> VIRT_LOWMEMMAP_LAST,
>>> };
>>>
>>> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
>>> index d7547c8d3b..a2e58288f8 100644
>>> --- a/hw/arm/virt-acpi-build.c
>>> +++ b/hw/arm/virt-acpi-build.c
>>> @@ -34,6 +34,7 @@
>>> #include "hw/core/cpu.h"
>>> #include "hw/acpi/acpi-defs.h"
>>> #include "hw/acpi/acpi.h"
>>> +#include "hw/acpi/pcihp.h"
>>> #include "hw/nvram/fw_cfg_acpi.h"
>>> #include "hw/acpi/bios-linker-loader.h"
>>> #include "hw/acpi/aml-build.h"
>>> @@ -809,6 +810,8 @@ static void
>>> build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>>> {
>>> VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
>>> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
>>> + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
>>> Aml *scope, *dsdt;
>>> MachineState *ms = MACHINE(vms);
>>> const MemMapEntry *memmap = vms->memmap;
>>> @@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>>>
>>> aml_append(dsdt, scope);
>>>
>>> + if (pcihp_state->use_acpi_hotplug_bridge) {
>>> + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
>>> +
>>> + aml_append(pci0_scope, aml_pci_edsm());
>>> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
>>> + memmap[VIRT_ACPI_PCIHP].base);
>>> + build_append_pcihp_resources(pci0_scope,
>>> + memmap[VIRT_ACPI_PCIHP].base,
>>> + memmap[VIRT_ACPI_PCIHP].size);
>>> +
>>> + /* Scan all PCI buses. Generate tables to support hotplug. */
>>> + build_append_pci_bus_devices(pci0_scope, vms->bus);
>>> + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
>>> + build_append_pcihp_slots(pci0_scope, vms->bus);
>>> + }
>>> + build_append_notification_callback(pci0_scope, vms->bus);
>>> + aml_append(dsdt, pci0_scope);
>>> + }
>>> +
>>> /* copy AML table into ACPI tables blob */
>>> g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
>>>
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug
2025-06-16 9:46 ` [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Eric Auger
2025-06-20 9:35 ` Jonathan Cameron via
@ 2025-06-20 12:33 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:33 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:46 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Modify the DSDT ACPI table to enable ACPI PCI hotplug.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
> v2 -> v3:
> - use ACPI_PCIHP_SIZE instead of 0x1000 (Igor)
> - use cihp_state->use_acpi_hotplug_bridge
> ---
> include/hw/acpi/pcihp.h | 2 ++
> include/hw/arm/virt.h | 1 +
> hw/arm/virt-acpi-build.c | 22 ++++++++++++++++++++++
> hw/arm/virt.c | 2 ++
> hw/arm/Kconfig | 2 ++
> 5 files changed, 29 insertions(+)
>
> diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h
> index 5506a58862..9ff548650b 100644
> --- a/include/hw/acpi/pcihp.h
> +++ b/include/hw/acpi/pcihp.h
> @@ -38,6 +38,8 @@
> #define ACPI_PCIHP_SEJ_BASE 0x8
> #define ACPI_PCIHP_BNMR_BASE 0x10
>
> +#define ACPI_PCIHP_SIZE 0x0018
> +
> typedef struct AcpiPciHpPciStatus {
> uint32_t up;
> uint32_t down;
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 9a1b0f53d2..0ed2e6b732 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -79,6 +79,7 @@ enum {
> VIRT_ACPI_GED,
> VIRT_NVDIMM_ACPI,
> VIRT_PVTIME,
> + VIRT_ACPI_PCIHP,
> VIRT_LOWMEMMAP_LAST,
> };
>
> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
> index d7547c8d3b..a2e58288f8 100644
> --- a/hw/arm/virt-acpi-build.c
> +++ b/hw/arm/virt-acpi-build.c
> @@ -34,6 +34,7 @@
> #include "hw/core/cpu.h"
> #include "hw/acpi/acpi-defs.h"
> #include "hw/acpi/acpi.h"
> +#include "hw/acpi/pcihp.h"
> #include "hw/nvram/fw_cfg_acpi.h"
> #include "hw/acpi/bios-linker-loader.h"
> #include "hw/acpi/aml-build.h"
> @@ -809,6 +810,8 @@ static void
> build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
> {
> VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
> + AcpiGedState *acpi_ged_state = ACPI_GED(vms->acpi_dev);
> + AcpiPciHpState *pcihp_state = &acpi_ged_state->pcihp_state;
> Aml *scope, *dsdt;
> MachineState *ms = MACHINE(vms);
> const MemMapEntry *memmap = vms->memmap;
> @@ -868,6 +871,25 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
>
> aml_append(dsdt, scope);
>
> + if (pcihp_state->use_acpi_hotplug_bridge) {
ditto, use property accessor
> + Aml *pci0_scope = aml_scope("\\_SB.PCI0");
> +
> + aml_append(pci0_scope, aml_pci_edsm());
> + build_acpi_pci_hotplug(dsdt, AML_SYSTEM_MEMORY,
> + memmap[VIRT_ACPI_PCIHP].base);
> + build_append_pcihp_resources(pci0_scope,
> + memmap[VIRT_ACPI_PCIHP].base,
> + memmap[VIRT_ACPI_PCIHP].size);
> +
> + /* Scan all PCI buses. Generate tables to support hotplug. */
> + build_append_pci_bus_devices(pci0_scope, vms->bus);
> + if (object_property_find(OBJECT(vms->bus), ACPI_PCIHP_PROP_BSEL)) {
> + build_append_pcihp_slots(pci0_scope, vms->bus);
> + }
> + build_append_notification_callback(pci0_scope, vms->bus);
> + aml_append(dsdt, pci0_scope);
> + }
> +
> /* copy AML table into ACPI tables blob */
> g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 9a6cd085a3..08bd808499 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -75,6 +75,7 @@
> #include "standard-headers/linux/input.h"
> #include "hw/arm/smmuv3.h"
> #include "hw/acpi/acpi.h"
> +#include "hw/acpi/pcihp.h"
> #include "target/arm/cpu-qom.h"
> #include "target/arm/internals.h"
> #include "target/arm/multiprocessing.h"
> @@ -183,6 +184,7 @@ static const MemMapEntry base_memmap[] = {
> [VIRT_NVDIMM_ACPI] = { 0x09090000, NVDIMM_ACPI_IO_LEN},
> [VIRT_PVTIME] = { 0x090a0000, 0x00010000 },
> [VIRT_SECURE_GPIO] = { 0x090b0000, 0x00001000 },
> + [VIRT_ACPI_PCIHP] = { 0x090c0000, ACPI_PCIHP_SIZE },
> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
> [VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
> diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
> index f543d944c3..dee4d6dd25 100644
> --- a/hw/arm/Kconfig
> +++ b/hw/arm/Kconfig
> @@ -34,6 +34,8 @@ config ARM_VIRT
> select ACPI_HW_REDUCED
> select ACPI_APEI
> select ACPI_VIOT
> + select ACPI_PCIHP
> + select ACPI_PCI_BRIDGE
> select VIRTIO_MEM_SUPPORTED
> select ACPI_CXL
> select ACPI_HMAT
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 18/29] hw/acpi/ged: Add a bus link property
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (16 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 17/29] hw/arm/virt-acpi-build: Modify the DSDT ACPI table to enable ACPI PCI hotplug Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 9:37 ` Jonathan Cameron via
2025-06-20 12:45 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 19/29] hw/arm/virt: Pass the bus on the ged creation Eric Auger
` (10 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
This property will be set by the machine code on the object
creation. It will be used by acpi pcihp hotplug code.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/acpi/generic_event_device.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index 7831db412b..ef1c1ec51f 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -13,6 +13,7 @@
#include "qapi/error.h"
#include "hw/acpi/acpi.h"
#include "hw/acpi/generic_event_device.h"
+#include "hw/pci/pci.h"
#include "hw/irq.h"
#include "hw/mem/pc-dimm.h"
#include "hw/mem/nvdimm.h"
@@ -320,6 +321,8 @@ static const Property acpi_ged_properties[] = {
DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, AcpiGedState,
pcihp_state.use_acpi_hotplug_bridge, 0),
+ DEFINE_PROP_LINK("bus", AcpiGedState, pcihp_state.root,
+ TYPE_PCI_BUS, PCIBus *),
};
static const VMStateDescription vmstate_memhp_state = {
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 18/29] hw/acpi/ged: Add a bus link property
2025-06-16 9:46 ` [PATCH v3 18/29] hw/acpi/ged: Add a bus link property Eric Auger
@ 2025-06-20 9:37 ` Jonathan Cameron via
2025-06-20 12:45 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 9:37 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:47 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> This property will be set by the machine code on the object
> creation. It will be used by acpi pcihp hotplug code.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 18/29] hw/acpi/ged: Add a bus link property
2025-06-16 9:46 ` [PATCH v3 18/29] hw/acpi/ged: Add a bus link property Eric Auger
2025-06-20 9:37 ` Jonathan Cameron via
@ 2025-06-20 12:45 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:45 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:47 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> This property will be set by the machine code on the object
> creation. It will be used by acpi pcihp hotplug code.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
also with that it's possible to end up with NULL root
if someone forgets to wire it up.
I'd add assert somewhere in pcihp.c
so that we wouldn't end up with wounds from too much head scratching
if it fails somewhere during runtime.
> ---
> hw/acpi/generic_event_device.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
> index 7831db412b..ef1c1ec51f 100644
> --- a/hw/acpi/generic_event_device.c
> +++ b/hw/acpi/generic_event_device.c
> @@ -13,6 +13,7 @@
> #include "qapi/error.h"
> #include "hw/acpi/acpi.h"
> #include "hw/acpi/generic_event_device.h"
> +#include "hw/pci/pci.h"
> #include "hw/irq.h"
> #include "hw/mem/pc-dimm.h"
> #include "hw/mem/nvdimm.h"
> @@ -320,6 +321,8 @@ static const Property acpi_ged_properties[] = {
> DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
> DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, AcpiGedState,
> pcihp_state.use_acpi_hotplug_bridge, 0),
> + DEFINE_PROP_LINK("bus", AcpiGedState, pcihp_state.root,
> + TYPE_PCI_BUS, PCIBus *),
> };
>
> static const VMStateDescription vmstate_memhp_state = {
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 19/29] hw/arm/virt: Pass the bus on the ged creation
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (17 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 18/29] hw/acpi/ged: Add a bus link property Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 9:38 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events Eric Auger
` (9 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
The bus will be needed on ged realize for acpi pci hp setup.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/arm/virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 08bd808499..2f34877716 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -696,6 +696,7 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
dev = qdev_new(TYPE_ACPI_GED);
qdev_prop_set_uint32(dev, "ged-event", event);
+ object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 19/29] hw/arm/virt: Pass the bus on the ged creation
2025-06-16 9:46 ` [PATCH v3 19/29] hw/arm/virt: Pass the bus on the ged creation Eric Auger
@ 2025-06-20 9:38 ` Jonathan Cameron via
2025-06-24 15:56 ` Eric Auger
0 siblings, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 9:38 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:48 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> The bus will be needed on ged realize for acpi pci hp setup.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
I guess doing this in separate patches for previous and this one
maybe makes it easier to backport the previous if someone just wants
to enable this on a different arch. Otherwise I'd have smashed them
together.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> hw/arm/virt.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 08bd808499..2f34877716 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -696,6 +696,7 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>
> dev = qdev_new(TYPE_ACPI_GED);
> qdev_prop_set_uint32(dev, "ged-event", event);
> + object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
> sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>
> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 19/29] hw/arm/virt: Pass the bus on the ged creation
2025-06-20 9:38 ` Jonathan Cameron via
@ 2025-06-24 15:56 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-24 15:56 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 6/20/25 11:38 AM, Jonathan Cameron wrote:
> On Mon, 16 Jun 2025 11:46:48 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> The bus will be needed on ged realize for acpi pci hp setup.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> I guess doing this in separate patches for previous and this one
> maybe makes it easier to backport the previous if someone just wants
> to enable this on a different arch. Otherwise I'd have smashed them
> together.
for me it is also a matter of maintainership/reviewer role separataion,
virt and ged being maintained/reviewed by different people. So if you
don't mind, I will keep it separate all the more so I collected R-b's on
each ;-)
Eric
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>> ---
>> hw/arm/virt.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 08bd808499..2f34877716 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -696,6 +696,7 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>>
>> dev = qdev_new(TYPE_ACPI_GED);
>> qdev_prop_set_uint32(dev, "ged-event", event);
>> + object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
>> sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
>>
>> sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (18 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 19/29] hw/arm/virt: Pass the bus on the ged creation Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 9:44 ` Jonathan Cameron via
` (2 more replies)
2025-06-16 9:46 ` [PATCH v3 21/29] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Eric Auger
` (8 subsequent siblings)
28 siblings, 3 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
QEMU will notify the OS about PCI hotplug/hotunplug events through
GED interrupts. Let the GED device handle a new PCI hotplug event.
On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
mutex held.
The GED device uses a dedicated MMIO region that will be mapped
by the machine code.
At this point the GED still does not support PCI device hotplug in
its TYPE_HOTPLUG_HANDLER implementation. This will come in a
subsequent patch.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- pcihp_init and reset are put in ged code instead of machine code
(Igor)
v1 -> v2:
- Introduce ACPI_PCIHP_REGION_NAME
---
include/hw/acpi/generic_event_device.h | 4 ++++
hw/acpi/generic_event_device.c | 26 ++++++++++++++++++++++++++
hw/acpi/pcihp.c | 1 -
3 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
index f5ffa67a39..ec8e1abe0a 100644
--- a/include/hw/acpi/generic_event_device.h
+++ b/include/hw/acpi/generic_event_device.h
@@ -102,6 +102,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED)
#define ACPI_GED_PWR_DOWN_EVT 0x2
#define ACPI_GED_NVDIMM_HOTPLUG_EVT 0x4
#define ACPI_GED_CPU_HOTPLUG_EVT 0x8
+#define ACPI_GED_PCI_HOTPLUG_EVT 0x10
typedef struct GEDState {
MemoryRegion evt;
@@ -109,6 +110,8 @@ typedef struct GEDState {
uint32_t sel;
} GEDState;
+#define ACPI_PCIHP_REGION_NAME "pcihp container"
+
struct AcpiGedState {
SysBusDevice parent_obj;
MemHotplugState memhp_state;
@@ -116,6 +119,7 @@ struct AcpiGedState {
CPUHotplugState cpuhp_state;
MemoryRegion container_cpuhp;
AcpiPciHpState pcihp_state;
+ MemoryRegion container_pcihp;
GEDState ged_state;
uint32_t ged_event_bitmap;
qemu_irq irq;
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index ef1c1ec51f..b4eefb0106 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -12,6 +12,7 @@
#include "qemu/osdep.h"
#include "qapi/error.h"
#include "hw/acpi/acpi.h"
+#include "hw/acpi/pcihp.h"
#include "hw/acpi/generic_event_device.h"
#include "hw/pci/pci.h"
#include "hw/irq.h"
@@ -27,6 +28,7 @@ static const uint32_t ged_supported_events[] = {
ACPI_GED_PWR_DOWN_EVT,
ACPI_GED_NVDIMM_HOTPLUG_EVT,
ACPI_GED_CPU_HOTPLUG_EVT,
+ ACPI_GED_PCI_HOTPLUG_EVT,
};
/*
@@ -122,6 +124,12 @@ void build_ged_aml(Aml *table, const char *name, HotplugHandler *hotplug_dev,
aml_notify(aml_name("\\_SB.NVDR"),
aml_int(0x80)));
break;
+ case ACPI_GED_PCI_HOTPLUG_EVT:
+ aml_append(if_ctx,
+ aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF));
+ aml_append(if_ctx, aml_call0("\\_SB.PCI0.PCNT"));
+ aml_append(if_ctx, aml_release(aml_name("\\_SB.PCI0.BLCK")));
+ break;
default:
/*
* Please make sure all the events in ged_supported_events[]
@@ -300,6 +308,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
sel = ACPI_GED_NVDIMM_HOTPLUG_EVT;
} else if (ev & ACPI_CPU_HOTPLUG_STATUS) {
sel = ACPI_GED_CPU_HOTPLUG_EVT;
+ } else if (ev & ACPI_PCI_HOTPLUG_STATUS) {
+ sel = ACPI_GED_PCI_HOTPLUG_EVT;
} else {
/* Unknown event. Return without generating interrupt. */
warn_report("GED: Unsupported event %d. No irq injected", ev);
@@ -433,6 +443,12 @@ static void acpi_ged_realize(DeviceState *dev, Error **errp)
cpu_hotplug_hw_init(&s->container_cpuhp, OBJECT(dev),
&s->cpuhp_state, 0);
break;
+ case ACPI_GED_PCI_HOTPLUG_EVT:
+ memory_region_init(&s->container_pcihp, OBJECT(dev),
+ ACPI_PCIHP_REGION_NAME, ACPI_PCIHP_SIZE);
+ sysbus_init_mmio(sbd, &s->container_pcihp);
+ acpi_pcihp_init(OBJECT(s), &s->pcihp_state,
+ s->pcihp_state.root, &s->container_pcihp, 0);
}
ged_events--;
}
@@ -474,6 +490,15 @@ static void acpi_ged_initfn(Object *obj)
sysbus_init_mmio(sbd, &ged_st->regs);
}
+static void ged_reset(DeviceState *dev)
+{
+ AcpiGedState *s = ACPI_GED(dev);
+
+ if (s->pcihp_state.use_acpi_hotplug_bridge) {
+ acpi_pcihp_reset(&s->pcihp_state);
+ }
+}
+
static void acpi_ged_class_init(ObjectClass *class, const void *data)
{
DeviceClass *dc = DEVICE_CLASS(class);
@@ -488,6 +513,7 @@ static void acpi_ged_class_init(ObjectClass *class, const void *data)
hc->plug = acpi_ged_device_plug_cb;
hc->unplug_request = acpi_ged_unplug_request_cb;
hc->unplug = acpi_ged_unplug_cb;
+ device_class_set_legacy_reset(dc, ged_reset);
adevc->ospm_status = acpi_ged_ospm_status;
adevc->send_event = acpi_ged_send_event;
diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
index e79a24b821..36492aa0d9 100644
--- a/hw/acpi/pcihp.c
+++ b/hw/acpi/pcihp.c
@@ -43,7 +43,6 @@
#include "qobject/qnum.h"
#include "trace.h"
-#define ACPI_PCIHP_SIZE 0x0018
#define PCI_UP_BASE 0x0000
#define PCI_DOWN_BASE 0x0004
#define PCI_EJ_BASE 0x0008
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events
2025-06-16 9:46 ` [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events Eric Auger
@ 2025-06-20 9:44 ` Jonathan Cameron via
2025-06-25 14:31 ` Eric Auger
2025-06-20 12:57 ` Igor Mammedov
2025-06-20 13:01 ` Igor Mammedov
2 siblings, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 9:44 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:49 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> QEMU will notify the OS about PCI hotplug/hotunplug events through
> GED interrupts. Let the GED device handle a new PCI hotplug event.
> On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
> mutex held.
>
> The GED device uses a dedicated MMIO region that will be mapped
> by the machine code.
>
> At this point the GED still does not support PCI device hotplug in
> its TYPE_HOTPLUG_HANDLER implementation. This will come in a
> subsequent patch.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Been a little while since I looked at how all this fits together
but this looks right from what I can remember. Hopefully others
can give a more definitive review!
One stray change that belongs in an earlier patch though.
With that fixed up.
So with that in mind.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index e79a24b821..36492aa0d9 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -43,7 +43,6 @@
> #include "qobject/qnum.h"
> #include "trace.h"
>
> -#define ACPI_PCIHP_SIZE 0x0018
It goes away from here, but doesn't get added anywhere?
Looks like this belongs in patch 17?
> #define PCI_UP_BASE 0x0000
> #define PCI_DOWN_BASE 0x0004
> #define PCI_EJ_BASE 0x0008
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events
2025-06-20 9:44 ` Jonathan Cameron via
@ 2025-06-25 14:31 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-25 14:31 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On 6/20/25 11:44 AM, Jonathan Cameron wrote:
> On Mon, 16 Jun 2025 11:46:49 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> QEMU will notify the OS about PCI hotplug/hotunplug events through
>> GED interrupts. Let the GED device handle a new PCI hotplug event.
>> On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
>> mutex held.
>>
>> The GED device uses a dedicated MMIO region that will be mapped
>> by the machine code.
>>
>> At this point the GED still does not support PCI device hotplug in
>> its TYPE_HOTPLUG_HANDLER implementation. This will come in a
>> subsequent patch.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Been a little while since I looked at how all this fits together
> but this looks right from what I can remember. Hopefully others
> can give a more definitive review!
>
> One stray change that belongs in an earlier patch though.
> With that fixed up.
>
> So with that in mind.
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
thanks!
>
>
>
>> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
>> index e79a24b821..36492aa0d9 100644
>> --- a/hw/acpi/pcihp.c
>> +++ b/hw/acpi/pcihp.c
>> @@ -43,7 +43,6 @@
>> #include "qobject/qnum.h"
>> #include "trace.h"
>>
>> -#define ACPI_PCIHP_SIZE 0x0018
> It goes away from here, but doesn't get added anywhere?
>
> Looks like this belongs in patch 17?
removed from 17!
Eric
>
>> #define PCI_UP_BASE 0x0000
>> #define PCI_DOWN_BASE 0x0004
>> #define PCI_EJ_BASE 0x0008
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events
2025-06-16 9:46 ` [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events Eric Auger
2025-06-20 9:44 ` Jonathan Cameron via
@ 2025-06-20 12:57 ` Igor Mammedov
2025-06-25 14:21 ` Eric Auger
2025-06-20 13:01 ` Igor Mammedov
2 siblings, 1 reply; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:57 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:49 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> QEMU will notify the OS about PCI hotplug/hotunplug events through
> GED interrupts. Let the GED device handle a new PCI hotplug event.
> On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
> mutex held.
>
> The GED device uses a dedicated MMIO region that will be mapped
> by the machine code.
> At this point the GED still does not support PCI device hotplug in
> its TYPE_HOTPLUG_HANDLER implementation. This will come in a
> subsequent patch.
looks out of order, perhaps it should be before this patch
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
> v2 -> v3:
> - pcihp_init and reset are put in ged code instead of machine code
> (Igor)
>
> v1 -> v2:
> - Introduce ACPI_PCIHP_REGION_NAME
> ---
> include/hw/acpi/generic_event_device.h | 4 ++++
> hw/acpi/generic_event_device.c | 26 ++++++++++++++++++++++++++
> hw/acpi/pcihp.c | 1 -
> 3 files changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
> index f5ffa67a39..ec8e1abe0a 100644
> --- a/include/hw/acpi/generic_event_device.h
> +++ b/include/hw/acpi/generic_event_device.h
> @@ -102,6 +102,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED)
> #define ACPI_GED_PWR_DOWN_EVT 0x2
> #define ACPI_GED_NVDIMM_HOTPLUG_EVT 0x4
> #define ACPI_GED_CPU_HOTPLUG_EVT 0x8
> +#define ACPI_GED_PCI_HOTPLUG_EVT 0x10
>
> typedef struct GEDState {
> MemoryRegion evt;
> @@ -109,6 +110,8 @@ typedef struct GEDState {
> uint32_t sel;
> } GEDState;
>
> +#define ACPI_PCIHP_REGION_NAME "pcihp container"
> +
> struct AcpiGedState {
> SysBusDevice parent_obj;
> MemHotplugState memhp_state;
> @@ -116,6 +119,7 @@ struct AcpiGedState {
> CPUHotplugState cpuhp_state;
> MemoryRegion container_cpuhp;
> AcpiPciHpState pcihp_state;
> + MemoryRegion container_pcihp;
> GEDState ged_state;
> uint32_t ged_event_bitmap;
> qemu_irq irq;
> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
> index ef1c1ec51f..b4eefb0106 100644
> --- a/hw/acpi/generic_event_device.c
> +++ b/hw/acpi/generic_event_device.c
> @@ -12,6 +12,7 @@
> #include "qemu/osdep.h"
> #include "qapi/error.h"
> #include "hw/acpi/acpi.h"
> +#include "hw/acpi/pcihp.h"
> #include "hw/acpi/generic_event_device.h"
> #include "hw/pci/pci.h"
> #include "hw/irq.h"
> @@ -27,6 +28,7 @@ static const uint32_t ged_supported_events[] = {
> ACPI_GED_PWR_DOWN_EVT,
> ACPI_GED_NVDIMM_HOTPLUG_EVT,
> ACPI_GED_CPU_HOTPLUG_EVT,
> + ACPI_GED_PCI_HOTPLUG_EVT,
> };
>
> /*
> @@ -122,6 +124,12 @@ void build_ged_aml(Aml *table, const char *name, HotplugHandler *hotplug_dev,
> aml_notify(aml_name("\\_SB.NVDR"),
> aml_int(0x80)));
> break;
> + case ACPI_GED_PCI_HOTPLUG_EVT:
> + aml_append(if_ctx,
> + aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF));
> + aml_append(if_ctx, aml_call0("\\_SB.PCI0.PCNT"));
> + aml_append(if_ctx, aml_release(aml_name("\\_SB.PCI0.BLCK")));
> + break;
> default:
> /*
> * Please make sure all the events in ged_supported_events[]
> @@ -300,6 +308,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
> sel = ACPI_GED_NVDIMM_HOTPLUG_EVT;
> } else if (ev & ACPI_CPU_HOTPLUG_STATUS) {
> sel = ACPI_GED_CPU_HOTPLUG_EVT;
> + } else if (ev & ACPI_PCI_HOTPLUG_STATUS) {
> + sel = ACPI_GED_PCI_HOTPLUG_EVT;
> } else {
> /* Unknown event. Return without generating interrupt. */
> warn_report("GED: Unsupported event %d. No irq injected", ev);
> @@ -433,6 +443,12 @@ static void acpi_ged_realize(DeviceState *dev, Error **errp)
> cpu_hotplug_hw_init(&s->container_cpuhp, OBJECT(dev),
> &s->cpuhp_state, 0);
> break;
> + case ACPI_GED_PCI_HOTPLUG_EVT:
> + memory_region_init(&s->container_pcihp, OBJECT(dev),
> + ACPI_PCIHP_REGION_NAME, ACPI_PCIHP_SIZE);
> + sysbus_init_mmio(sbd, &s->container_pcihp);
> + acpi_pcihp_init(OBJECT(s), &s->pcihp_state,
> + s->pcihp_state.root, &s->container_pcihp, 0);
> }
> ged_events--;
> }
> @@ -474,6 +490,15 @@ static void acpi_ged_initfn(Object *obj)
> sysbus_init_mmio(sbd, &ged_st->regs);
> }
>
> +static void ged_reset(DeviceState *dev)
> +{
> + AcpiGedState *s = ACPI_GED(dev);
> +
> + if (s->pcihp_state.use_acpi_hotplug_bridge) {
> + acpi_pcihp_reset(&s->pcihp_state);
> + }
> +}
> +
> static void acpi_ged_class_init(ObjectClass *class, const void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(class);
> @@ -488,6 +513,7 @@ static void acpi_ged_class_init(ObjectClass *class, const void *data)
> hc->plug = acpi_ged_device_plug_cb;
> hc->unplug_request = acpi_ged_unplug_request_cb;
> hc->unplug = acpi_ged_unplug_cb;
> + device_class_set_legacy_reset(dc, ged_reset);
>
> adevc->ospm_status = acpi_ged_ospm_status;
> adevc->send_event = acpi_ged_send_event;
> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
> index e79a24b821..36492aa0d9 100644
> --- a/hw/acpi/pcihp.c
> +++ b/hw/acpi/pcihp.c
> @@ -43,7 +43,6 @@
> #include "qobject/qnum.h"
> #include "trace.h"
>
> -#define ACPI_PCIHP_SIZE 0x0018
> #define PCI_UP_BASE 0x0000
> #define PCI_DOWN_BASE 0x0004
> #define PCI_EJ_BASE 0x0008
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events
2025-06-20 12:57 ` Igor Mammedov
@ 2025-06-25 14:21 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-25 14:21 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On 6/20/25 2:57 PM, Igor Mammedov wrote:
> On Mon, 16 Jun 2025 11:46:49 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> QEMU will notify the OS about PCI hotplug/hotunplug events through
>> GED interrupts. Let the GED device handle a new PCI hotplug event.
>> On its occurrence it calls the \\_SB.PCI0.PCNT method with the BLCK
>> mutex held.
>>
>> The GED device uses a dedicated MMIO region that will be mapped
>> by the machine code.
>
>> At this point the GED still does not support PCI device hotplug in
>> its TYPE_HOTPLUG_HANDLER implementation. This will come in a
>> subsequent patch.
> looks out of order, perhaps it should be before this patch
done, swapped both patches.
Eric
>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>
>> ---
>> v2 -> v3:
>> - pcihp_init and reset are put in ged code instead of machine code
>> (Igor)
>>
>> v1 -> v2:
>> - Introduce ACPI_PCIHP_REGION_NAME
>> ---
>> include/hw/acpi/generic_event_device.h | 4 ++++
>> hw/acpi/generic_event_device.c | 26 ++++++++++++++++++++++++++
>> hw/acpi/pcihp.c | 1 -
>> 3 files changed, 30 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
>> index f5ffa67a39..ec8e1abe0a 100644
>> --- a/include/hw/acpi/generic_event_device.h
>> +++ b/include/hw/acpi/generic_event_device.h
>> @@ -102,6 +102,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED)
>> #define ACPI_GED_PWR_DOWN_EVT 0x2
>> #define ACPI_GED_NVDIMM_HOTPLUG_EVT 0x4
>> #define ACPI_GED_CPU_HOTPLUG_EVT 0x8
>> +#define ACPI_GED_PCI_HOTPLUG_EVT 0x10
>>
>> typedef struct GEDState {
>> MemoryRegion evt;
>> @@ -109,6 +110,8 @@ typedef struct GEDState {
>> uint32_t sel;
>> } GEDState;
>>
>> +#define ACPI_PCIHP_REGION_NAME "pcihp container"
>> +
>> struct AcpiGedState {
>> SysBusDevice parent_obj;
>> MemHotplugState memhp_state;
>> @@ -116,6 +119,7 @@ struct AcpiGedState {
>> CPUHotplugState cpuhp_state;
>> MemoryRegion container_cpuhp;
>> AcpiPciHpState pcihp_state;
>> + MemoryRegion container_pcihp;
>> GEDState ged_state;
>> uint32_t ged_event_bitmap;
>> qemu_irq irq;
>> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
>> index ef1c1ec51f..b4eefb0106 100644
>> --- a/hw/acpi/generic_event_device.c
>> +++ b/hw/acpi/generic_event_device.c
>> @@ -12,6 +12,7 @@
>> #include "qemu/osdep.h"
>> #include "qapi/error.h"
>> #include "hw/acpi/acpi.h"
>> +#include "hw/acpi/pcihp.h"
>> #include "hw/acpi/generic_event_device.h"
>> #include "hw/pci/pci.h"
>> #include "hw/irq.h"
>> @@ -27,6 +28,7 @@ static const uint32_t ged_supported_events[] = {
>> ACPI_GED_PWR_DOWN_EVT,
>> ACPI_GED_NVDIMM_HOTPLUG_EVT,
>> ACPI_GED_CPU_HOTPLUG_EVT,
>> + ACPI_GED_PCI_HOTPLUG_EVT,
>> };
>>
>> /*
>> @@ -122,6 +124,12 @@ void build_ged_aml(Aml *table, const char *name, HotplugHandler *hotplug_dev,
>> aml_notify(aml_name("\\_SB.NVDR"),
>> aml_int(0x80)));
>> break;
>> + case ACPI_GED_PCI_HOTPLUG_EVT:
>> + aml_append(if_ctx,
>> + aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF));
>> + aml_append(if_ctx, aml_call0("\\_SB.PCI0.PCNT"));
>> + aml_append(if_ctx, aml_release(aml_name("\\_SB.PCI0.BLCK")));
>> + break;
>> default:
>> /*
>> * Please make sure all the events in ged_supported_events[]
>> @@ -300,6 +308,8 @@ static void acpi_ged_send_event(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
>> sel = ACPI_GED_NVDIMM_HOTPLUG_EVT;
>> } else if (ev & ACPI_CPU_HOTPLUG_STATUS) {
>> sel = ACPI_GED_CPU_HOTPLUG_EVT;
>> + } else if (ev & ACPI_PCI_HOTPLUG_STATUS) {
>> + sel = ACPI_GED_PCI_HOTPLUG_EVT;
>> } else {
>> /* Unknown event. Return without generating interrupt. */
>> warn_report("GED: Unsupported event %d. No irq injected", ev);
>> @@ -433,6 +443,12 @@ static void acpi_ged_realize(DeviceState *dev, Error **errp)
>> cpu_hotplug_hw_init(&s->container_cpuhp, OBJECT(dev),
>> &s->cpuhp_state, 0);
>> break;
>> + case ACPI_GED_PCI_HOTPLUG_EVT:
>> + memory_region_init(&s->container_pcihp, OBJECT(dev),
>> + ACPI_PCIHP_REGION_NAME, ACPI_PCIHP_SIZE);
>> + sysbus_init_mmio(sbd, &s->container_pcihp);
>> + acpi_pcihp_init(OBJECT(s), &s->pcihp_state,
>> + s->pcihp_state.root, &s->container_pcihp, 0);
>> }
>> ged_events--;
>> }
>> @@ -474,6 +490,15 @@ static void acpi_ged_initfn(Object *obj)
>> sysbus_init_mmio(sbd, &ged_st->regs);
>> }
>>
>> +static void ged_reset(DeviceState *dev)
>> +{
>> + AcpiGedState *s = ACPI_GED(dev);
>> +
>> + if (s->pcihp_state.use_acpi_hotplug_bridge) {
>> + acpi_pcihp_reset(&s->pcihp_state);
>> + }
>> +}
>> +
>> static void acpi_ged_class_init(ObjectClass *class, const void *data)
>> {
>> DeviceClass *dc = DEVICE_CLASS(class);
>> @@ -488,6 +513,7 @@ static void acpi_ged_class_init(ObjectClass *class, const void *data)
>> hc->plug = acpi_ged_device_plug_cb;
>> hc->unplug_request = acpi_ged_unplug_request_cb;
>> hc->unplug = acpi_ged_unplug_cb;
>> + device_class_set_legacy_reset(dc, ged_reset);
>>
>> adevc->ospm_status = acpi_ged_ospm_status;
>> adevc->send_event = acpi_ged_send_event;
>> diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c
>> index e79a24b821..36492aa0d9 100644
>> --- a/hw/acpi/pcihp.c
>> +++ b/hw/acpi/pcihp.c
>> @@ -43,7 +43,6 @@
>> #include "qobject/qnum.h"
>> #include "trace.h"
>>
>> -#define ACPI_PCIHP_SIZE 0x0018
>> #define PCI_UP_BASE 0x0000
>> #define PCI_DOWN_BASE 0x0004
>> #define PCI_EJ_BASE 0x0008
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events
2025-06-16 9:46 ` [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events Eric Auger
2025-06-20 9:44 ` Jonathan Cameron via
2025-06-20 12:57 ` Igor Mammedov
@ 2025-06-20 13:01 ` Igor Mammedov
2 siblings, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 13:01 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:49 +0200
Eric Auger <eric.auger@redhat.com> wrote:
[...]
> @@ -433,6 +443,12 @@ static void acpi_ged_realize(DeviceState *dev, Error **errp)
> cpu_hotplug_hw_init(&s->container_cpuhp, OBJECT(dev),
> &s->cpuhp_state, 0);
> break;
> + case ACPI_GED_PCI_HOTPLUG_EVT:
> + memory_region_init(&s->container_pcihp, OBJECT(dev),
> + ACPI_PCIHP_REGION_NAME, ACPI_PCIHP_SIZE);
> + sysbus_init_mmio(sbd, &s->container_pcihp);
> + acpi_pcihp_init(OBJECT(s), &s->pcihp_state,
> + s->pcihp_state.root, &s->container_pcihp, 0);
bus flow looks weird,
I'd suggest to
* set root bus link on x86 as well for consistency reasons and proper ref accounting
* and then drop 'bus' from acpi_pcihp_init() its arguments
> }
> ged_events--;
> }
[...]
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 21/29] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (19 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 20/29] hw/acpi/ged: Prepare the device to react to PCI hotplug events Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 10:09 ` Jonathan Cameron via
2025-06-20 12:53 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 22/29] hw/acpi/ged: Support migration of AcpiPciHpState Eric Auger
` (7 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Add PCI device related code in the TYPE_HOTPLUG_HANDLER
implementation.
For a PCI device hotplug/hotunplug event, the code routes to
acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
unplug_cb).
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- remove else block in acpi_ged_device_pre_plug_cb
---
hw/acpi/generic_event_device.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index b4eefb0106..2ae9ad082a 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -18,6 +18,7 @@
#include "hw/irq.h"
#include "hw/mem/pc-dimm.h"
#include "hw/mem/nvdimm.h"
+#include "hw/pci/pci_device.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"
#include "qemu/error-report.h"
@@ -236,6 +237,14 @@ static const MemoryRegionOps ged_regs_ops = {
},
};
+static void acpi_ged_device_pre_plug_cb(HotplugHandler *hotplug_dev,
+ DeviceState *dev, Error **errp)
+{
+ if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
+ }
+}
+
static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
@@ -249,6 +258,8 @@ static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
}
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_plug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
} else {
error_setg(errp, "virt: device plug request for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -265,6 +276,9 @@ static void acpi_ged_unplug_request_cb(HotplugHandler *hotplug_dev,
acpi_memory_unplug_request_cb(hotplug_dev, &s->memhp_state, dev, errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->pcihp_state,
+ dev, errp);
} else {
error_setg(errp, "acpi: device unplug request for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -280,6 +294,8 @@ static void acpi_ged_unplug_cb(HotplugHandler *hotplug_dev,
acpi_memory_unplug_cb(&s->memhp_state, dev, errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp);
+ } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ acpi_pcihp_device_unplug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
} else {
error_setg(errp, "acpi: device unplug for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
@@ -510,6 +526,7 @@ static void acpi_ged_class_init(ObjectClass *class, const void *data)
dc->vmsd = &vmstate_acpi_ged;
dc->realize = acpi_ged_realize;
+ hc->pre_plug = acpi_ged_device_pre_plug_cb;
hc->plug = acpi_ged_device_plug_cb;
hc->unplug_request = acpi_ged_unplug_request_cb;
hc->unplug = acpi_ged_unplug_cb;
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 21/29] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
2025-06-16 9:46 ` [PATCH v3 21/29] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Eric Auger
@ 2025-06-20 10:09 ` Jonathan Cameron via
2025-06-20 12:53 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 10:09 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:50 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add PCI device related code in the TYPE_HOTPLUG_HANDLER
> implementation.
>
> For a PCI device hotplug/hotunplug event, the code routes to
> acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
> unplug_cb).
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 21/29] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation
2025-06-16 9:46 ` [PATCH v3 21/29] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Eric Auger
2025-06-20 10:09 ` Jonathan Cameron via
@ 2025-06-20 12:53 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 12:53 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:50 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Add PCI device related code in the TYPE_HOTPLUG_HANDLER
> implementation.
>
> For a PCI device hotplug/hotunplug event, the code routes to
> acpi_pcihp_device callbacks (pre_plug_cb, plug_cb, unplug_request_cb,
> unplug_cb).
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
I'd put that before 20/29
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
>
> v2 -> v3:
> - remove else block in acpi_ged_device_pre_plug_cb
> ---
> hw/acpi/generic_event_device.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
> index b4eefb0106..2ae9ad082a 100644
> --- a/hw/acpi/generic_event_device.c
> +++ b/hw/acpi/generic_event_device.c
> @@ -18,6 +18,7 @@
> #include "hw/irq.h"
> #include "hw/mem/pc-dimm.h"
> #include "hw/mem/nvdimm.h"
> +#include "hw/pci/pci_device.h"
> #include "hw/qdev-properties.h"
> #include "migration/vmstate.h"
> #include "qemu/error-report.h"
> @@ -236,6 +237,14 @@ static const MemoryRegionOps ged_regs_ops = {
> },
> };
>
> +static void acpi_ged_device_pre_plug_cb(HotplugHandler *hotplug_dev,
> + DeviceState *dev, Error **errp)
> +{
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
> + }
> +}
> +
> static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
> DeviceState *dev, Error **errp)
> {
> @@ -249,6 +258,8 @@ static void acpi_ged_device_plug_cb(HotplugHandler *hotplug_dev,
> }
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
> acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
> + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_plug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
> } else {
> error_setg(errp, "virt: device plug request for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> @@ -265,6 +276,9 @@ static void acpi_ged_unplug_request_cb(HotplugHandler *hotplug_dev,
> acpi_memory_unplug_request_cb(hotplug_dev, &s->memhp_state, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
> acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp);
> + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->pcihp_state,
> + dev, errp);
> } else {
> error_setg(errp, "acpi: device unplug request for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> @@ -280,6 +294,8 @@ static void acpi_ged_unplug_cb(HotplugHandler *hotplug_dev,
> acpi_memory_unplug_cb(&s->memhp_state, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
> acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp);
> + } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + acpi_pcihp_device_unplug_cb(hotplug_dev, &s->pcihp_state, dev, errp);
> } else {
> error_setg(errp, "acpi: device unplug for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> @@ -510,6 +526,7 @@ static void acpi_ged_class_init(ObjectClass *class, const void *data)
> dc->vmsd = &vmstate_acpi_ged;
> dc->realize = acpi_ged_realize;
>
> + hc->pre_plug = acpi_ged_device_pre_plug_cb;
> hc->plug = acpi_ged_device_plug_cb;
> hc->unplug_request = acpi_ged_unplug_request_cb;
> hc->unplug = acpi_ged_unplug_cb;
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 22/29] hw/acpi/ged: Support migration of AcpiPciHpState
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (20 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 21/29] hw/acpi/ged: Call pcihp plug callbacks in hotplug handler implementation Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-16 9:46 ` [PATCH v3 23/29] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper Eric Auger
` (6 subsequent siblings)
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Add a subsection to migrate the AcpiPciHpState state.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
hw/acpi/generic_event_device.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index 2ae9ad082a..48b286ccb2 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -417,6 +417,25 @@ static const VMStateDescription vmstate_ghes_state = {
}
};
+static bool pcihp_needed(void *opaque)
+{
+ AcpiGedState *s = opaque;
+ return s->pcihp_state.use_acpi_hotplug_bridge;
+}
+
+static const VMStateDescription vmstate_pcihp_state = {
+ .name = "acpi-ged/pcihp",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .needed = pcihp_needed,
+ .fields = (const VMStateField[]) {
+ VMSTATE_PCI_HOTPLUG(pcihp_state,
+ AcpiGedState,
+ NULL, NULL),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static const VMStateDescription vmstate_acpi_ged = {
.name = "acpi-ged",
.version_id = 1,
@@ -429,6 +448,7 @@ static const VMStateDescription vmstate_acpi_ged = {
&vmstate_memhp_state,
&vmstate_cpuhp_state,
&vmstate_ghes_state,
+ &vmstate_pcihp_state,
NULL
}
};
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* [PATCH v3 23/29] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (21 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 22/29] hw/acpi/ged: Support migration of AcpiPciHpState Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 10:13 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 24/29] hw/arm/virt: Use a SysBusDevice variable in create_acpi_ged() Eric Auger
` (5 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Some sysbus devices have conditionnal mmio regions. This
happens for instance with the hw/acpi/ged device. In that case
it becomes difficult to predict which index a specific MMIO
region corresponds to when one needs to mmio map the region.
Introduce a new helper that takes the name of the region instead
of its index. If the region is not found this returns -1.
Otherwise it maps the corresponding index and returns this latter.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
include/hw/sysbus.h | 1 +
hw/core/sysbus.c | 11 +++++++++++
2 files changed, 12 insertions(+)
diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h
index 7dc88aaa27..18fde8a7b4 100644
--- a/include/hw/sysbus.h
+++ b/include/hw/sysbus.h
@@ -82,6 +82,7 @@ void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq);
bool sysbus_is_irq_connected(SysBusDevice *dev, int n);
qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n);
void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr);
+int sysbus_mmio_map_name(SysBusDevice *dev, const char*name, hwaddr addr);
void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,
int priority);
diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index e71367adfb..ec69e877a2 100644
--- a/hw/core/sysbus.c
+++ b/hw/core/sysbus.c
@@ -151,6 +151,17 @@ void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr)
sysbus_mmio_map_common(dev, n, addr, false, 0);
}
+int sysbus_mmio_map_name(SysBusDevice *dev, const char *name, hwaddr addr)
+{
+ for (int i = 0; i < dev->num_mmio; i++) {
+ if (!strcmp(dev->mmio[i].memory->name, name)) {
+ sysbus_mmio_map(dev, i, addr);
+ return i;
+ }
+ }
+ return -1;
+}
+
void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,
int priority)
{
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 23/29] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper
2025-06-16 9:46 ` [PATCH v3 23/29] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper Eric Auger
@ 2025-06-20 10:13 ` Jonathan Cameron via
0 siblings, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 10:13 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:52 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Some sysbus devices have conditionnal mmio regions. This
Spell check. conditional
> happens for instance with the hw/acpi/ged device. In that case
> it becomes difficult to predict which index a specific MMIO
> region corresponds to when one needs to mmio map the region.
> Introduce a new helper that takes the name of the region instead
> of its index. If the region is not found this returns -1.
> Otherwise it maps the corresponding index and returns this latter.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Nice helper.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> include/hw/sysbus.h | 1 +
> hw/core/sysbus.c | 11 +++++++++++
> 2 files changed, 12 insertions(+)
>
> diff --git a/include/hw/sysbus.h b/include/hw/sysbus.h
> index 7dc88aaa27..18fde8a7b4 100644
> --- a/include/hw/sysbus.h
> +++ b/include/hw/sysbus.h
> @@ -82,6 +82,7 @@ void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq);
> bool sysbus_is_irq_connected(SysBusDevice *dev, int n);
> qemu_irq sysbus_get_connected_irq(SysBusDevice *dev, int n);
> void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr);
> +int sysbus_mmio_map_name(SysBusDevice *dev, const char*name, hwaddr addr);
> void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,
> int priority);
>
> diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
> index e71367adfb..ec69e877a2 100644
> --- a/hw/core/sysbus.c
> +++ b/hw/core/sysbus.c
> @@ -151,6 +151,17 @@ void sysbus_mmio_map(SysBusDevice *dev, int n, hwaddr addr)
> sysbus_mmio_map_common(dev, n, addr, false, 0);
> }
>
> +int sysbus_mmio_map_name(SysBusDevice *dev, const char *name, hwaddr addr)
> +{
> + for (int i = 0; i < dev->num_mmio; i++) {
> + if (!strcmp(dev->mmio[i].memory->name, name)) {
> + sysbus_mmio_map(dev, i, addr);
> + return i;
> + }
> + }
> + return -1;
> +}
> +
> void sysbus_mmio_map_overlap(SysBusDevice *dev, int n, hwaddr addr,
> int priority)
> {
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 24/29] hw/arm/virt: Use a SysBusDevice variable in create_acpi_ged()
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (22 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 23/29] hw/core/sysbus: Introduce sysbus_mmio_map_name() helper Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 10:18 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
` (4 subsequent siblings)
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Use an intermediate SysBusDevice variable in create_acpi_ged().
This allows to get rid of multiple SYS_BUS_DEVICE() casts.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
hw/arm/virt.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 2f34877716..41be8f6dbb 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -683,6 +683,7 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
{
DeviceState *dev;
MachineState *ms = MACHINE(vms);
+ SysBusDevice *sbdev;
int irq = vms->irqmap[VIRT_ACPI_GED];
uint32_t event = ACPI_GED_PWR_DOWN_EVT;
@@ -697,11 +698,12 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
dev = qdev_new(TYPE_ACPI_GED);
qdev_prop_set_uint32(dev, "ged-event", event);
object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+ sbdev = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(sbdev, &error_fatal);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].base);
- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
- sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, irq));
+ sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
+ sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
+ sysbus_connect_irq(sbdev, 0, qdev_get_gpio_in(vms->gic, irq));
return dev;
}
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 24/29] hw/arm/virt: Use a SysBusDevice variable in create_acpi_ged()
2025-06-16 9:46 ` [PATCH v3 24/29] hw/arm/virt: Use a SysBusDevice variable in create_acpi_ged() Eric Auger
@ 2025-06-20 10:18 ` Jonathan Cameron via
0 siblings, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 10:18 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:53 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Use an intermediate SysBusDevice variable in create_acpi_ged().
> This allows to get rid of multiple SYS_BUS_DEVICE() casts.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (23 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 24/29] hw/arm/virt: Use a SysBusDevice variable in create_acpi_ged() Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 10:17 ` Jonathan Cameron via
2025-06-20 13:06 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks Eric Auger
` (3 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Set up the IO registers used to communicate between QEMU
and ACPI.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- remove acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
- use sysbus_mmio_map_name for all regs (Igor)
- create_pcie left at its original place
v1 -> v2:
- use ACPI_PCIHP_REGION_NAME
---
include/hw/acpi/generic_event_device.h | 1 +
hw/arm/virt.c | 19 +++++++++++++++++--
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
index ec8e1abe0a..8f5d903146 100644
--- a/include/hw/acpi/generic_event_device.h
+++ b/include/hw/acpi/generic_event_device.h
@@ -111,6 +111,7 @@ typedef struct GEDState {
} GEDState;
#define ACPI_PCIHP_REGION_NAME "pcihp container"
+#define ACPI_MEMHP_REGION_NAME "memhp container"
struct AcpiGedState {
SysBusDevice parent_obj;
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 41be8f6dbb..8c882e0794 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -684,6 +684,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
DeviceState *dev;
MachineState *ms = MACHINE(vms);
SysBusDevice *sbdev;
+ AcpiGedState *acpi_ged_state;
+ AcpiPciHpState *pcihp_state;
int irq = vms->irqmap[VIRT_ACPI_GED];
uint32_t event = ACPI_GED_PWR_DOWN_EVT;
@@ -696,13 +698,26 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
}
dev = qdev_new(TYPE_ACPI_GED);
+ acpi_ged_state = ACPI_GED(dev);
+ pcihp_state = &acpi_ged_state->pcihp_state;
+ if (pcihp_state->use_acpi_hotplug_bridge) {
+ event |= ACPI_GED_PCI_HOTPLUG_EVT;
+ }
qdev_prop_set_uint32(dev, "ged-event", event);
object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
sbdev = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(sbdev, &error_fatal);
- sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
- sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
+ sysbus_mmio_map_name(sbdev, TYPE_ACPI_GED, vms->memmap[VIRT_ACPI_GED].base);
+ sysbus_mmio_map_name(sbdev, ACPI_MEMHP_REGION_NAME,
+ vms->memmap[VIRT_PCDIMM_ACPI].base);
+ if (pcihp_state->use_acpi_hotplug_bridge) {
+ int pcihp_region_index;
+
+ pcihp_region_index = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
+ vms->memmap[VIRT_ACPI_PCIHP].base);
+ assert(pcihp_region_index >= 0);
+ }
sysbus_connect_irq(sbdev, 0, qdev_get_gpio_in(vms->gic, irq));
return dev;
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-06-16 9:46 ` [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
@ 2025-06-20 10:17 ` Jonathan Cameron via
2025-06-25 13:36 ` Eric Auger
2025-06-20 13:06 ` Igor Mammedov
1 sibling, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 10:17 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:54 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Set up the IO registers used to communicate between QEMU
> and ACPI.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
> v2 -> v3:
> - remove acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
> - use sysbus_mmio_map_name for all regs (Igor)
I'm very much in favor of this change but maybe break them out to
a separate patch - perhaps even one that can run ahead of the rest
of this series?
Mind you if this is going to land shortly perhaps not worth the bother.
Either way
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> - create_pcie left at its original place
>
> v1 -> v2:
> - use ACPI_PCIHP_REGION_NAME
> ---
> include/hw/acpi/generic_event_device.h | 1 +
> hw/arm/virt.c | 19 +++++++++++++++++--
> 2 files changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
> index ec8e1abe0a..8f5d903146 100644
> --- a/include/hw/acpi/generic_event_device.h
> +++ b/include/hw/acpi/generic_event_device.h
> @@ -111,6 +111,7 @@ typedef struct GEDState {
> } GEDState;
>
> #define ACPI_PCIHP_REGION_NAME "pcihp container"
> +#define ACPI_MEMHP_REGION_NAME "memhp container"
>
> struct AcpiGedState {
> SysBusDevice parent_obj;
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 41be8f6dbb..8c882e0794 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -684,6 +684,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> DeviceState *dev;
> MachineState *ms = MACHINE(vms);
> SysBusDevice *sbdev;
> + AcpiGedState *acpi_ged_state;
> + AcpiPciHpState *pcihp_state;
> int irq = vms->irqmap[VIRT_ACPI_GED];
> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
>
> @@ -696,13 +698,26 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> }
>
> dev = qdev_new(TYPE_ACPI_GED);
> + acpi_ged_state = ACPI_GED(dev);
> + pcihp_state = &acpi_ged_state->pcihp_state;
> + if (pcihp_state->use_acpi_hotplug_bridge) {
> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
> + }
> qdev_prop_set_uint32(dev, "ged-event", event);
> object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
> sbdev = SYS_BUS_DEVICE(dev);
> sysbus_realize_and_unref(sbdev, &error_fatal);
>
> - sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
> - sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
> + sysbus_mmio_map_name(sbdev, TYPE_ACPI_GED, vms->memmap[VIRT_ACPI_GED].base);
> + sysbus_mmio_map_name(sbdev, ACPI_MEMHP_REGION_NAME,
> + vms->memmap[VIRT_PCDIMM_ACPI].base);
> + if (pcihp_state->use_acpi_hotplug_bridge) {
> + int pcihp_region_index;
> +
> + pcihp_region_index = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
> + vms->memmap[VIRT_ACPI_PCIHP].base);
> + assert(pcihp_region_index >= 0);
> + }
> sysbus_connect_irq(sbdev, 0, qdev_get_gpio_in(vms->gic, irq));
>
> return dev;
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-06-20 10:17 ` Jonathan Cameron via
@ 2025-06-25 13:36 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-25 13:36 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 6/20/25 12:17 PM, Jonathan Cameron wrote:
> On Mon, 16 Jun 2025 11:46:54 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Set up the IO registers used to communicate between QEMU
>> and ACPI.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>
>> ---
>> v2 -> v3:
>> - remove acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
>> - use sysbus_mmio_map_name for all regs (Igor)
> I'm very much in favor of this change but maybe break them out to
> a separate patch - perhaps even one that can run ahead of the rest
> of this series?
I split it in a separate patch.
Thanks!
Eric
>
> Mind you if this is going to land shortly perhaps not worth the bother.
>
> Either way
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
>
>> - create_pcie left at its original place
>>
>> v1 -> v2:
>> - use ACPI_PCIHP_REGION_NAME
>> ---
>> include/hw/acpi/generic_event_device.h | 1 +
>> hw/arm/virt.c | 19 +++++++++++++++++--
>> 2 files changed, 18 insertions(+), 2 deletions(-)
>>
>> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
>> index ec8e1abe0a..8f5d903146 100644
>> --- a/include/hw/acpi/generic_event_device.h
>> +++ b/include/hw/acpi/generic_event_device.h
>> @@ -111,6 +111,7 @@ typedef struct GEDState {
>> } GEDState;
>>
>> #define ACPI_PCIHP_REGION_NAME "pcihp container"
>> +#define ACPI_MEMHP_REGION_NAME "memhp container"
>>
>> struct AcpiGedState {
>> SysBusDevice parent_obj;
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 41be8f6dbb..8c882e0794 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -684,6 +684,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>> DeviceState *dev;
>> MachineState *ms = MACHINE(vms);
>> SysBusDevice *sbdev;
>> + AcpiGedState *acpi_ged_state;
>> + AcpiPciHpState *pcihp_state;
>> int irq = vms->irqmap[VIRT_ACPI_GED];
>> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
>>
>> @@ -696,13 +698,26 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>> }
>>
>> dev = qdev_new(TYPE_ACPI_GED);
>> + acpi_ged_state = ACPI_GED(dev);
>> + pcihp_state = &acpi_ged_state->pcihp_state;
>> + if (pcihp_state->use_acpi_hotplug_bridge) {
>> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
>> + }
>> qdev_prop_set_uint32(dev, "ged-event", event);
>> object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
>> sbdev = SYS_BUS_DEVICE(dev);
>> sysbus_realize_and_unref(sbdev, &error_fatal);
>>
>> - sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
>> - sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
>> + sysbus_mmio_map_name(sbdev, TYPE_ACPI_GED, vms->memmap[VIRT_ACPI_GED].base);
>> + sysbus_mmio_map_name(sbdev, ACPI_MEMHP_REGION_NAME,
>> + vms->memmap[VIRT_PCDIMM_ACPI].base);
>> + if (pcihp_state->use_acpi_hotplug_bridge) {
>> + int pcihp_region_index;
>> +
>> + pcihp_region_index = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
>> + vms->memmap[VIRT_ACPI_PCIHP].base);
>> + assert(pcihp_region_index >= 0);
>> + }
>> sysbus_connect_irq(sbdev, 0, qdev_get_gpio_in(vms->gic, irq));
>>
>> return dev;
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-06-16 9:46 ` [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
2025-06-20 10:17 ` Jonathan Cameron via
@ 2025-06-20 13:06 ` Igor Mammedov
2025-06-25 13:37 ` Eric Auger
1 sibling, 1 reply; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 13:06 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:54 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Set up the IO registers used to communicate between QEMU
> and ACPI.
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> ---
> v2 -> v3:
> - remove acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
> - use sysbus_mmio_map_name for all regs (Igor)
> - create_pcie left at its original place
>
> v1 -> v2:
> - use ACPI_PCIHP_REGION_NAME
> ---
> include/hw/acpi/generic_event_device.h | 1 +
> hw/arm/virt.c | 19 +++++++++++++++++--
> 2 files changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
> index ec8e1abe0a..8f5d903146 100644
> --- a/include/hw/acpi/generic_event_device.h
> +++ b/include/hw/acpi/generic_event_device.h
> @@ -111,6 +111,7 @@ typedef struct GEDState {
> } GEDState;
>
> #define ACPI_PCIHP_REGION_NAME "pcihp container"
> +#define ACPI_MEMHP_REGION_NAME "memhp container"
>
> struct AcpiGedState {
> SysBusDevice parent_obj;
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 41be8f6dbb..8c882e0794 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -684,6 +684,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> DeviceState *dev;
> MachineState *ms = MACHINE(vms);
> SysBusDevice *sbdev;
> + AcpiGedState *acpi_ged_state;
> + AcpiPciHpState *pcihp_state;
> int irq = vms->irqmap[VIRT_ACPI_GED];
> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
>
> @@ -696,13 +698,26 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
> }
>
> dev = qdev_new(TYPE_ACPI_GED);
> + acpi_ged_state = ACPI_GED(dev);
> + pcihp_state = &acpi_ged_state->pcihp_state;
> + if (pcihp_state->use_acpi_hotplug_bridge) {
> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
> + }
Doesn't it belong to ged_realize()?
> qdev_prop_set_uint32(dev, "ged-event", event);
> object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
> sbdev = SYS_BUS_DEVICE(dev);
> sysbus_realize_and_unref(sbdev, &error_fatal);
>
> - sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
> - sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
> + sysbus_mmio_map_name(sbdev, TYPE_ACPI_GED, vms->memmap[VIRT_ACPI_GED].base);
> + sysbus_mmio_map_name(sbdev, ACPI_MEMHP_REGION_NAME,
> + vms->memmap[VIRT_PCDIMM_ACPI].base);
> + if (pcihp_state->use_acpi_hotplug_bridge) {
like elsewhere, use property accessor
> + int pcihp_region_index;
> +
> + pcihp_region_index = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
> + vms->memmap[VIRT_ACPI_PCIHP].base);
> + assert(pcihp_region_index >= 0);
> + }
> sysbus_connect_irq(sbdev, 0, qdev_get_gpio_in(vms->gic, irq));
>
> return dev;
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event
2025-06-20 13:06 ` Igor Mammedov
@ 2025-06-25 13:37 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-25 13:37 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 6/20/25 3:06 PM, Igor Mammedov wrote:
> On Mon, 16 Jun 2025 11:46:54 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Set up the IO registers used to communicate between QEMU
>> and ACPI.
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>>
>> ---
>> v2 -> v3:
>> - remove acpi_ged_state->pcihp_state.use_acpi_hotplug_bridge = true;
>> - use sysbus_mmio_map_name for all regs (Igor)
>> - create_pcie left at its original place
>>
>> v1 -> v2:
>> - use ACPI_PCIHP_REGION_NAME
>> ---
>> include/hw/acpi/generic_event_device.h | 1 +
>> hw/arm/virt.c | 19 +++++++++++++++++--
>> 2 files changed, 18 insertions(+), 2 deletions(-)
>>
>> diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h
>> index ec8e1abe0a..8f5d903146 100644
>> --- a/include/hw/acpi/generic_event_device.h
>> +++ b/include/hw/acpi/generic_event_device.h
>> @@ -111,6 +111,7 @@ typedef struct GEDState {
>> } GEDState;
>>
>> #define ACPI_PCIHP_REGION_NAME "pcihp container"
>> +#define ACPI_MEMHP_REGION_NAME "memhp container"
>>
>> struct AcpiGedState {
>> SysBusDevice parent_obj;
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 41be8f6dbb..8c882e0794 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -684,6 +684,8 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>> DeviceState *dev;
>> MachineState *ms = MACHINE(vms);
>> SysBusDevice *sbdev;
>> + AcpiGedState *acpi_ged_state;
>> + AcpiPciHpState *pcihp_state;
>> int irq = vms->irqmap[VIRT_ACPI_GED];
>> uint32_t event = ACPI_GED_PWR_DOWN_EVT;
>>
>> @@ -696,13 +698,26 @@ static inline DeviceState *create_acpi_ged(VirtMachineState *vms)
>> }
>>
>> dev = qdev_new(TYPE_ACPI_GED);
>> + acpi_ged_state = ACPI_GED(dev);
>> + pcihp_state = &acpi_ged_state->pcihp_state;
>> + if (pcihp_state->use_acpi_hotplug_bridge) {
>> + event |= ACPI_GED_PCI_HOTPLUG_EVT;
>> + }
> Doesn't it belong to ged_realize()?
moved there
>
>> qdev_prop_set_uint32(dev, "ged-event", event);
>> object_property_set_link(OBJECT(dev), "bus", OBJECT(vms->bus), &error_abort);
>> sbdev = SYS_BUS_DEVICE(dev);
>> sysbus_realize_and_unref(sbdev, &error_fatal);
>>
>> - sysbus_mmio_map(sbdev, 0, vms->memmap[VIRT_ACPI_GED].base);
>> - sysbus_mmio_map(sbdev, 1, vms->memmap[VIRT_PCDIMM_ACPI].base);
>> + sysbus_mmio_map_name(sbdev, TYPE_ACPI_GED, vms->memmap[VIRT_ACPI_GED].base);
>> + sysbus_mmio_map_name(sbdev, ACPI_MEMHP_REGION_NAME,
>> + vms->memmap[VIRT_PCDIMM_ACPI].base);
>> + if (pcihp_state->use_acpi_hotplug_bridge) {
> like elsewhere, use property accessor
yup
Thanks!
Eric
>
>> + int pcihp_region_index;
>> +
>> + pcihp_region_index = sysbus_mmio_map_name(sbdev, ACPI_PCIHP_REGION_NAME,
>> + vms->memmap[VIRT_ACPI_PCIHP].base);
>> + assert(pcihp_region_index >= 0);
>> + }
>> sysbus_connect_irq(sbdev, 0, qdev_get_gpio_in(vms->gic, irq));
>>
>> return dev;
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (24 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 25/29] hw/arm/virt: Let virt support pci hotplug/unplug GED event Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 10:28 ` Jonathan Cameron via
2025-06-20 13:10 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 27/29] tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests Eric Auger
` (2 subsequent siblings)
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
v2 -> v3:
- fix cohabitation with virtio-mem-pci device and tested
hotplug/unplug of this latter (Igor)
---
hw/arm/virt.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 69 insertions(+), 3 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 8c882e0794..06b87e1050 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1747,6 +1747,22 @@ static void virt_build_smbios(VirtMachineState *vms)
}
}
+static AcpiPciHpState *get_acpi_pcihp_state(VirtMachineState *vms)
+{
+ AcpiGedState *acpi_ged_state;
+ AcpiPciHpState *pcihp_state;
+
+ if (!vms->acpi_dev) {
+ return NULL;
+ }
+ acpi_ged_state = ACPI_GED(vms->acpi_dev);
+ pcihp_state = &acpi_ged_state->pcihp_state;
+ if (pcihp_state->use_acpi_hotplug_bridge) {
+ return pcihp_state;
+ }
+ return NULL;
+}
+
static
void virt_machine_done(Notifier *notifier, void *data)
{
@@ -2907,6 +2923,13 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev,
{
VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
+ if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ if (get_acpi_pcihp_state(vms)) {
+ acpi_pcihp_device_pre_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ dev, errp);
+ }
+ }
+
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
virt_memory_pre_plug(hotplug_dev, dev, errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
@@ -2961,6 +2984,15 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
}
}
+ if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
+
+ if (pcihp_state) {
+ acpi_pcihp_device_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ pcihp_state, dev, errp);
+ }
+ }
+
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
virt_memory_plug(hotplug_dev, dev, errp);
} else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
@@ -3017,12 +3049,27 @@ out:
static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
+ bool supported = false;
+
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
virt_dimm_unplug_request(hotplug_dev, dev, errp);
+ supported = true;
} else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
virtio_md_pci_unplug_request(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev),
errp);
- } else {
+ supported = true;
+ }
+ if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
+ AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
+
+ if (pcihp_state) {
+ acpi_pcihp_device_unplug_request_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ pcihp_state, dev, errp);
+ supported = true;
+ }
+ }
+ if (!supported) {
error_setg(errp, "device unplug request for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
}
@@ -3031,11 +3078,27 @@ static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
static void virt_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
+ bool supported = false;
+
if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
virt_dimm_unplug(hotplug_dev, dev, errp);
+ supported = true;
} else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
virtio_md_pci_unplug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), errp);
- } else {
+ supported = true;
+ }
+ if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
+ VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
+
+ AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
+
+ if (pcihp_state) {
+ acpi_pcihp_device_unplug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
+ pcihp_state, dev, errp);
+ supported = true;
+ }
+ }
+ if (!supported) {
error_setg(errp, "virt: device unplug for unsupported device"
" type: %s", object_get_typename(OBJECT(dev)));
}
@@ -3045,11 +3108,14 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine,
DeviceState *dev)
{
MachineClass *mc = MACHINE_GET_CLASS(machine);
+ VirtMachineState *vms = VIRT_MACHINE(machine);
if (device_is_dynamic_sysbus(mc, dev) ||
object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI) ||
- object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
+ object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) ||
+ (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE) &&
+ get_acpi_pcihp_state(vms))) {
return HOTPLUG_HANDLER(machine);
}
return NULL;
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
2025-06-16 9:46 ` [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks Eric Auger
@ 2025-06-20 10:28 ` Jonathan Cameron via
2025-06-20 13:10 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 10:28 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:55 +0200
Eric Auger <eric.auger@redhat.com> wrote:
Maybe needs a little bit of description.
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
A few trivial things inline.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
> ---
> v2 -> v3:
> - fix cohabitation with virtio-mem-pci device and tested
> hotplug/unplug of this latter (Igor)
> ---
> hw/arm/virt.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 69 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 8c882e0794..06b87e1050 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -1747,6 +1747,22 @@ static void virt_build_smbios(VirtMachineState *vms)
> }
> }
>
> +static AcpiPciHpState *get_acpi_pcihp_state(VirtMachineState *vms)
> +{
> + AcpiGedState *acpi_ged_state;
> + AcpiPciHpState *pcihp_state;
> +
> + if (!vms->acpi_dev) {
> + return NULL;
> + }
> + acpi_ged_state = ACPI_GED(vms->acpi_dev);
> + pcihp_state = &acpi_ged_state->pcihp_state;
> + if (pcihp_state->use_acpi_hotplug_bridge) {
> + return pcihp_state;
> + }
> + return NULL;
Really trivial but if this isn't going to gain extra stuff I'd consider
the NULL return the 'error' path and prefer that out of line for consistency.
That is.
if(!pcihp_state->use_acpi_hotplug_bridge) {
return NULL;
}
return pcihp_state;
That just ends up a tiny bit more consistent with the !vms->acpi_dev test
earlier in the function.
> +}
> +
> static
> void virt_machine_done(Notifier *notifier, void *data)
> {
> @@ -2907,6 +2923,13 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev,
> {
> VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
>
Maybe add a comment on why this is not in the if/else stack. I assume
because a few of those are also TYPE_PCI_DEVICE.
Something in the patch description would also work for me.
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + if (get_acpi_pcihp_state(vms)) {
> + acpi_pcihp_device_pre_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + dev, errp);
> + }
> + }
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_memory_pre_plug(hotplug_dev, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> @@ -2961,6 +2984,15 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
> }
> }
>
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
> +
> + if (pcihp_state) {
> + acpi_pcihp_device_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + pcihp_state, dev, errp);
> + }
> + }
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_memory_plug(hotplug_dev, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> @@ -3017,12 +3049,27 @@ out:
> static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
> DeviceState *dev, Error **errp)
> {
> + bool supported = false;
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_dimm_unplug_request(hotplug_dev, dev, errp);
> + supported = true;
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> virtio_md_pci_unplug_request(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev),
> errp);
> - } else {
> + supported = true;
> + }
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
> +
> + if (pcihp_state) {
> + acpi_pcihp_device_unplug_request_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + pcihp_state, dev, errp);
> + supported = true;
> + }
> + }
> + if (!supported) {
> error_setg(errp, "device unplug request for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> }
> @@ -3031,11 +3078,27 @@ static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
> static void virt_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
> DeviceState *dev, Error **errp)
> {
> + bool supported = false;
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_dimm_unplug(hotplug_dev, dev, errp);
> + supported = true;
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> virtio_md_pci_unplug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), errp);
> - } else {
> + supported = true;
> + }
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
> +
> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
> +
> + if (pcihp_state) {
> + acpi_pcihp_device_unplug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + pcihp_state, dev, errp);
> + supported = true;
> + }
> + }
> + if (!supported) {
> error_setg(errp, "virt: device unplug for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> }
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
2025-06-16 9:46 ` [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks Eric Auger
2025-06-20 10:28 ` Jonathan Cameron via
@ 2025-06-20 13:10 ` Igor Mammedov
2025-06-26 8:16 ` Eric Auger
1 sibling, 1 reply; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 13:10 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:55 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
why do we still need this?
pcihp code should override native pcie bus handlers, and then
when device_add calls bus hotplug handlers it will be pcihp ones.
> ---
> v2 -> v3:
> - fix cohabitation with virtio-mem-pci device and tested
> hotplug/unplug of this latter (Igor)
> ---
> hw/arm/virt.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++---
> 1 file changed, 69 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 8c882e0794..06b87e1050 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -1747,6 +1747,22 @@ static void virt_build_smbios(VirtMachineState *vms)
> }
> }
>
> +static AcpiPciHpState *get_acpi_pcihp_state(VirtMachineState *vms)
> +{
> + AcpiGedState *acpi_ged_state;
> + AcpiPciHpState *pcihp_state;
> +
> + if (!vms->acpi_dev) {
> + return NULL;
> + }
> + acpi_ged_state = ACPI_GED(vms->acpi_dev);
> + pcihp_state = &acpi_ged_state->pcihp_state;
> + if (pcihp_state->use_acpi_hotplug_bridge) {
> + return pcihp_state;
> + }
> + return NULL;
> +}
> +
> static
> void virt_machine_done(Notifier *notifier, void *data)
> {
> @@ -2907,6 +2923,13 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev,
> {
> VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
>
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + if (get_acpi_pcihp_state(vms)) {
> + acpi_pcihp_device_pre_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + dev, errp);
> + }
> + }
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_memory_pre_plug(hotplug_dev, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> @@ -2961,6 +2984,15 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
> }
> }
>
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
> +
> + if (pcihp_state) {
> + acpi_pcihp_device_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + pcihp_state, dev, errp);
> + }
> + }
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_memory_plug(hotplug_dev, dev, errp);
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> @@ -3017,12 +3049,27 @@ out:
> static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
> DeviceState *dev, Error **errp)
> {
> + bool supported = false;
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_dimm_unplug_request(hotplug_dev, dev, errp);
> + supported = true;
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> virtio_md_pci_unplug_request(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev),
> errp);
> - } else {
> + supported = true;
> + }
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
> +
> + if (pcihp_state) {
> + acpi_pcihp_device_unplug_request_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + pcihp_state, dev, errp);
> + supported = true;
> + }
> + }
> + if (!supported) {
> error_setg(errp, "device unplug request for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> }
> @@ -3031,11 +3078,27 @@ static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
> static void virt_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
> DeviceState *dev, Error **errp)
> {
> + bool supported = false;
> +
> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
> virt_dimm_unplug(hotplug_dev, dev, errp);
> + supported = true;
> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
> virtio_md_pci_unplug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), errp);
> - } else {
> + supported = true;
> + }
> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
> + VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
> +
> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
> +
> + if (pcihp_state) {
> + acpi_pcihp_device_unplug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
> + pcihp_state, dev, errp);
> + supported = true;
> + }
> + }
> + if (!supported) {
> error_setg(errp, "virt: device unplug for unsupported device"
> " type: %s", object_get_typename(OBJECT(dev)));
> }
> @@ -3045,11 +3108,14 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine,
> DeviceState *dev)
> {
> MachineClass *mc = MACHINE_GET_CLASS(machine);
> + VirtMachineState *vms = VIRT_MACHINE(machine);
>
> if (device_is_dynamic_sysbus(mc, dev) ||
> object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
> object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI) ||
> - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
> + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) ||
> + (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE) &&
> + get_acpi_pcihp_state(vms))) {
> return HOTPLUG_HANDLER(machine);
> }
> return NULL;
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks
2025-06-20 13:10 ` Igor Mammedov
@ 2025-06-26 8:16 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-26 8:16 UTC (permalink / raw)
To: Igor Mammedov
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
Hi Igor,
On 6/20/25 3:10 PM, Igor Mammedov wrote:
> On Mon, 16 Jun 2025 11:46:55 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> why do we still need this?
>
> pcihp code should override native pcie bus handlers, and then
> when device_add calls bus hotplug handlers it will be pcihp ones.
It was needed because I did not call qbus_set_hotplug_handler() as done in
ich9.c. So I think I should be able to get rid of this patch
Thanks
Eric
>
>> ---
>> v2 -> v3:
>> - fix cohabitation with virtio-mem-pci device and tested
>> hotplug/unplug of this latter (Igor)
>> ---
>> hw/arm/virt.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++++---
>> 1 file changed, 69 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
>> index 8c882e0794..06b87e1050 100644
>> --- a/hw/arm/virt.c
>> +++ b/hw/arm/virt.c
>> @@ -1747,6 +1747,22 @@ static void virt_build_smbios(VirtMachineState *vms)
>> }
>> }
>>
>> +static AcpiPciHpState *get_acpi_pcihp_state(VirtMachineState *vms)
>> +{
>> + AcpiGedState *acpi_ged_state;
>> + AcpiPciHpState *pcihp_state;
>> +
>> + if (!vms->acpi_dev) {
>> + return NULL;
>> + }
>> + acpi_ged_state = ACPI_GED(vms->acpi_dev);
>> + pcihp_state = &acpi_ged_state->pcihp_state;
>> + if (pcihp_state->use_acpi_hotplug_bridge) {
>> + return pcihp_state;
>> + }
>> + return NULL;
>> +}
>> +
>> static
>> void virt_machine_done(Notifier *notifier, void *data)
>> {
>> @@ -2907,6 +2923,13 @@ static void virt_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev,
>> {
>> VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
>>
>> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
>> + if (get_acpi_pcihp_state(vms)) {
>> + acpi_pcihp_device_pre_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
>> + dev, errp);
>> + }
>> + }
>> +
>> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
>> virt_memory_pre_plug(hotplug_dev, dev, errp);
>> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
>> @@ -2961,6 +2984,15 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev,
>> }
>> }
>>
>> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
>> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
>> +
>> + if (pcihp_state) {
>> + acpi_pcihp_device_plug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
>> + pcihp_state, dev, errp);
>> + }
>> + }
>> +
>> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
>> virt_memory_plug(hotplug_dev, dev, errp);
>> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
>> @@ -3017,12 +3049,27 @@ out:
>> static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
>> DeviceState *dev, Error **errp)
>> {
>> + bool supported = false;
>> +
>> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
>> virt_dimm_unplug_request(hotplug_dev, dev, errp);
>> + supported = true;
>> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
>> virtio_md_pci_unplug_request(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev),
>> errp);
>> - } else {
>> + supported = true;
>> + }
>> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
>> + VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
>> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
>> +
>> + if (pcihp_state) {
>> + acpi_pcihp_device_unplug_request_cb(HOTPLUG_HANDLER(vms->acpi_dev),
>> + pcihp_state, dev, errp);
>> + supported = true;
>> + }
>> + }
>> + if (!supported) {
>> error_setg(errp, "device unplug request for unsupported device"
>> " type: %s", object_get_typename(OBJECT(dev)));
>> }
>> @@ -3031,11 +3078,27 @@ static void virt_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
>> static void virt_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
>> DeviceState *dev, Error **errp)
>> {
>> + bool supported = false;
>> +
>> if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
>> virt_dimm_unplug(hotplug_dev, dev, errp);
>> + supported = true;
>> } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI)) {
>> virtio_md_pci_unplug(VIRTIO_MD_PCI(dev), MACHINE(hotplug_dev), errp);
>> - } else {
>> + supported = true;
>> + }
>> + if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
>> + VirtMachineState *vms = VIRT_MACHINE(hotplug_dev);
>> +
>> + AcpiPciHpState *pcihp_state = get_acpi_pcihp_state(vms);
>> +
>> + if (pcihp_state) {
>> + acpi_pcihp_device_unplug_cb(HOTPLUG_HANDLER(vms->acpi_dev),
>> + pcihp_state, dev, errp);
>> + supported = true;
>> + }
>> + }
>> + if (!supported) {
>> error_setg(errp, "virt: device unplug for unsupported device"
>> " type: %s", object_get_typename(OBJECT(dev)));
>> }
>> @@ -3045,11 +3108,14 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine,
>> DeviceState *dev)
>> {
>> MachineClass *mc = MACHINE_GET_CLASS(machine);
>> + VirtMachineState *vms = VIRT_MACHINE(machine);
>>
>> if (device_is_dynamic_sysbus(mc, dev) ||
>> object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
>> object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MD_PCI) ||
>> - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) {
>> + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI) ||
>> + (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE) &&
>> + get_acpi_pcihp_state(vms))) {
>> return HOTPLUG_HANDLER(machine);
>> }
>> return NULL;
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 27/29] tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (25 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 26/29] hw/arm/virt: Plug pcihp hotplug/hotunplug callbacks Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 10:31 ` Jonathan Cameron via
2025-06-16 9:46 ` [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test Eric Auger
2025-06-16 9:46 ` [PATCH v3 29/29] qtest/bios-tables-test: Create DSDT 'acpipcihp" variant blob Eric Auger
28 siblings, 1 reply; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
From: Gustavo Romero <gustavo.romero@linaro.org>
Soon we will introduce a new test related to ACPI PCI hotplug that
will use a new reference blob:
tests/data/acpi/aarch64/virt/DSDT.acpipcihp
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 +
tests/data/acpi/aarch64/virt/DSDT.acpipcihp | 0
2 files changed, 1 insertion(+)
create mode 100644 tests/data/acpi/aarch64/virt/DSDT.acpipcihp
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..dc3ab24d05 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/aarch64/virt/DSDT.acpipcihp",
diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpipcihp b/tests/data/acpi/aarch64/virt/DSDT.acpipcihp
new file mode 100644
index 0000000000..e69de29bb2
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 27/29] tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests
2025-06-16 9:46 ` [PATCH v3 27/29] tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests Eric Auger
@ 2025-06-20 10:31 ` Jonathan Cameron via
2025-06-20 13:11 ` Igor Mammedov
2025-06-23 15:07 ` Eric Auger
0 siblings, 2 replies; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 10:31 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:56 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> Soon we will introduce a new test related to ACPI PCI hotplug that
> will use a new reference blob:
>
> tests/data/acpi/aarch64/virt/DSDT.acpipcihp
>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Unusual sign off chain. Eric is signing off as handling Gustavo's patch?
I'd expect Eric's sign off to be second. Looks good in the next patch fo
instance. With that fixed.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> ---
> tests/qtest/bios-tables-test-allowed-diff.h | 1 +
> tests/data/acpi/aarch64/virt/DSDT.acpipcihp | 0
> 2 files changed, 1 insertion(+)
> create mode 100644 tests/data/acpi/aarch64/virt/DSDT.acpipcihp
>
> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> index dfb8523c8b..dc3ab24d05 100644
> --- a/tests/qtest/bios-tables-test-allowed-diff.h
> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> @@ -1 +1,2 @@
> /* List of comma-separated changed AML files to ignore */
> +"tests/data/acpi/aarch64/virt/DSDT.acpipcihp",
> diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpipcihp b/tests/data/acpi/aarch64/virt/DSDT.acpipcihp
> new file mode 100644
> index 0000000000..e69de29bb2
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 27/29] tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests
2025-06-20 10:31 ` Jonathan Cameron via
@ 2025-06-20 13:11 ` Igor Mammedov
2025-06-23 15:07 ` Eric Auger
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 13:11 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 20 Jun 2025 11:31:38 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 16 Jun 2025 11:46:56 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > From: Gustavo Romero <gustavo.romero@linaro.org>
> >
> > Soon we will introduce a new test related to ACPI PCI hotplug that
> > will use a new reference blob:
> >
> > tests/data/acpi/aarch64/virt/DSDT.acpipcihp
> >
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
> > Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>
> Unusual sign off chain. Eric is signing off as handling Gustavo's patch?
> I'd expect Eric's sign off to be second. Looks good in the next patch fo
> instance. With that fixed.
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
>
> > ---
> > tests/qtest/bios-tables-test-allowed-diff.h | 1 +
> > tests/data/acpi/aarch64/virt/DSDT.acpipcihp | 0
> > 2 files changed, 1 insertion(+)
> > create mode 100644 tests/data/acpi/aarch64/virt/DSDT.acpipcihp
> >
> > diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
> > index dfb8523c8b..dc3ab24d05 100644
> > --- a/tests/qtest/bios-tables-test-allowed-diff.h
> > +++ b/tests/qtest/bios-tables-test-allowed-diff.h
> > @@ -1 +1,2 @@
> > /* List of comma-separated changed AML files to ignore */
> > +"tests/data/acpi/aarch64/virt/DSDT.acpipcihp",
> > diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpipcihp b/tests/data/acpi/aarch64/virt/DSDT.acpipcihp
> > new file mode 100644
> > index 0000000000..e69de29bb2
>
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 27/29] tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests
2025-06-20 10:31 ` Jonathan Cameron via
2025-06-20 13:11 ` Igor Mammedov
@ 2025-06-23 15:07 ` Eric Auger
1 sibling, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-23 15:07 UTC (permalink / raw)
To: Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
Hi Jonathan,
On 6/20/25 12:31 PM, Jonathan Cameron wrote:
> On Mon, 16 Jun 2025 11:46:56 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>
>> Soon we will introduce a new test related to ACPI PCI hotplug that
>> will use a new reference blob:
>>
>> tests/data/acpi/aarch64/virt/DSDT.acpipcihp
>>
>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Unusual sign off chain. Eric is signing off as handling Gustavo's patch?
> I'd expect Eric's sign off to be second. Looks good in the next patch fo
> instance. With that fixed.
Sure. sorry, unintentional. I did not know the rule either ;-)
Eric
>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
>
>> ---
>> tests/qtest/bios-tables-test-allowed-diff.h | 1 +
>> tests/data/acpi/aarch64/virt/DSDT.acpipcihp | 0
>> 2 files changed, 1 insertion(+)
>> create mode 100644 tests/data/acpi/aarch64/virt/DSDT.acpipcihp
>>
>> diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
>> index dfb8523c8b..dc3ab24d05 100644
>> --- a/tests/qtest/bios-tables-test-allowed-diff.h
>> +++ b/tests/qtest/bios-tables-test-allowed-diff.h
>> @@ -1 +1,2 @@
>> /* List of comma-separated changed AML files to ignore */
>> +"tests/data/acpi/aarch64/virt/DSDT.acpipcihp",
>> diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpipcihp b/tests/data/acpi/aarch64/virt/DSDT.acpipcihp
>> new file mode 100644
>> index 0000000000..e69de29bb2
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (26 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 27/29] tests/qtest/bios-tables-test: Prepare for addition of acpi pci hp tests Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
2025-06-20 10:40 ` Jonathan Cameron via
2025-06-20 13:18 ` Igor Mammedov
2025-06-16 9:46 ` [PATCH v3 29/29] qtest/bios-tables-test: Create DSDT 'acpipcihp" variant blob Eric Auger
28 siblings, 2 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
From: Gustavo Romero <gustavo.romero@linaro.org>
The test uses -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
to force the usage of ACPI PCI hotplug.
Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
tests/qtest/bios-tables-test.c | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 0b2bdf9d0d..4b9e391eaf 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1643,6 +1643,38 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
}
+static void test_acpi_aarch64_virt_acpi_pci_hotplug(void)
+{
+ test_data data = {
+ .machine = "virt",
+ .arch = "aarch64",
+ .tcg_only = true,
+ .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
+ .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
+ .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2",
+ .ram_start = 0x40000000ULL,
+ .scan_len = 256ULL * MiB,
+ .variant = ".acpipcihp",
+ };
+
+ /* Use ACPI PCI Hotplug */
+ test_acpi_one(" -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on"
+ " -cpu cortex-a57"
+ /*
+ * We just pick address=0x04 for the root port to avoid
+ * collisions with other PCI devices on the root bus (pcie.0).
+ * It could be any other value that doesn't collide.
+ *
+ * The 'chassis' and 'slot' options equal to 1 have no special
+ * meaning here, could be any integer, but we set them to known
+ * values to keep the test consistent.
+ */
+ " -device pcie-root-port,bus=pcie.0,chassis=1,slot=1,addr=0x04.0x00",
+ &data);
+
+ free_test_data(&data);
+}
+
static void test_acpi_microvm_prepare(test_data *data)
{
data->machine = "microvm";
@@ -2580,6 +2612,8 @@ int main(int argc, char *argv[])
qtest_add_func("acpi/virt/numamem",
test_acpi_aarch64_virt_tcg_numamem);
qtest_add_func("acpi/virt/memhp", test_acpi_aarch64_virt_tcg_memhp);
+ qtest_add_func("acpi/virt/acpipcihp",
+ test_acpi_aarch64_virt_acpi_pci_hotplug);
qtest_add_func("acpi/virt/pxb", test_acpi_aarch64_virt_tcg_pxb);
qtest_add_func("acpi/virt/oem-fields",
test_acpi_aarch64_virt_oem_fields);
--
2.49.0
^ permalink raw reply related [flat|nested] 87+ messages in thread* Re: [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test
2025-06-16 9:46 ` [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test Eric Auger
@ 2025-06-20 10:40 ` Jonathan Cameron via
2025-06-20 13:22 ` Igor Mammedov
2025-06-20 13:18 ` Igor Mammedov
1 sibling, 1 reply; 87+ messages in thread
From: Jonathan Cameron via @ 2025-06-20 10:40 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell, imammedo,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Mon, 16 Jun 2025 11:46:57 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> The test uses -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
> to force the usage of ACPI PCI hotplug.
>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
Could we add the necessary (I'm not quite sure what) to trigger the _DSM
creation so EDSM gets used? I'm not keen on that being dead code
wrt to tests on ARM.
Jonathan
> ---
> tests/qtest/bios-tables-test.c | 34 ++++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> index 0b2bdf9d0d..4b9e391eaf 100644
> --- a/tests/qtest/bios-tables-test.c
> +++ b/tests/qtest/bios-tables-test.c
> @@ -1643,6 +1643,38 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>
> }
>
> +static void test_acpi_aarch64_virt_acpi_pci_hotplug(void)
> +{
> + test_data data = {
> + .machine = "virt",
> + .arch = "aarch64",
> + .tcg_only = true,
> + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
> + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
> + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2",
> + .ram_start = 0x40000000ULL,
> + .scan_len = 256ULL * MiB,
> + .variant = ".acpipcihp",
> + };
> +
> + /* Use ACPI PCI Hotplug */
> + test_acpi_one(" -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on"
> + " -cpu cortex-a57"
> + /*
> + * We just pick address=0x04 for the root port to avoid
> + * collisions with other PCI devices on the root bus (pcie.0).
> + * It could be any other value that doesn't collide.
> + *
> + * The 'chassis' and 'slot' options equal to 1 have no special
> + * meaning here, could be any integer, but we set them to known
> + * values to keep the test consistent.
> + */
> + " -device pcie-root-port,bus=pcie.0,chassis=1,slot=1,addr=0x04.0x00",
> + &data);
> +
> + free_test_data(&data);
> +}
> +
> static void test_acpi_microvm_prepare(test_data *data)
> {
> data->machine = "microvm";
> @@ -2580,6 +2612,8 @@ int main(int argc, char *argv[])
> qtest_add_func("acpi/virt/numamem",
> test_acpi_aarch64_virt_tcg_numamem);
> qtest_add_func("acpi/virt/memhp", test_acpi_aarch64_virt_tcg_memhp);
> + qtest_add_func("acpi/virt/acpipcihp",
> + test_acpi_aarch64_virt_acpi_pci_hotplug);
> qtest_add_func("acpi/virt/pxb", test_acpi_aarch64_virt_tcg_pxb);
> qtest_add_func("acpi/virt/oem-fields",
> test_acpi_aarch64_virt_oem_fields);
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test
2025-06-20 10:40 ` Jonathan Cameron via
@ 2025-06-20 13:22 ` Igor Mammedov
2025-06-26 10:04 ` Eric Auger
0 siblings, 1 reply; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 13:22 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Eric Auger, eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On Fri, 20 Jun 2025 11:40:29 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 16 Jun 2025 11:46:57 +0200
> Eric Auger <eric.auger@redhat.com> wrote:
>
> > From: Gustavo Romero <gustavo.romero@linaro.org>
> >
> > The test uses -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
> > to force the usage of ACPI PCI hotplug.
> >
> > Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> > Signed-off-by: Eric Auger <eric.auger@redhat.com>
>
> Could we add the necessary (I'm not quite sure what) to trigger the _DSM
> creation so EDSM gets used? I'm not keen on that being dead code
> wrt to tests on ARM.
relevant x86 example:
" -device pcie-root-port,id=nohprp,port=0x0,chassis=2,hotplug=off,"
"addr=7.0"
" -device pci-testdev,bus=nohprp,acpi-index=501"
>
> Jonathan
>
>
>
> > ---
> > tests/qtest/bios-tables-test.c | 34 ++++++++++++++++++++++++++++++++++
> > 1 file changed, 34 insertions(+)
> >
> > diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> > index 0b2bdf9d0d..4b9e391eaf 100644
> > --- a/tests/qtest/bios-tables-test.c
> > +++ b/tests/qtest/bios-tables-test.c
> > @@ -1643,6 +1643,38 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
> >
> > }
> >
> > +static void test_acpi_aarch64_virt_acpi_pci_hotplug(void)
> > +{
> > + test_data data = {
> > + .machine = "virt",
> > + .arch = "aarch64",
> > + .tcg_only = true,
> > + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
> > + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
> > + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2",
> > + .ram_start = 0x40000000ULL,
> > + .scan_len = 256ULL * MiB,
> > + .variant = ".acpipcihp",
> > + };
> > +
> > + /* Use ACPI PCI Hotplug */
> > + test_acpi_one(" -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on"
> > + " -cpu cortex-a57"
> > + /*
> > + * We just pick address=0x04 for the root port to avoid
> > + * collisions with other PCI devices on the root bus (pcie.0).
> > + * It could be any other value that doesn't collide.
> > + *
> > + * The 'chassis' and 'slot' options equal to 1 have no special
> > + * meaning here, could be any integer, but we set them to known
> > + * values to keep the test consistent.
> > + */
> > + " -device pcie-root-port,bus=pcie.0,chassis=1,slot=1,addr=0x04.0x00",
> > + &data);
> > +
> > + free_test_data(&data);
> > +}
> > +
> > static void test_acpi_microvm_prepare(test_data *data)
> > {
> > data->machine = "microvm";
> > @@ -2580,6 +2612,8 @@ int main(int argc, char *argv[])
> > qtest_add_func("acpi/virt/numamem",
> > test_acpi_aarch64_virt_tcg_numamem);
> > qtest_add_func("acpi/virt/memhp", test_acpi_aarch64_virt_tcg_memhp);
> > + qtest_add_func("acpi/virt/acpipcihp",
> > + test_acpi_aarch64_virt_acpi_pci_hotplug);
> > qtest_add_func("acpi/virt/pxb", test_acpi_aarch64_virt_tcg_pxb);
> > qtest_add_func("acpi/virt/oem-fields",
> > test_acpi_aarch64_virt_oem_fields);
>
^ permalink raw reply [flat|nested] 87+ messages in thread* Re: [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test
2025-06-20 13:22 ` Igor Mammedov
@ 2025-06-26 10:04 ` Eric Auger
0 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-26 10:04 UTC (permalink / raw)
To: Igor Mammedov, Jonathan Cameron
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini, philmd,
alex.bennee
On 6/20/25 3:22 PM, Igor Mammedov wrote:
> On Fri, 20 Jun 2025 11:40:29 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
>> On Mon, 16 Jun 2025 11:46:57 +0200
>> Eric Auger <eric.auger@redhat.com> wrote:
>>
>>> From: Gustavo Romero <gustavo.romero@linaro.org>
>>>
>>> The test uses -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
>>> to force the usage of ACPI PCI hotplug.
>>>
>>> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
>>> Signed-off-by: Eric Auger <eric.auger@redhat.com>
>> Could we add the necessary (I'm not quite sure what) to trigger the _DSM
>> creation so EDSM gets used? I'm not keen on that being dead code
>> wrt to tests on ARM.
> relevant x86 example:
>
> " -device pcie-root-port,id=nohprp,port=0x0,chassis=2,hotplug=off,"
argh. I did not see hotplug=off.
So then static acpi-index also works on ARM. So I will make edsm
independent on acpi pcihp
Sorry for the noise
Eric
>
> "addr=7.0"
> " -device pci-testdev,bus=nohprp,acpi-index=501"
>> Jonathan
>>
>>
>>
>>> ---
>>> tests/qtest/bios-tables-test.c | 34 ++++++++++++++++++++++++++++++++++
>>> 1 file changed, 34 insertions(+)
>>>
>>> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
>>> index 0b2bdf9d0d..4b9e391eaf 100644
>>> --- a/tests/qtest/bios-tables-test.c
>>> +++ b/tests/qtest/bios-tables-test.c
>>> @@ -1643,6 +1643,38 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>>>
>>> }
>>>
>>> +static void test_acpi_aarch64_virt_acpi_pci_hotplug(void)
>>> +{
>>> + test_data data = {
>>> + .machine = "virt",
>>> + .arch = "aarch64",
>>> + .tcg_only = true,
>>> + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
>>> + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
>>> + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2",
>>> + .ram_start = 0x40000000ULL,
>>> + .scan_len = 256ULL * MiB,
>>> + .variant = ".acpipcihp",
>>> + };
>>> +
>>> + /* Use ACPI PCI Hotplug */
>>> + test_acpi_one(" -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on"
>>> + " -cpu cortex-a57"
>>> + /*
>>> + * We just pick address=0x04 for the root port to avoid
>>> + * collisions with other PCI devices on the root bus (pcie.0).
>>> + * It could be any other value that doesn't collide.
>>> + *
>>> + * The 'chassis' and 'slot' options equal to 1 have no special
>>> + * meaning here, could be any integer, but we set them to known
>>> + * values to keep the test consistent.
>>> + */
>>> + " -device pcie-root-port,bus=pcie.0,chassis=1,slot=1,addr=0x04.0x00",
>>> + &data);
>>> +
>>> + free_test_data(&data);
>>> +}
>>> +
>>> static void test_acpi_microvm_prepare(test_data *data)
>>> {
>>> data->machine = "microvm";
>>> @@ -2580,6 +2612,8 @@ int main(int argc, char *argv[])
>>> qtest_add_func("acpi/virt/numamem",
>>> test_acpi_aarch64_virt_tcg_numamem);
>>> qtest_add_func("acpi/virt/memhp", test_acpi_aarch64_virt_tcg_memhp);
>>> + qtest_add_func("acpi/virt/acpipcihp",
>>> + test_acpi_aarch64_virt_acpi_pci_hotplug);
>>> qtest_add_func("acpi/virt/pxb", test_acpi_aarch64_virt_tcg_pxb);
>>> qtest_add_func("acpi/virt/oem-fields",
>>> test_acpi_aarch64_virt_oem_fields);
^ permalink raw reply [flat|nested] 87+ messages in thread
* Re: [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test
2025-06-16 9:46 ` [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test Eric Auger
2025-06-20 10:40 ` Jonathan Cameron via
@ 2025-06-20 13:18 ` Igor Mammedov
1 sibling, 0 replies; 87+ messages in thread
From: Igor Mammedov @ 2025-06-20 13:18 UTC (permalink / raw)
To: Eric Auger
Cc: eric.auger.pro, qemu-devel, qemu-arm, peter.maydell,
gustavo.romero, anisinha, mst, shannon.zhaosl, pbonzini,
Jonathan.Cameron, philmd, alex.bennee
On Mon, 16 Jun 2025 11:46:57 +0200
Eric Auger <eric.auger@redhat.com> wrote:
> From: Gustavo Romero <gustavo.romero@linaro.org>
>
> The test uses -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on
> to force the usage of ACPI PCI hotplug.
>
> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> ---
> tests/qtest/bios-tables-test.c | 34 ++++++++++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
> index 0b2bdf9d0d..4b9e391eaf 100644
> --- a/tests/qtest/bios-tables-test.c
> +++ b/tests/qtest/bios-tables-test.c
> @@ -1643,6 +1643,38 @@ static void test_acpi_aarch64_virt_tcg_memhp(void)
>
> }
>
> +static void test_acpi_aarch64_virt_acpi_pci_hotplug(void)
> +{
> + test_data data = {
> + .machine = "virt",
> + .arch = "aarch64",
> + .tcg_only = true,
> + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd",
> + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd",
> + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2",
> + .ram_start = 0x40000000ULL,
> + .scan_len = 256ULL * MiB,
> + .variant = ".acpipcihp",
> + };
> +
> + /* Use ACPI PCI Hotplug */
> + test_acpi_one(" -global acpi-ged.acpi-pci-hotplug-with-bridge-support=on"
> + " -cpu cortex-a57"
> + /*
> + * We just pick address=0x04 for the root port to avoid
> + * collisions with other PCI devices on the root bus (pcie.0).
> + * It could be any other value that doesn't collide.
> + *
> + * The 'chassis' and 'slot' options equal to 1 have no special
shouldn't be slot be equal to 0 for pcie root ports?
> + * meaning here, could be any integer, but we set them to known
> + * values to keep the test consistent.
> + */
> + " -device pcie-root-port,bus=pcie.0,chassis=1,slot=1,addr=0x04.0x00",
> + &data);
> +
> + free_test_data(&data);
> +}
> +
> static void test_acpi_microvm_prepare(test_data *data)
> {
> data->machine = "microvm";
> @@ -2580,6 +2612,8 @@ int main(int argc, char *argv[])
> qtest_add_func("acpi/virt/numamem",
> test_acpi_aarch64_virt_tcg_numamem);
> qtest_add_func("acpi/virt/memhp", test_acpi_aarch64_virt_tcg_memhp);
> + qtest_add_func("acpi/virt/acpipcihp",
> + test_acpi_aarch64_virt_acpi_pci_hotplug);
> qtest_add_func("acpi/virt/pxb", test_acpi_aarch64_virt_tcg_pxb);
> qtest_add_func("acpi/virt/oem-fields",
> test_acpi_aarch64_virt_oem_fields);
^ permalink raw reply [flat|nested] 87+ messages in thread
* [PATCH v3 29/29] qtest/bios-tables-test: Create DSDT 'acpipcihp" variant blob
2025-06-16 9:46 [PATCH v3 00/29] ACPI PCI Hotplug support on ARM Eric Auger
` (27 preceding siblings ...)
2025-06-16 9:46 ` [PATCH v3 28/29] tests/qtest/bios-tables-test: Add aarch64 ACPI PCI hotplug test Eric Auger
@ 2025-06-16 9:46 ` Eric Auger
28 siblings, 0 replies; 87+ messages in thread
From: Eric Auger @ 2025-06-16 9:46 UTC (permalink / raw)
To: eric.auger.pro, eric.auger, qemu-devel, qemu-arm, peter.maydell,
imammedo, gustavo.romero, anisinha, mst, shannon.zhaosl
Cc: pbonzini, Jonathan.Cameron, philmd, alex.bennee
From: Gustavo Romero <gustavo.romero@linaro.org>
Update the .acpipcihp blob variant for the aarch64 'virt' machine.
Because this is a new blob, the diff is rather large.
@@ -1,2 +1,2110 @@
+/*
+ * Intel ACPI Component Architecture
+ * AML/ASL+ Disassembler version 20210604 (64-bit version)
+ * Copyright (c) 2000 - 2021 Intel Corporation
+ *
+ * Disassembling to symbolic ASL+ operators
+ *
+ * Disassembly of /tmp/aml-UTAS72, Sun Jun 15 10:03:40 2025
+ *
+ * Original Table Header:
+ * Signature "DSDT"
+ * Length 0x00001755 (5973)
+ * Revision 0x02
+ * Checksum 0xF3
+ * OEM ID "BOCHS "
+ * OEM Table ID "BXPC "
+ * OEM Revision 0x00000001 (1)
+ * Compiler ID "BXPC"
+ * Compiler Version 0x00000001 (1)
+ */
+DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
+{
+ Scope (\_SB)
+ {
+ Device (C000)
+ {
+ Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ }
+ Device (COM0)
+ {
+ Name (_HID, "ARMH0011") // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x09000000, // Address Base
+ 0x00001000, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000021,
+ }
+ })
+ }
+
+ Device (FWCF)
+ {
+ Name (_HID, "QEMU0002") // _HID: Hardware ID
+ Name (_STA, 0x0B) // _STA: Status
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x09020000, // Address Base
+ 0x00000018, // Address Length
+ )
+ })
+ }
+
+ Device (VR00)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000000, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000030,
+ }
+ })
+ }
+
+ Device (VR01)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, One) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000200, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000031,
+ }
+ })
+ }
+
+ Device (VR02)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x02) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000400, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000032,
+ }
+ })
+ }
+
+ Device (VR03)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x03) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000600, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000033,
+ }
+ })
+ }
+
+ Device (VR04)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x04) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000800, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000034,
+ }
+ })
+ }
+
+ Device (VR05)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x05) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000A00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000035,
+ }
+ })
+ }
+
+ Device (VR06)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x06) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000C00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000036,
+ }
+ })
+ }
+
+ Device (VR07)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x07) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A000E00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000037,
+ }
+ })
+ }
+
+ Device (VR08)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x08) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001000, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000038,
+ }
+ })
+ }
+
+ Device (VR09)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x09) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001200, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000039,
+ }
+ })
+ }
+
+ Device (VR10)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x0A) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001400, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000003A,
+ }
+ })
+ }
+
+ Device (VR11)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x0B) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001600, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000003B,
+ }
+ })
+ }
+
+ Device (VR12)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x0C) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001800, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000003C,
+ }
+ })
+ }
+
+ Device (VR13)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x0D) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001A00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000003D,
+ }
+ })
+ }
+
+ Device (VR14)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x0E) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001C00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000003E,
+ }
+ })
+ }
+
+ Device (VR15)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x0F) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A001E00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000003F,
+ }
+ })
+ }
+
+ Device (VR16)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x10) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002000, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000040,
+ }
+ })
+ }
+
+ Device (VR17)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x11) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002200, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000041,
+ }
+ })
+ }
+
+ Device (VR18)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x12) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002400, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000042,
+ }
+ })
+ }
+
+ Device (VR19)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x13) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002600, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000043,
+ }
+ })
+ }
+
+ Device (VR20)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x14) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002800, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000044,
+ }
+ })
+ }
+
+ Device (VR21)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x15) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002A00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000045,
+ }
+ })
+ }
+
+ Device (VR22)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x16) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002C00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000046,
+ }
+ })
+ }
+
+ Device (VR23)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x17) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A002E00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000047,
+ }
+ })
+ }
+
+ Device (VR24)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x18) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003000, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000048,
+ }
+ })
+ }
+
+ Device (VR25)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x19) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003200, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000049,
+ }
+ })
+ }
+
+ Device (VR26)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x1A) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003400, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000004A,
+ }
+ })
+ }
+
+ Device (VR27)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x1B) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003600, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000004B,
+ }
+ })
+ }
+
+ Device (VR28)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x1C) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003800, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000004C,
+ }
+ })
+ }
+
+ Device (VR29)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x1D) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003A00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000004D,
+ }
+ })
+ }
+
+ Device (VR30)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x1E) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003C00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000004E,
+ }
+ })
+ }
+
+ Device (VR31)
+ {
+ Name (_HID, "LNRO0005") // _HID: Hardware ID
+ Name (_UID, 0x1F) // _UID: Unique ID
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Memory32Fixed (ReadWrite,
+ 0x0A003E00, // Address Base
+ 0x00000200, // Address Length
+ )
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x0000004F,
+ }
+ })
+ }
+
+ Device (L000)
+ {
+ Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000023,
+ }
+ })
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000023,
+ }
+ })
+ Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
+ {
+ }
+ }
+
+ Device (L001)
+ {
+ Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID
+ Name (_UID, One) // _UID: Unique ID
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000024,
+ }
+ })
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000024,
+ }
+ })
+ Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
+ {
+ }
+ }
+
+ Device (L002)
+ {
+ Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID
+ Name (_UID, 0x02) // _UID: Unique ID
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000025,
+ }
+ })
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000025,
+ }
+ })
+ Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
+ {
+ }
+ }
+
+ Device (L003)
+ {
+ Name (_HID, "PNP0C0F" /* PCI Interrupt Link Device */) // _HID: Hardware ID
+ Name (_UID, 0x03) // _UID: Unique ID
+ Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000026,
+ }
+ })
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000026,
+ }
+ })
+ Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
+ {
+ }
+ }
+
+ Device (PCI0)
+ {
+ Name (_HID, "PNP0A08" /* PCI Express Bus */) // _HID: Hardware ID
+ Name (_CID, "PNP0A03" /* PCI Bus */) // _CID: Compatible ID
+ Name (_SEG, Zero) // _SEG: PCI Segment
+ Name (_BBN, Zero) // _BBN: BIOS Bus Number
+ Name (_UID, Zero) // _UID: Unique ID
+ Name (_STR, Unicode ("PCIe 0 Device")) // _STR: Description String
+ Name (_CCA, One) // _CCA: Cache Coherency Attribute
+ Name (_PRT, Package (0x80) // _PRT: PCI Routing Table
+ {
+ Package (0x04)
+ {
+ 0xFFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0xFFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0001FFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0001FFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0001FFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0001FFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0002FFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0002FFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0002FFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0002FFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0003FFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0003FFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0003FFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0003FFFF,
+ 0x03,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0004FFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0004FFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0004FFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0004FFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0005FFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0005FFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0005FFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0005FFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0006FFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0007FFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0007FFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0007FFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0007FFFF,
+ 0x03,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0008FFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0008FFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0008FFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0008FFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0009FFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0009FFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0009FFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0009FFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000AFFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000AFFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000AFFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000AFFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000BFFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000BFFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000BFFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000BFFFF,
+ 0x03,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000CFFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000CFFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000CFFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000CFFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000DFFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000DFFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000DFFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000DFFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000EFFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000EFFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000EFFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000EFFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000FFFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000FFFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000FFFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x000FFFFF,
+ 0x03,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0010FFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0010FFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0010FFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0010FFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0011FFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0011FFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0011FFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0011FFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0012FFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0012FFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0012FFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0012FFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0013FFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0013FFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0013FFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0013FFFF,
+ 0x03,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0014FFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0014FFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0014FFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0014FFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0015FFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0015FFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0015FFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0015FFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0016FFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0016FFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0016FFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0016FFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0017FFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0017FFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0017FFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0017FFFF,
+ 0x03,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0018FFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0018FFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0018FFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0018FFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0019FFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0019FFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0019FFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x0019FFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001AFFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001BFFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001BFFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001BFFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001BFFFF,
+ 0x03,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ Zero,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ One,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ 0x02,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001CFFFF,
+ 0x03,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ Zero,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ One,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ 0x02,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001DFFFF,
+ 0x03,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001EFFFF,
+ Zero,
+ L002,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001EFFFF,
+ One,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001EFFFF,
+ 0x02,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001EFFFF,
+ 0x03,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ Zero,
+ L003,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ One,
+ L000,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ 0x02,
+ L001,
+ Zero
+ },
+
+ Package (0x04)
+ {
+ 0x001FFFFF,
+ 0x03,
+ L002,
+ Zero
+ }
+ })
+ Method (_CBA, 0, NotSerialized) // _CBA: Configuration Base Address
+ {
+ Return (0x0000004010000000)
+ }
+
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
+ 0x0000, // Granularity
+ 0x0000, // Range Minimum
+ 0x00FF, // Range Maximum
+ 0x0000, // Translation Offset
+ 0x0100, // Length
+ ,, )
+ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+ 0x00000000, // Granularity
+ 0x10000000, // Range Minimum
+ 0x3EFEFFFF, // Range Maximum
+ 0x00000000, // Translation Offset
+ 0x2EFF0000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
+ 0x00000000, // Granularity
+ 0x00000000, // Range Minimum
+ 0x0000FFFF, // Range Maximum
+ 0x3EFF0000, // Translation Offset
+ 0x00010000, // Length
+ ,, , TypeStatic, DenseTranslation)
+ QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+ 0x0000000000000000, // Granularity
+ 0x0000008000000000, // Range Minimum
+ 0x000000FFFFFFFFFF, // Range Maximum
+ 0x0000000000000000, // Translation Offset
+ 0x0000008000000000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ })
+ Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities
+ {
+ CreateDWordField (Arg3, Zero, CDW1)
+ If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */))
+ {
+ CreateDWordField (Arg3, 0x04, CDW2)
+ CreateDWordField (Arg3, 0x08, CDW3)
+ Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */
+ Local0 &= 0x1E
+ If ((Arg1 != One))
+ {
+ CDW1 |= 0x08
+ }
+
+ If ((CDW3 != Local0))
+ {
+ CDW1 |= 0x10
+ }
+
+ CDW3 = Local0
+ }
+ Else
+ {
+ CDW1 |= 0x04
+ }
+
+ Return (Arg3)
+ }
+
+ Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
+ {
+ If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
+ {
+ If ((Arg2 == Zero))
+ {
+ Return (Buffer (One)
+ {
+ 0x01 // .
+ })
+ }
+ }
+
+ Return (Buffer (One)
+ {
+ 0x00 // .
+ })
+ }
+
+ Device (RES0)
+ {
+ Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) // _HID: Hardware ID
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite,
+ 0x0000000000000000, // Granularity
+ 0x0000004010000000, // Range Minimum
+ 0x000000401FFFFFFF, // Range Maximum
+ 0x0000000000000000, // Translation Offset
+ 0x0000000010000000, // Length
+ ,, , AddressRangeMemory, TypeStatic)
+ })
+ }
+ }
+
+ Device (\_SB.GED)
+ {
+ Name (_HID, "ACPI0013" /* Generic Event Device */) // _HID: Hardware ID
+ Name (_UID, "GED") // _UID: Unique ID
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
+ {
+ 0x00000029,
+ }
+ })
+ OperationRegion (EREG, SystemMemory, 0x09080000, 0x04)
+ Field (EREG, DWordAcc, NoLock, WriteAsZeros)
+ {
+ ESEL, 32
+ }
+
+ Method (_EVT, 1, Serialized) // _EVT: Event
+ {
+ Local0 = ESEL /* \_SB_.GED_.ESEL */
+ If (((Local0 & 0x02) == 0x02))
+ {
+ Notify (PWRB, 0x80) // Status Change
+ }
+
+ If (((Local0 & 0x10) == 0x10))
+ {
+ Acquire (\_SB.PCI0.BLCK, 0xFFFF)
+ \_SB.PCI0.PCNT ()
+ Release (\_SB.PCI0.BLCK)
+ }
+ }
+ }
+
+ Device (PWRB)
+ {
+ Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ }
+ }
+
+ Scope (_SB.PCI0)
+ {
+ OperationRegion (PCST, SystemMemory, 0x090C0000, 0x08)
+ Field (PCST, DWordAcc, NoLock, WriteAsZeros)
+ {
+ PCIU, 32,
+ PCID, 32
+ }
+
+ OperationRegion (SEJ, SystemMemory, 0x090C0008, 0x04)
+ Field (SEJ, DWordAcc, NoLock, WriteAsZeros)
+ {
+ B0EJ, 32
+ }
+
+ OperationRegion (BNMR, SystemMemory, 0x090C0010, 0x08)
+ Field (BNMR, DWordAcc, NoLock, WriteAsZeros)
+ {
+ BNUM, 32,
+ PIDX, 32
+ }
+
+ Mutex (BLCK, 0x00)
+ Method (PCEJ, 2, NotSerialized)
+ {
+ Acquire (BLCK, 0xFFFF)
+ BNUM = Arg0
+ B0EJ = (One << Arg1)
+ Release (BLCK)
+ Return (Zero)
+ }
+
+ Method (AIDX, 2, NotSerialized)
+ {
+ Acquire (BLCK, 0xFFFF)
+ BNUM = Arg0
+ PIDX = (One << Arg1)
+ Local0 = PIDX /* \_SB_.PCI0.PIDX */
+ Release (BLCK)
+ Return (Local0)
+ }
+
+ Method (PDSM, 5, Serialized)
+ {
+ If ((Arg2 == Zero))
+ {
+ Local0 = Buffer (One)
+ {
+ 0x00 // .
+ }
+ If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
+ {
+ Return (Local0)
+ }
+
+ If ((Arg1 < 0x02))
+ {
+ Return (Local0)
+ }
+
+ Local1 = Zero
+ Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
+ ))
+ If (!((Local2 == Zero) | (Local2 == 0xFFFFFFFF)))
+ {
+ Local1 |= One
+ Local1 |= (One << 0x07)
+ }
+
+ Local0 [Zero] = Local1
+ Return (Local0)
+ }
+
+ If ((Arg2 == 0x07))
+ {
+ Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One]
+ ))
+ Local0 = Package (0x02) {}
+ If (!((Local2 == Zero) || (Local2 == 0xFFFFFFFF)))
+ {
+ Local0 [Zero] = Local2
+ Local0 [One] = ""
+ }
+
+ Return (Local0)
+ }
+ }
+ }
+
+ Scope (\_SB.PCI0)
+ {
+ Method (EDSM, 5, Serialized)
+ {
+ If ((Arg2 == Zero))
+ {
+ Local0 = Buffer (One)
+ {
+ 0x00 // .
+ }
+ If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */))
+ {
+ Return (Local0)
+ }
+
+ If ((Arg1 < 0x02))
+ {
+ Return (Local0)
+ }
+
+ Local0 [Zero] = 0x81
+ Return (Local0)
+ }
+
+ If ((Arg2 == 0x07))
+ {
+ Local0 = Package (0x02)
+ {
+ Zero,
+ ""
+ }
+ Local1 = DerefOf (Arg4 [Zero])
+ Local0 [Zero] = Local1
+ Return (Local0)
+ }
+ }
+
+ Device (PHPR)
+ {
+ Name (_HID, "PNP0A06" /* Generic Container Device */) // _HID: Hardware ID
+ Name (_UID, "PCI Hotplug resources") // _UID: Unique ID
+ Name (_STA, 0x0B) // _STA: Status
+ Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
+ {
+ IO (Decode16,
+ 0x0000, // Range Minimum
+ 0x0000, // Range Maximum
+ 0x01, // Alignment
+ 0x18, // Length
+ )
+ })
+ }
+
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ }
+
+ Device (S08)
+ {
+ Name (_ADR, 0x00010000) // _ADR: Address
+ }
+
+ Device (S20)
+ {
+ Name (_ADR, 0x00040000) // _ADR: Address
+ Name (BSEL, Zero)
+ Device (S00)
+ {
+ Name (_ADR, Zero) // _ADR: Address
+ Name (ASUN, Zero)
+ Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
+ {
+ Local0 = Package (0x02)
+ {
+ Zero,
+ Zero
+ }
+ Local0 [Zero] = BSEL /* \_SB_.PCI0.S20_.BSEL */
+ Local0 [One] = ASUN /* \_SB_.PCI0.S20_.S00_.ASUN */
+ Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0))
+ }
+
+ Name (_SUN, Zero) // _SUN: Slot User Number
+ Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device, x=0-9
+ {
+ PCEJ (BSEL, _SUN)
+ }
+ }
+
+ Method (DVNT, 2, NotSerialized)
+ {
+ If ((Arg0 & One))
+ {
+ Notify (S00, Arg1)
+ }
+ }
+ }
+
+ Scope (S20)
+ {
+ Method (PCNT, 0, NotSerialized)
+ {
+ BNUM = Zero
+ DVNT (PCIU, One)
+ DVNT (PCID, 0x03)
+ }
+ }
+
+ Method (PCNT, 0, NotSerialized)
+ {
+ ^S20.PCNT ()
+ }
+ }
+}
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
tests/data/acpi/aarch64/virt/DSDT.acpipcihp | Bin 0 -> 5973 bytes
2 files changed, 1 deletion(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dc3ab24d05..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/aarch64/virt/DSDT.acpipcihp",
diff --git a/tests/data/acpi/aarch64/virt/DSDT.acpipcihp b/tests/data/acpi/aarch64/virt/DSDT.acpipcihp
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..2d4ca84457940340ef1cc9fe8245d7b0ccef69fa 100644
GIT binary patch
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literal 0
HcmV?d00001
--
2.49.0
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