From: Cornelia Huck <cohuck@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
kvmarm@lists.linux.dev, peter.maydell@linaro.org,
richard.henderson@linaro.org, alex.bennee@linaro.org,
maz@kernel.org, oliver.upton@linux.dev, sebott@redhat.com,
shameerali.kolothum.thodi@huawei.com, armbru@redhat.com,
berrange@redhat.com, abologna@redhat.com, jdenemar@redhat.com,
agraf@csgraf.de
Cc: shahuang@redhat.com, mark.rutland@arm.com, philmd@linaro.org,
pbonzini@redhat.com, Cornelia Huck <cohuck@redhat.com>
Subject: [PATCH v8 13/14] arm/cpu: switch to a generated cpu-sysregs.h.inc
Date: Tue, 17 Jun 2025 17:39:30 +0200 [thread overview]
Message-ID: <20250617153931.1330449-14-cohuck@redhat.com> (raw)
In-Reply-To: <20250617153931.1330449-1-cohuck@redhat.com>
Generated against Linux 6.15.
Reviewed-by: Sebastian Ott <sebott@redhat.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
---
target/arm/cpu-sysregs.h.inc | 43 +++++++++++++++++++++++++-----------
1 file changed, 30 insertions(+), 13 deletions(-)
diff --git a/target/arm/cpu-sysregs.h.inc b/target/arm/cpu-sysregs.h.inc
index cb99286f7048..1dddd3d357eb 100644
--- a/target/arm/cpu-sysregs.h.inc
+++ b/target/arm/cpu-sysregs.h.inc
@@ -1,19 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
-DEF(ID_AA64PFR0_EL1, 3, 0, 0, 4, 0)
-DEF(ID_AA64PFR1_EL1, 3, 0, 0, 4, 1)
-DEF(ID_AA64SMFR0_EL1, 3, 0, 0, 4, 5)
-DEF(ID_AA64DFR0_EL1, 3, 0, 0, 5, 0)
-DEF(ID_AA64DFR1_EL1, 3, 0, 0, 5, 1)
-DEF(ID_AA64ISAR0_EL1, 3, 0, 0, 6, 0)
-DEF(ID_AA64ISAR1_EL1, 3, 0, 0, 6, 1)
-DEF(ID_AA64ISAR2_EL1, 3, 0, 0, 6, 2)
-DEF(ID_AA64MMFR0_EL1, 3, 0, 0, 7, 0)
-DEF(ID_AA64MMFR1_EL1, 3, 0, 0, 7, 1)
-DEF(ID_AA64MMFR2_EL1, 3, 0, 0, 7, 2)
-DEF(ID_AA64MMFR3_EL1, 3, 0, 0, 7, 3)
+/* GENERATED FILE, DO NOT EDIT */
+/* use arm-gen-cpu-sysregs-header.awk to regenerate */
DEF(ID_PFR0_EL1, 3, 0, 0, 1, 0)
DEF(ID_PFR1_EL1, 3, 0, 0, 1, 1)
DEF(ID_DFR0_EL1, 3, 0, 0, 1, 2)
+DEF(ID_AFR0_EL1, 3, 0, 0, 1, 3)
DEF(ID_MMFR0_EL1, 3, 0, 0, 1, 4)
DEF(ID_MMFR1_EL1, 3, 0, 0, 1, 5)
DEF(ID_MMFR2_EL1, 3, 0, 0, 1, 6)
@@ -24,13 +15,39 @@ DEF(ID_ISAR2_EL1, 3, 0, 0, 2, 2)
DEF(ID_ISAR3_EL1, 3, 0, 0, 2, 3)
DEF(ID_ISAR4_EL1, 3, 0, 0, 2, 4)
DEF(ID_ISAR5_EL1, 3, 0, 0, 2, 5)
-DEF(ID_MMFR4_EL1, 3, 0, 0, 2, 6)
DEF(ID_ISAR6_EL1, 3, 0, 0, 2, 7)
+DEF(ID_MMFR4_EL1, 3, 0, 0, 2, 6)
DEF(MVFR0_EL1, 3, 0, 0, 3, 0)
DEF(MVFR1_EL1, 3, 0, 0, 3, 1)
DEF(MVFR2_EL1, 3, 0, 0, 3, 2)
DEF(ID_PFR2_EL1, 3, 0, 0, 3, 4)
DEF(ID_DFR1_EL1, 3, 0, 0, 3, 5)
DEF(ID_MMFR5_EL1, 3, 0, 0, 3, 6)
+DEF(ID_AA64PFR0_EL1, 3, 0, 0, 4, 0)
+DEF(ID_AA64PFR1_EL1, 3, 0, 0, 4, 1)
+DEF(ID_AA64PFR2_EL1, 3, 0, 0, 4, 2)
DEF(ID_AA64ZFR0_EL1, 3, 0, 0, 4, 4)
+DEF(ID_AA64SMFR0_EL1, 3, 0, 0, 4, 5)
+DEF(ID_AA64FPFR0_EL1, 3, 0, 0, 4, 7)
+DEF(ID_AA64DFR0_EL1, 3, 0, 0, 5, 0)
+DEF(ID_AA64DFR1_EL1, 3, 0, 0, 5, 1)
+DEF(ID_AA64DFR2_EL1, 3, 0, 0, 5, 2)
+DEF(ID_AA64AFR0_EL1, 3, 0, 0, 5, 4)
+DEF(ID_AA64AFR1_EL1, 3, 0, 0, 5, 5)
+DEF(ID_AA64ISAR0_EL1, 3, 0, 0, 6, 0)
+DEF(ID_AA64ISAR1_EL1, 3, 0, 0, 6, 1)
+DEF(ID_AA64ISAR2_EL1, 3, 0, 0, 6, 2)
+DEF(ID_AA64ISAR3_EL1, 3, 0, 0, 6, 3)
+DEF(ID_AA64MMFR0_EL1, 3, 0, 0, 7, 0)
+DEF(ID_AA64MMFR1_EL1, 3, 0, 0, 7, 1)
+DEF(ID_AA64MMFR2_EL1, 3, 0, 0, 7, 2)
+DEF(ID_AA64MMFR3_EL1, 3, 0, 0, 7, 3)
+DEF(ID_AA64MMFR4_EL1, 3, 0, 0, 7, 4)
+DEF(CCSIDR_EL1, 3, 1, 0, 0, 0)
+DEF(CLIDR_EL1, 3, 1, 0, 0, 1)
+DEF(CCSIDR2_EL1, 3, 1, 0, 0, 2)
+DEF(GMID_EL1, 3, 1, 0, 0, 4)
+DEF(SMIDR_EL1, 3, 1, 0, 0, 6)
DEF(CTR_EL0, 3, 3, 0, 0, 1)
+DEF(DCZID_EL0, 3, 3, 0, 0, 7)
+
--
2.49.0
next prev parent reply other threads:[~2025-06-17 15:59 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-17 15:39 [PATCH v8 00/14] arm: rework id register storage Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 01/14] arm/cpu: Add sysreg definitions in cpu-sysregs.h Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 02/14] arm/cpu: Store aa64isar0/aa64zfr0 into the idregs arrays Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 03/14] arm/cpu: Store aa64isar1/2 into the idregs array Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 04/14] arm/cpu: Store aa64pfr0/1 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 05/14] arm/cpu: Store aa64mmfr0-3 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 06/14] arm/cpu: Store aa64dfr0/1 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 07/14] arm/cpu: Store aa64smfr0 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 08/14] arm/cpu: Store id_isar0-7 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 09/14] arm/cpu: Store id_pfr0/1/2 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 10/14] arm/cpu: Store id_dfr0/1 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 11/14] arm/cpu: Store id_mmfr0-5 " Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 12/14] arm/cpu: Add sysreg generation scripts Cornelia Huck
2025-06-17 15:45 ` Cornelia Huck
2025-06-25 9:16 ` Eric Auger
2025-06-25 9:23 ` Daniel P. Berrangé
2025-06-25 9:31 ` Eric Auger
2025-06-25 9:24 ` Cornelia Huck
2025-06-17 15:39 ` Cornelia Huck [this message]
2025-06-30 15:23 ` [PATCH v8 13/14] arm/cpu: switch to a generated cpu-sysregs.h.inc Peter Maydell
2025-07-01 16:06 ` Cornelia Huck
2025-07-01 16:49 ` Peter Maydell
2025-07-02 9:01 ` Cornelia Huck
2025-06-17 15:39 ` [PATCH v8 14/14] arm/kvm: use fd instead of fdarray[2] Cornelia Huck
2025-06-25 9:10 ` [PATCH v8 00/14] arm: rework id register storage Eric Auger
2025-06-25 10:14 ` Peter Maydell
2025-06-25 16:37 ` Cornelia Huck
2025-06-30 10:04 ` Cornelia Huck
2025-06-30 15:25 ` Peter Maydell
2025-06-30 16:02 ` Cornelia Huck
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250617153931.1330449-14-cohuck@redhat.com \
--to=cohuck@redhat.com \
--cc=abologna@redhat.com \
--cc=agraf@csgraf.de \
--cc=alex.bennee@linaro.org \
--cc=armbru@redhat.com \
--cc=berrange@redhat.com \
--cc=eric.auger.pro@gmail.com \
--cc=eric.auger@redhat.com \
--cc=jdenemar@redhat.com \
--cc=kvmarm@lists.linux.dev \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=oliver.upton@linux.dev \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=sebott@redhat.com \
--cc=shahuang@redhat.com \
--cc=shameerali.kolothum.thodi@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).