From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Leif Lindholm" <leif.lindholm@oss.qualcomm.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Radoslaw Biernacki" <rad@semihalf.com>,
"Alexander Graf" <agraf@csgraf.de>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Phil Dennis-Jordan" <phil@philjordan.eu>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Bernhard Beschow" <shentey@gmail.com>,
"Cleber Rosa" <crosa@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cameron Esfahani" <dirty@apple.com>,
kvm@vger.kernel.org, qemu-arm@nongnu.org,
"Eric Auger" <eric.auger@redhat.com>,
"Daniel P. Berrangé" <berrange@redhat.com>,
"Thomas Huth" <thuth@redhat.com>,
"Roman Bolshakov" <rbolshakov@ddn.com>,
"John Snow" <jsnow@redhat.com>
Subject: [PATCH v2 01/26] target/arm: Remove arm_handle_psci_call() stub
Date: Fri, 20 Jun 2025 15:06:44 +0200 [thread overview]
Message-ID: <20250620130709.31073-2-philmd@linaro.org> (raw)
In-Reply-To: <20250620130709.31073-1-philmd@linaro.org>
Since commit 0c1aaa66c24 ("target/arm: wrap psci call with
tcg_enabled") the arm_handle_psci_call() call is elided
when TCG is disabled.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/internals.h | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index 3360de9150f..5ed25d33208 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -650,16 +650,12 @@ static inline bool arm_is_psci_call(ARMCPU *cpu, int excp_type)
{
return false;
}
-static inline void arm_handle_psci_call(ARMCPU *cpu)
-{
- g_assert_not_reached();
-}
#else
/* Return true if the r0/x0 value indicates that this SMC/HVC is a PSCI call. */
bool arm_is_psci_call(ARMCPU *cpu, int excp_type);
+#endif
/* Actually handle a PSCI call */
void arm_handle_psci_call(ARMCPU *cpu);
-#endif
/**
* arm_clear_exclusive: clear the exclusive monitor
--
2.49.0
next prev parent reply other threads:[~2025-06-20 13:08 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-20 13:06 [PATCH v2 00/26] arm: Fixes and preparatory cleanups for split-accel Philippe Mathieu-Daudé
2025-06-20 13:06 ` Philippe Mathieu-Daudé [this message]
2025-06-20 13:06 ` [PATCH v2 02/26] target/arm: Reduce arm_cpu_post_init() declaration scope Philippe Mathieu-Daudé
2025-06-20 13:06 ` [PATCH v2 03/26] target/arm: Unify gen_exception_internal() Philippe Mathieu-Daudé
2025-06-20 13:06 ` [PATCH v2 04/26] target/arm/hvf: Simplify GIC hvf_arch_init_vcpu() Philippe Mathieu-Daudé
2025-06-22 0:40 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 05/26] target/arm/hvf: Directly re-lock BQL after hv_vcpu_run() Philippe Mathieu-Daudé
2025-06-22 0:12 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 06/26] target/arm/hvf: Trace hv_vcpu_run() failures Philippe Mathieu-Daudé
2025-06-20 13:06 ` [PATCH v2 07/26] accel/hvf: Trace VM memory mapping Philippe Mathieu-Daudé
2025-06-22 0:12 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 08/26] target/arm/hvf: Log $pc in hvf_unknown_hvc() trace event Philippe Mathieu-Daudé
2025-06-20 13:06 ` [PATCH v2 09/26] target/arm: Correct KVM & HVF dtb_compatible value Philippe Mathieu-Daudé
2025-06-22 0:17 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 10/26] accel/hvf: Model PhysTimer register Philippe Mathieu-Daudé
2025-06-22 0:40 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 11/26] target/arm/hvf: Pass @target_el argument to hvf_raise_exception() Philippe Mathieu-Daudé
2025-06-22 0:19 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 12/26] target/arm: Restrict system register properties to system binary Philippe Mathieu-Daudé
2025-06-22 0:20 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 13/26] target/arm: Create GTimers *after* features finalized / accel realized Philippe Mathieu-Daudé
2025-06-22 0:22 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 14/26] accel: Keep reference to AccelOpsClass in AccelClass Philippe Mathieu-Daudé
2025-06-20 13:06 ` [PATCH v2 15/26] accel: Introduce AccelOpsClass::cpu_target_realize() hook Philippe Mathieu-Daudé
2025-06-22 0:23 ` Richard Henderson
2025-06-20 13:06 ` [PATCH v2 16/26] accel/hvf: Add hvf_arch_cpu_realize() stubs Philippe Mathieu-Daudé
2025-06-22 0:24 ` Richard Henderson
2025-06-20 13:07 ` [PATCH v2 17/26] target/arm/hvf: Really set Generic Timer counter frequency Philippe Mathieu-Daudé
2025-06-20 13:07 ` [PATCH v2 18/26] target/arm/hvf: Trace host processor features Philippe Mathieu-Daudé
2025-06-22 0:29 ` Richard Henderson
2025-06-20 13:07 ` [PATCH v2 19/26] hw/arm/virt: Only require TCG || QTest to use TrustZone Philippe Mathieu-Daudé
2025-06-20 13:07 ` [PATCH v2 20/26] hw/arm/virt: Only require TCG || QTest to use virtualization extension Philippe Mathieu-Daudé
2025-06-20 13:07 ` [PATCH v2 21/26] hw/arm/virt: Rename cpu_post_init() -> post_cpus_gic_realized() Philippe Mathieu-Daudé
2025-06-22 0:30 ` Richard Henderson
2025-06-20 13:07 ` [PATCH v2 22/26] hw/arm/sbsa-ref: Tidy up use of RAMLIMIT_GB definition Philippe Mathieu-Daudé
2025-06-22 0:34 ` Richard Henderson
2025-06-20 13:07 ` [PATCH v2 23/26] tests/functional: Restrict nexted Aarch64 Xen test to TCG Philippe Mathieu-Daudé
2025-06-22 0:35 ` Richard Henderson
2025-06-23 8:11 ` Thomas Huth
2025-06-23 11:59 ` Philippe Mathieu-Daudé
2025-06-23 12:05 ` Philippe Mathieu-Daudé
2025-06-20 13:07 ` [PATCH v2 24/26] tests/functional: Require TCG to run Aarch64 imx8mp-evk test Philippe Mathieu-Daudé
2025-06-22 0:37 ` Richard Henderson
2025-06-23 8:19 ` Thomas Huth
2025-06-23 11:54 ` Philippe Mathieu-Daudé
2025-06-20 13:07 ` [PATCH v2 25/26] tests/functional: Add hvf_available() helper Philippe Mathieu-Daudé
2025-06-22 0:38 ` Richard Henderson
2025-06-23 8:20 ` Thomas Huth
2025-06-20 13:07 ` [PATCH v2 26/26] tests/functional: Expand Aarch64 SMMU tests to run on HVF accelerator Philippe Mathieu-Daudé
2025-06-23 8:23 ` Thomas Huth
2025-06-23 11:53 ` Philippe Mathieu-Daudé
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