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[95.127.63.101]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3a6d1188017sm2642772f8f.75.2025.06.20.10.32.53 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Jun 2025 10:32:55 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alexander Graf , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson , Paolo Bonzini , Peter Maydell , Julian Armistead , Cameron Esfahani , Mark Burton , Thomas Huth , "Edgar E. Iglesias" , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [RFC PATCH RESEND 35/42] target/arm: Emulate EL2 under TCG Date: Fri, 20 Jun 2025 19:27:43 +0200 Message-ID: <20250620172751.94231-36-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250620172751.94231-1-philmd@linaro.org> References: <20250620172751.94231-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org When using hardware acceleration and TCG is available, expose EL2 and EL3 features as available (they will be emulated). Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu64.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 200da1c489b..b5c2796f3a1 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -738,20 +738,23 @@ static void aarch64_a53_initfn(Object *obj) static void aarch64_host_initfn(Object *obj) { -#if defined(CONFIG_KVM) ARMCPU *cpu = ARM_CPU(obj); +#if defined(CONFIG_KVM) kvm_arm_set_cpu_features_from_host(cpu); if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { aarch64_add_sve_properties(obj); aarch64_add_pauth_properties(obj); } #elif defined(CONFIG_HVF) - ARMCPU *cpu = ARM_CPU(obj); hvf_arm_set_cpu_features_from_host(cpu); aarch64_add_pauth_properties(obj); #else g_assert_not_reached(); #endif + if (tcg_enabled()) { + set_feature(&cpu->env, ARM_FEATURE_EL2); + set_feature(&cpu->env, ARM_FEATURE_EL3); + } } static void aarch64_max_initfn(Object *obj) -- 2.49.0