* [QEMU PATCH v4 01/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 02/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct anisa.su887
` (8 subsequent siblings)
9 siblings, 0 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su, Fan Ni
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 59 +++++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 4 +++
include/hw/cxl/cxl_device.h | 1 +
3 files changed, 64 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 3914fa73b9..9a0f8bd2fc 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -23,6 +23,7 @@
#include "qemu/uuid.h"
#include "system/hostmem.h"
#include "qemu/range.h"
+#include "qapi/qapi-types-cxl.h"
#define CXL_CAPACITY_MULTIPLIER (256 * MiB)
#define CXL_DC_EVENT_LOG_SIZE 8
@@ -117,6 +118,8 @@ enum {
#define GET_PHYSICAL_PORT_STATE 0x1
TUNNEL = 0x53,
#define MANAGEMENT_COMMAND 0x0
+ FMAPI_DCD_MGMT = 0x56,
+ #define GET_DCD_INFO 0x0
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3237,6 +3240,52 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.1: Get DCD Info (Opcode 5600h) */
+static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint8_t num_hosts;
+ uint8_t num_regions_supported;
+ uint8_t rsvd1[2];
+ uint16_t supported_add_sel_policy_bitmask;
+ uint8_t rsvd2[2];
+ uint16_t supported_removal_policy_bitmask;
+ uint8_t sanitize_on_release_bitmask;
+ uint8_t rsvd3;
+ uint64_t total_dynamic_capacity;
+ uint64_t region_blk_size_bitmasks[8];
+ } QEMU_PACKED *out = (void *)payload_out;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLDCRegion *region;
+ int i;
+
+ out->num_hosts = 1;
+ out->num_regions_supported = ct3d->dc.num_regions;
+ stw_le_p(&out->supported_add_sel_policy_bitmask,
+ BIT(CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE));
+ stw_le_p(&out->supported_removal_policy_bitmask,
+ BIT(CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE));
+ out->sanitize_on_release_bitmask = 0;
+
+ stq_le_p(&out->total_dynamic_capacity,
+ ct3d->dc.total_capacity / CXL_CAPACITY_MULTIPLIER);
+
+ for (i = 0; i < ct3d->dc.num_regions; i++) {
+ region = &ct3d->dc.regions[i];
+ memcpy(&out->region_blk_size_bitmasks[i],
+ ®ion->supported_blk_size_bitmask,
+ sizeof(out->region_blk_size_bitmasks[i]));
+ }
+
+ *len_out = sizeof(*out);
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3350,6 +3399,11 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
cmd_tunnel_management_cmd, ~0, 0 },
};
+static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
+ [FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
+ cmd_fm_get_dcd_info, 0, 0 },
+};
+
/*
* While the command is executing in the background, the device should
* update the percentage complete in the Background Command Status Register
@@ -3647,7 +3701,12 @@ void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,
DeviceState *intf,
size_t payload_max)
{
+ CXLType3Dev *ct3d = CXL_TYPE3(d);
+
cxl_copy_cci_commands(cci, cxl_cmd_set_t3_fm_owned_ld_mctp);
+ if (ct3d->dc.num_regions) {
+ cxl_copy_cci_commands(cci, cxl_cmd_set_fm_dcd);
+ }
cci->d = d;
cci->intf = intf;
cxl_init_cci(cci, payload_max);
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index f283178d88..f608470362 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: GPL-v2-only
*/
+#include <math.h>
#include "qemu/osdep.h"
#include "qemu/units.h"
@@ -634,6 +635,8 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
uint64_t region_len;
uint64_t decode_len;
uint64_t blk_size = 2 * MiB;
+ /* Only 1 block size is supported for now. */
+ uint64_t supported_blk_size_bitmask = BIT((int) log2(blk_size));
CXLDCRegion *region;
MemoryRegion *mr;
uint64_t dc_size;
@@ -679,6 +682,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
.block_size = blk_size,
/* dsmad_handle set when creating CDAT table entries */
.flags = 0,
+ .supported_blk_size_bitmask = supported_blk_size_bitmask,
};
ct3d->dc.total_capacity += region->len;
region->blk_bitmap = bitmap_new(region->len / region->block_size);
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index c43a394ce1..1170ac58a3 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -537,6 +537,7 @@ typedef struct CXLDCRegion {
uint32_t dsmadhandle;
uint8_t flags;
unsigned long *blk_bitmap;
+ uint64_t supported_blk_size_bitmask;
} CXLDCRegion;
typedef struct CXLSetFeatureInfo {
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [QEMU PATCH v4 02/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 01/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 03/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config anisa.su887
` (7 subsequent siblings)
9 siblings, 0 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su, Fan Ni
From: Anisa Su <anisa.su@samsung.com>
Add booleans to DC Region struct to represent dsmas flags (defined in CDAT) in
preparation for the next command, which returns the flags in the next mailbox
command 0x5601.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/mem/cxl_type3.c | 8 +++++++-
include/hw/cxl/cxl_device.h | 15 +++++++++++++++
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index f608470362..0fccd22800 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -226,10 +226,16 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv)
* future.
*/
for (i = 0; i < ct3d->dc.num_regions; i++) {
+ ct3d->dc.regions[i].nonvolatile = false;
+ ct3d->dc.regions[i].sharable = false;
+ ct3d->dc.regions[i].hw_managed_coherency = false;
+ ct3d->dc.regions[i].ic_specific_dc_management = false;
+ ct3d->dc.regions[i].rdonly = false;
ct3_build_cdat_entries_for_mr(&(table[cur_ent]),
dsmad_handle++,
ct3d->dc.regions[i].len,
- false, true, region_base);
+ ct3d->dc.regions[i].nonvolatile,
+ true, region_base);
ct3d->dc.regions[i].dsmadhandle = dsmad_handle - 1;
cur_ent += CT3_CDAT_NUM_ENTRIES;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 1170ac58a3..397edcff4c 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -133,6 +133,15 @@ typedef enum {
CXL_MBOX_MAX = 0x20
} CXLRetCode;
+/* r3.2 Section 7.6.7.6.2 Table 7-66 DSMAS Flags Bits */
+typedef enum {
+ CXL_DSMAS_FLAGS_NONVOLATILE = 2,
+ CXL_DSMAS_FLAGS_SHARABLE = 3,
+ CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY = 4,
+ CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT = 5,
+ CXL_DSMAS_FLAGS_RDONLY = 6,
+} CXLDSMASFlags;
+
typedef struct CXLCCI CXLCCI;
typedef struct cxl_device_state CXLDeviceState;
struct cxl_cmd;
@@ -538,6 +547,12 @@ typedef struct CXLDCRegion {
uint8_t flags;
unsigned long *blk_bitmap;
uint64_t supported_blk_size_bitmask;
+ /* Following bools make up dsmas flags, as defined in the CDAT */
+ bool nonvolatile;
+ bool sharable;
+ bool hw_managed_coherency;
+ bool ic_specific_dc_management;
+ bool rdonly;
} CXLDCRegion;
typedef struct CXLSetFeatureInfo {
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [QEMU PATCH v4 03/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 01/10] cxl-mailbox-utils: 0x5600 - FMAPI Get DCD Info anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 02/10] cxl/type3: Add dsmas_flags to CXLDCRegion struct anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-30 16:36 ` Jonathan Cameron via
2025-06-26 22:23 ` [QEMU PATCH v4 04/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types anisa.su887
` (6 subsequent siblings)
9 siblings, 1 reply; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su, Fan Ni
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5601 implemented per CXL r3.2 Spec Section 7.6.7.6.2
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 103 +++++++++++++++++++++++++++++++++++++
1 file changed, 103 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 9a0f8bd2fc..7f0709a27f 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -120,6 +120,7 @@ enum {
#define MANAGEMENT_COMMAND 0x0
FMAPI_DCD_MGMT = 0x56,
#define GET_DCD_INFO 0x0
+ #define GET_HOST_DC_REGION_CONFIG 0x1
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3286,6 +3287,106 @@ static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+static void build_dsmas_flags(uint8_t *flags, CXLDCRegion *region)
+{
+ *flags = 0;
+
+ if (region->nonvolatile) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_NONVOLATILE);
+ }
+ if (region->sharable) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_SHARABLE);
+ }
+ if (region->hw_managed_coherency) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY);
+ }
+ if (region->ic_specific_dc_management) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT);
+ }
+ if (region->rdonly) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_RDONLY);
+ }
+}
+
+/* CXL r3.2 section 7.6.7.6.2: Get Host DC Region Configuration (Opcode 5601h) */
+static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t region_cnt;
+ uint8_t start_rid;
+ } QEMU_PACKED *in = (void *)payload_in;
+ struct {
+ uint16_t host_id;
+ uint8_t num_regions;
+ uint8_t regions_returned;
+ struct {
+ uint64_t base;
+ uint64_t decode_len;
+ uint64_t region_len;
+ uint64_t block_size;
+ uint8_t flags;
+ uint8_t rsvd1[3];
+ uint8_t sanitize;
+ uint8_t rsvd2[3];
+ } QEMU_PACKED records[];
+ } QEMU_PACKED *out = (void *)payload_out;
+ struct {
+ uint32_t num_extents_supported;
+ uint32_t num_extents_available;
+ uint32_t num_tags_supported;
+ uint32_t num_tags_available;
+ } QEMU_PACKED *extra_out;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ uint16_t record_count, out_pl_len, i;
+
+ if (in->start_rid >= ct3d->dc.num_regions) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+ record_count = MIN(ct3d->dc.num_regions - in->start_rid, in->region_cnt);
+
+ out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
+ extra_out = (void *)out + out_pl_len;
+ out_pl_len += sizeof(*extra_out);
+
+ assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE);
+
+ stw_le_p(&out->host_id, 0);
+ out->num_regions = ct3d->dc.num_regions;
+ out->regions_returned = record_count;
+
+ for (i = 0; i < record_count; i++) {
+ stq_le_p(&out->records[i].base,
+ ct3d->dc.regions[in->start_rid + i].base);
+ stq_le_p(&out->records[i].decode_len,
+ ct3d->dc.regions[in->start_rid + i].decode_len /
+ CXL_CAPACITY_MULTIPLIER);
+ stq_le_p(&out->records[i].region_len,
+ ct3d->dc.regions[in->start_rid + i].len);
+ stq_le_p(&out->records[i].block_size,
+ ct3d->dc.regions[in->start_rid + i].block_size);
+ build_dsmas_flags(&out->records[i].flags,
+ &ct3d->dc.regions[in->start_rid + i]);
+ /* Sanitize is bit 0 of flags. */
+ out->records[i].sanitize =
+ ct3d->dc.regions[in->start_rid + i].flags & BIT(0);
+ }
+
+ stl_le_p(&extra_out->num_extents_supported, CXL_NUM_EXTENTS_SUPPORTED);
+ stl_le_p(&extra_out->num_extents_available, CXL_NUM_EXTENTS_SUPPORTED -
+ ct3d->dc.total_extent_count);
+ stl_le_p(&extra_out->num_tags_supported, CXL_NUM_TAGS_SUPPORTED);
+ stl_le_p(&extra_out->num_tags_available, CXL_NUM_TAGS_SUPPORTED);
+
+ *len_out = out_pl_len;
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3402,6 +3503,8 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
[FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
cmd_fm_get_dcd_info, 0, 0 },
+ [FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
+ cmd_fm_get_host_dc_region_config, 4, 0 },
};
/*
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 03/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config
2025-06-26 22:23 ` [QEMU PATCH v4 03/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config anisa.su887
@ 2025-06-30 16:36 ` Jonathan Cameron via
0 siblings, 0 replies; 19+ messages in thread
From: Jonathan Cameron via @ 2025-06-30 16:36 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, nifan.cxl, dave, alok.a.tiwari, linux-cxl, Anisa Su,
Fan Ni
On Thu, 26 Jun 2025 22:23:26 +0000
anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5601 implemented per CXL r3.2 Spec Section 7.6.7.6.2
>
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 103 +++++++++++++++++++++++++++++++++++++
> 1 file changed, 103 insertions(+)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 9a0f8bd2fc..7f0709a27f 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -120,6 +120,7 @@ enum {
> #define MANAGEMENT_COMMAND 0x0
> FMAPI_DCD_MGMT = 0x56,
> #define GET_DCD_INFO 0x0
> + #define GET_HOST_DC_REGION_CONFIG 0x1
> };
>
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> @@ -3286,6 +3287,106 @@ static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +static void build_dsmas_flags(uint8_t *flags, CXLDCRegion *region)
> +{
> + *flags = 0;
> +
> + if (region->nonvolatile) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_NONVOLATILE);
> + }
> + if (region->sharable) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_SHARABLE);
> + }
> + if (region->hw_managed_coherency) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY);
> + }
> + if (region->ic_specific_dc_management) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT);
> + }
> + if (region->rdonly) {
> + *flags |= BIT(CXL_DSMAS_FLAGS_RDONLY);
> + }
> +}
> +
> +/* CXL r3.2 section 7.6.7.6.2: Get Host DC Region Configuration (Opcode 5601h) */
Trivial but this line annoys checkpatch.pl
I'll break it up as.
/*
* CXL r3.2 section 7.6.7.6.2:
* Get Host DC Region Configuration (Opcode 5601h)
*/
> +static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t region_cnt;
> + uint8_t start_rid;
> + } QEMU_PACKED *in = (void *)payload_in;
> + struct {
> + uint16_t host_id;
> + uint8_t num_regions;
> + uint8_t regions_returned;
> + struct {
> + uint64_t base;
> + uint64_t decode_len;
> + uint64_t region_len;
> + uint64_t block_size;
> + uint8_t flags;
> + uint8_t rsvd1[3];
> + uint8_t sanitize;
> + uint8_t rsvd2[3];
> + } QEMU_PACKED records[];
> + } QEMU_PACKED *out = (void *)payload_out;
> + struct {
> + uint32_t num_extents_supported;
> + uint32_t num_extents_available;
> + uint32_t num_tags_supported;
> + uint32_t num_tags_available;
> + } QEMU_PACKED *extra_out;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + uint16_t record_count, out_pl_len, i;
> +
> + if (in->start_rid >= ct3d->dc.num_regions) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
> + record_count = MIN(ct3d->dc.num_regions - in->start_rid, in->region_cnt);
> +
> + out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
> + extra_out = (void *)out + out_pl_len;
> + out_pl_len += sizeof(*extra_out);
> +
> + assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE);
> +
> + stw_le_p(&out->host_id, 0);
> + out->num_regions = ct3d->dc.num_regions;
> + out->regions_returned = record_count;
> +
> + for (i = 0; i < record_count; i++) {
> + stq_le_p(&out->records[i].base,
> + ct3d->dc.regions[in->start_rid + i].base);
> + stq_le_p(&out->records[i].decode_len,
> + ct3d->dc.regions[in->start_rid + i].decode_len /
> + CXL_CAPACITY_MULTIPLIER);
> + stq_le_p(&out->records[i].region_len,
> + ct3d->dc.regions[in->start_rid + i].len);
> + stq_le_p(&out->records[i].block_size,
> + ct3d->dc.regions[in->start_rid + i].block_size);
> + build_dsmas_flags(&out->records[i].flags,
> + &ct3d->dc.regions[in->start_rid + i]);
> + /* Sanitize is bit 0 of flags. */
> + out->records[i].sanitize =
> + ct3d->dc.regions[in->start_rid + i].flags & BIT(0);
> + }
> +
> + stl_le_p(&extra_out->num_extents_supported, CXL_NUM_EXTENTS_SUPPORTED);
> + stl_le_p(&extra_out->num_extents_available, CXL_NUM_EXTENTS_SUPPORTED -
> + ct3d->dc.total_extent_count);
> + stl_le_p(&extra_out->num_tags_supported, CXL_NUM_TAGS_SUPPORTED);
> + stl_le_p(&extra_out->num_tags_available, CXL_NUM_TAGS_SUPPORTED);
> +
> + *len_out = out_pl_len;
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3402,6 +3503,8 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
> static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> [FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
> cmd_fm_get_dcd_info, 0, 0 },
> + [FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
> + cmd_fm_get_host_dc_region_config, 4, 0 },
> };
>
> /*
^ permalink raw reply [flat|nested] 19+ messages in thread
* [QEMU PATCH v4 04/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (2 preceding siblings ...)
2025-06-26 22:23 ` [QEMU PATCH v4 03/10] cxl-mailbox-utils: 0x5601 - FMAPI Get Host Region Config anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 05/10] hw/cxl_type3: Add DC Region bitmap lock anisa.su887
` (5 subsequent siblings)
9 siblings, 0 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su, Fan Ni
From: Anisa Su <anisa.su@samsung.com>
Move definition/enum to cxl_events.h for shared use in next patch
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/mem/cxl_type3.c | 15 ---------------
include/hw/cxl/cxl_events.h | 15 +++++++++++++++
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 0fccd22800..cdd60079c4 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1876,21 +1876,6 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
}
}
-/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
-static const QemuUUID dynamic_capacity_uuid = {
- .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
- 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
-};
-
-typedef enum CXLDCEventType {
- DC_EVENT_ADD_CAPACITY = 0x0,
- DC_EVENT_RELEASE_CAPACITY = 0x1,
- DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
- DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
- DC_EVENT_ADD_CAPACITY_RSP = 0x4,
- DC_EVENT_CAPACITY_RELEASED = 0x5,
-} CXLDCEventType;
-
/*
* Check whether the range [dpa, dpa + len - 1] has overlaps with extents in
* the list.
diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h
index 38cadaa0f3..758b075a64 100644
--- a/include/hw/cxl/cxl_events.h
+++ b/include/hw/cxl/cxl_events.h
@@ -184,4 +184,19 @@ typedef struct CXLEventDynamicCapacity {
uint32_t tags_avail;
} QEMU_PACKED CXLEventDynamicCapacity;
+/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
+static const QemuUUID dynamic_capacity_uuid = {
+ .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
+ 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
+};
+
+typedef enum CXLDCEventType {
+ DC_EVENT_ADD_CAPACITY = 0x0,
+ DC_EVENT_RELEASE_CAPACITY = 0x1,
+ DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
+ DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
+ DC_EVENT_ADD_CAPACITY_RSP = 0x4,
+ DC_EVENT_CAPACITY_RELEASED = 0x5,
+} CXLDCEventType;
+
#endif /* CXL_EVENTS_H */
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [QEMU PATCH v4 05/10] hw/cxl_type3: Add DC Region bitmap lock
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (3 preceding siblings ...)
2025-06-26 22:23 ` [QEMU PATCH v4 04/10] cxl_events.h: Move definition for dynamic_capacity_uuid and enum for DC event types anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 06/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config anisa.su887
` (4 subsequent siblings)
9 siblings, 0 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su, Fan Ni
From: Anisa Su <anisa.su@samsung.com>
Add a lock on the bitmap of each CXLDCRegion in preparation for the next
patch which implements FMAPI Set DC Region Configuration. This command
can modify the block size, which means the region's bitmap must be updated
accordingly.
The lock becomes necessary when commands that add/release extents
(meaning they update the bitmap too) are enabled on a different CCI than
the CCI on which the FMAPI commands are enabled.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/mem/cxl_type3.c | 4 ++++
include/hw/cxl/cxl_device.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index cdd60079c4..b872a26173 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -692,6 +692,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
};
ct3d->dc.total_capacity += region->len;
region->blk_bitmap = bitmap_new(region->len / region->block_size);
+ qemu_mutex_init(®ion->bitmap_lock);
}
QTAILQ_INIT(&ct3d->dc.extents);
QTAILQ_INIT(&ct3d->dc.extents_pending);
@@ -1020,6 +1021,7 @@ void ct3_set_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
return;
}
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
bitmap_set(region->blk_bitmap, (dpa - region->base) / region->block_size,
len / region->block_size);
}
@@ -1046,6 +1048,7 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
* if bits between [dpa, dpa + len) are all 1s, meaning the DPA range is
* backed with DC extents, return true; else return false.
*/
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
return find_next_zero_bit(region->blk_bitmap, nr + nbits, nr) == nr + nbits;
}
@@ -1067,6 +1070,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
nr = (dpa - region->base) / region->block_size;
nbits = len / region->block_size;
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
bitmap_clear(region->blk_bitmap, nr, nbits);
}
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 397edcff4c..6a5025200c 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -547,6 +547,7 @@ typedef struct CXLDCRegion {
uint8_t flags;
unsigned long *blk_bitmap;
uint64_t supported_blk_size_bitmask;
+ QemuMutex bitmap_lock;
/* Following bools make up dsmas flags, as defined in the CDAT */
bool nonvolatile;
bool sharable;
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [QEMU PATCH v4 06/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (4 preceding siblings ...)
2025-06-26 22:23 ` [QEMU PATCH v4 05/10] hw/cxl_type3: Add DC Region bitmap lock anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 07/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists anisa.su887
` (3 subsequent siblings)
9 siblings, 0 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su, Fan Ni
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 86 ++++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 6 +--
include/hw/cxl/cxl_device.h | 3 ++
include/hw/cxl/cxl_mailbox.h | 6 +++
4 files changed, 98 insertions(+), 3 deletions(-)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 7f0709a27f..69c618383a 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -121,6 +121,7 @@ enum {
FMAPI_DCD_MGMT = 0x56,
#define GET_DCD_INFO 0x0
#define GET_HOST_DC_REGION_CONFIG 0x1
+ #define SET_DC_REGION_CONFIG 0x2
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3387,6 +3388,84 @@ static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
+static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint8_t reg_id;
+ uint8_t rsvd[3];
+ uint64_t block_sz;
+ uint8_t flags;
+ uint8_t rsvd2[3];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLEventDynamicCapacity dcEvent = {};
+ CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
+
+ /*
+ * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
+ * This command shall fail with Unsupported when the Sanitize on Release
+ * field does not match the region’s configuration... and the device
+ * does not support reconfiguration of the Sanitize on Release setting.
+ *
+ * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
+ * doesn't match.
+ */
+ if ((in->flags & 0x1) != (region->flags & 0x1)) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ if (in->reg_id >= DCD_MAX_NUM_REGION) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ /* Check that no extents are in the region being reconfigured */
+ if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ /* Check that new block size is supported */
+ if (!test_bit(BIT((int) log2(in->block_sz)),
+ ®ion->supported_blk_size_bitmask)) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ /* Return success if new block size == current block size */
+ if (in->block_sz == region->block_size) {
+ return CXL_MBOX_SUCCESS;
+ }
+
+ /* Free bitmap and create new one for new block size. */
+ qemu_mutex_lock(®ion->bitmap_lock);
+ g_free(region->blk_bitmap);
+ region->blk_bitmap = bitmap_new(region->len / in->block_sz);
+ qemu_mutex_unlock(®ion->bitmap_lock);
+ region->block_size = in->block_sz;
+
+ /* Create event record and insert into event log */
+ cxl_assign_event_header(&dcEvent.hdr,
+ &dynamic_capacity_uuid,
+ (1 << CXL_EVENT_TYPE_INFO),
+ sizeof(dcEvent),
+ cxl_device_get_timestamp(&ct3d->cxl_dstate));
+ dcEvent.type = DC_EVENT_REGION_CONFIG_UPDATED;
+ dcEvent.validity_flags = 1;
+ dcEvent.host_id = 0;
+ dcEvent.updated_region_id = in->reg_id;
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&dcEvent)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3505,6 +3584,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
cmd_fm_get_dcd_info, 0, 0 },
[FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
cmd_fm_get_host_dc_region_config, 4, 0 },
+ [FMAPI_DCD_MGMT][SET_DC_REGION_CONFIG] = { "SET_DC_REGION_CONFIG",
+ cmd_fm_set_dc_region_config, 16,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index b872a26173..ee554a77be 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1590,9 +1590,9 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
pcie_aer_inject_error(PCI_DEVICE(obj), &err);
}
-static void cxl_assign_event_header(CXLEventRecordHdr *hdr,
- const QemuUUID *uuid, uint32_t flags,
- uint8_t length, uint64_t timestamp)
+void cxl_assign_event_header(CXLEventRecordHdr *hdr,
+ const QemuUUID *uuid, uint32_t flags,
+ uint8_t length, uint64_t timestamp)
{
st24_le_p(&hdr->flags, flags);
hdr->length = length;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 6a5025200c..82e3bc1a71 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -729,4 +729,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
uint64_t len);
bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
uint64_t len);
+void cxl_assign_event_header(CXLEventRecordHdr *hdr,
+ const QemuUUID *uuid, uint32_t flags,
+ uint8_t length, uint64_t timestamp);
#endif
diff --git a/include/hw/cxl/cxl_mailbox.h b/include/hw/cxl/cxl_mailbox.h
index 9008402d1c..a05d7cb5b7 100644
--- a/include/hw/cxl/cxl_mailbox.h
+++ b/include/hw/cxl/cxl_mailbox.h
@@ -8,6 +8,7 @@
#ifndef CXL_MAILBOX_H
#define CXL_MAILBOX_H
+#define CXL_MBOX_CONFIG_CHANGE_COLD_RESET (1)
#define CXL_MBOX_IMMEDIATE_CONFIG_CHANGE (1 << 1)
#define CXL_MBOX_IMMEDIATE_DATA_CHANGE (1 << 2)
#define CXL_MBOX_IMMEDIATE_POLICY_CHANGE (1 << 3)
@@ -15,5 +16,10 @@
#define CXL_MBOX_SECURITY_STATE_CHANGE (1 << 5)
#define CXL_MBOX_BACKGROUND_OPERATION (1 << 6)
#define CXL_MBOX_BACKGROUND_OPERATION_ABORT (1 << 7)
+#define CXL_MBOX_SECONDARY_MBOX_SUPPORTED (1 << 8)
+#define CXL_MBOX_REQUEST_ABORT_BACKGROUND_OP_SUPPORTED (1 << 9)
+#define CXL_MBOX_CEL_10_TO_11_VALID (1 << 10)
+#define CXL_MBOX_CONFIG_CHANGE_CONV_RESET (1 << 11)
+#define CXL_MBOX_CONFIG_CHANGE_CXL_RESET (1 << 12)
#endif
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [QEMU PATCH v4 07/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (5 preceding siblings ...)
2025-06-26 22:23 ` [QEMU PATCH v4 06/10] cxl-mailbox-utils: 0x5602 - FMAPI Set DC Region Config anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 08/10] hw/cxl: create helper function to create DC Event Records from extents anisa.su887
` (2 subsequent siblings)
9 siblings, 0 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su, Fan Ni
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5603 implemented per CXL r3.2 Spec Section 7.6.7.6.4
Very similar to previously implemented command 0x4801.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 76 ++++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 69c618383a..e3d54ed124 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -122,6 +122,7 @@ enum {
#define GET_DCD_INFO 0x0
#define GET_HOST_DC_REGION_CONFIG 0x1
#define SET_DC_REGION_CONFIG 0x2
+ #define GET_DC_REGION_EXTENT_LIST 0x3
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3466,6 +3467,79 @@ static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.4 Get DC Region Extent Lists (Opcode 5603h) */
+static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t rsvd[2];
+ uint32_t extent_cnt;
+ uint32_t start_extent_id;
+ } QEMU_PACKED *in = (void *)payload_in;
+ struct {
+ uint16_t host_id;
+ uint8_t rsvd[2];
+ uint32_t start_extent_id;
+ uint32_t extents_returned;
+ uint32_t total_extents;
+ uint32_t list_generation_num;
+ uint8_t rsvd2[4];
+ CXLDCExtentRaw records[];
+ } QEMU_PACKED *out = (void *)payload_out;
+ QEMU_BUILD_BUG_ON(sizeof(*in) != 0xc);
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLDCExtent *ent;
+ CXLDCExtentRaw *out_rec;
+ uint16_t record_count = 0, record_done = 0, i = 0;
+ uint16_t out_pl_len, max_size;
+
+ if (in->host_id != 0) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ if (in->start_extent_id > ct3d->dc.nr_extents_accepted) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ record_count = MIN(in->extent_cnt,
+ ct3d->dc.nr_extents_accepted - in->start_extent_id);
+ max_size = CXL_MAILBOX_MAX_PAYLOAD_SIZE - sizeof(*out);
+ record_count = MIN(record_count, max_size / sizeof(out->records[0]));
+ out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
+
+ stw_le_p(&out->host_id, in->host_id);
+ stl_le_p(&out->start_extent_id, in->start_extent_id);
+ stl_le_p(&out->extents_returned, record_count);
+ stl_le_p(&out->total_extents, ct3d->dc.nr_extents_accepted);
+ stl_le_p(&out->list_generation_num, ct3d->dc.ext_list_gen_seq);
+
+ if (record_count > 0) {
+ QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) {
+ if (i++ < in->start_extent_id) {
+ continue;
+ }
+ out_rec = &out->records[record_done];
+ stq_le_p(&out_rec->start_dpa, ent->start_dpa);
+ stq_le_p(&out_rec->len, ent->len);
+ memcpy(&out_rec->tag, ent->tag, 0x10);
+ stw_le_p(&out_rec->shared_seq, ent->shared_seq);
+
+ record_done++;
+ if (record_done == record_count) {
+ break;
+ }
+ }
+ }
+
+ *len_out = out_pl_len;
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3591,6 +3665,8 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
+ [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
+ cmd_fm_get_dc_region_extent_list, 12, 0 },
};
/*
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* [QEMU PATCH v4 08/10] hw/cxl: create helper function to create DC Event Records from extents
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (6 preceding siblings ...)
2025-06-26 22:23 ` [QEMU PATCH v4 07/10] cxl-mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-07-03 3:58 ` Fan Ni
2025-06-26 22:23 ` [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
2025-06-26 22:23 ` [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release anisa.su887
9 siblings, 1 reply; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su
From: Anisa Su <anisa.su@samsung.com>
Prepatory patch for following FMAPI Add/Release Patches. Refactors part
of qmp_cxl_process_dynamic_capacity_prescriptive() into a helper
function to create DC Event Records and insert in the event log.
Moves definition for CXL_NUM_EXTENTS_SUPPORTED to cxl.h so it can be
accessed by cxl-mailbox-utils.c and cxl-events.c, where the helper
function is defined.
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-events.c | 38 +++++++++++++++++++++++++++++++++++++
hw/cxl/cxl-mailbox-utils.c | 1 -
hw/mem/cxl_type3.c | 37 +-----------------------------------
include/hw/cxl/cxl.h | 1 +
include/hw/cxl/cxl_device.h | 4 ++++
5 files changed, 44 insertions(+), 37 deletions(-)
diff --git a/hw/cxl/cxl-events.c b/hw/cxl/cxl-events.c
index 12dee2e467..724055f2cf 100644
--- a/hw/cxl/cxl-events.c
+++ b/hw/cxl/cxl-events.c
@@ -260,3 +260,41 @@ void cxl_event_irq_assert(CXLType3Dev *ct3d)
}
}
}
+
+void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
+ CXLDCEventType type,
+ CXLDCExtentRaw extents[],
+ uint32_t ext_count)
+{
+ CXLEventDynamicCapacity event_rec = {};
+ int i;
+
+ cxl_assign_event_header(&event_rec.hdr,
+ &dynamic_capacity_uuid,
+ (1 << CXL_EVENT_TYPE_INFO),
+ sizeof(event_rec),
+ cxl_device_get_timestamp(&ct3d->cxl_dstate));
+ event_rec.type = type;
+ event_rec.validity_flags = 1;
+ event_rec.host_id = 0;
+ event_rec.updated_region_id = 0;
+ event_rec.extents_avail = CXL_NUM_EXTENTS_SUPPORTED -
+ ct3d->dc.total_extent_count;
+
+ for (i = 0; i < ext_count; i++) {
+ memcpy(&event_rec.dynamic_capacity_extent,
+ &extents[i],
+ sizeof(CXLDCExtentRaw));
+ event_rec.flags = 0;
+ if (i < ext_count - 1) {
+ /* Set "More" flag */
+ event_rec.flags |= BIT(0);
+ }
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&event_rec)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ }
+}
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index e3d54ed124..382c41c025 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -27,7 +27,6 @@
#define CXL_CAPACITY_MULTIPLIER (256 * MiB)
#define CXL_DC_EVENT_LOG_SIZE 8
-#define CXL_NUM_EXTENTS_SUPPORTED 512
#define CXL_NUM_TAGS_SUPPORTED 0
#define CXL_ALERTS_LIFE_USED_WARN_THRESH (1 << 0)
#define CXL_ALERTS_OVER_TEMP_WARN_THRESH (1 << 1)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index ee554a77be..9c2b9d197b 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1957,15 +1957,11 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
CxlDynamicCapacityExtentList *records, Error **errp)
{
Object *obj;
- CXLEventDynamicCapacity dCap = {};
- CXLEventRecordHdr *hdr = &dCap.hdr;
CXLType3Dev *dcd;
- uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
uint32_t num_extents = 0;
CxlDynamicCapacityExtentList *list;
CXLDCExtentGroup *group = NULL;
g_autofree CXLDCExtentRaw *extents = NULL;
- uint8_t enc_log = CXL_EVENT_TYPE_DYNAMIC_CAP;
uint64_t dpa, offset, len, block_size;
g_autofree unsigned long *blk_bitmap = NULL;
int i;
@@ -2078,38 +2074,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
dcd->dc.total_extent_count += num_extents;
}
- /*
- * CXL r3.1 section 8.2.9.2.1.6: Dynamic Capacity Event Record
- *
- * All Dynamic Capacity event records shall set the Event Record Severity
- * field in the Common Event Record Format to Informational Event. All
- * Dynamic Capacity related events shall be logged in the Dynamic Capacity
- * Event Log.
- */
- cxl_assign_event_header(hdr, &dynamic_capacity_uuid, flags, sizeof(dCap),
- cxl_device_get_timestamp(&dcd->cxl_dstate));
-
- dCap.type = type;
- /* FIXME: for now, validity flag is cleared */
- dCap.validity_flags = 0;
- stw_le_p(&dCap.host_id, hid);
- /* only valid for DC_REGION_CONFIG_UPDATED event */
- dCap.updated_region_id = 0;
- for (i = 0; i < num_extents; i++) {
- memcpy(&dCap.dynamic_capacity_extent, &extents[i],
- sizeof(CXLDCExtentRaw));
-
- dCap.flags = 0;
- if (i < num_extents - 1) {
- /* Set "More" flag */
- dCap.flags |= BIT(0);
- }
-
- if (cxl_event_insert(&dcd->cxl_dstate, enc_log,
- (CXLEventRecordRaw *)&dCap)) {
- cxl_event_irq_assert(dcd);
- }
- }
+ cxl_create_dc_event_records_for_extents(dcd, type, extents, num_extents);
}
void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index 75e47b6864..3ae4303383 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -23,6 +23,7 @@
#define CXL_DEVICE_REG_BAR_IDX 2
#define CXL_WINDOW_MAX 10
+#define CXL_NUM_EXTENTS_SUPPORTED 512
typedef struct PXBCXLDev PXBCXLDev;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 82e3bc1a71..91ec1ba299 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -732,4 +732,8 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
void cxl_assign_event_header(CXLEventRecordHdr *hdr,
const QemuUUID *uuid, uint32_t flags,
uint8_t length, uint64_t timestamp);
+void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
+ CXLDCEventType type,
+ CXLDCExtentRaw extents[],
+ uint32_t ext_count);
#endif
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 08/10] hw/cxl: create helper function to create DC Event Records from extents
2025-06-26 22:23 ` [QEMU PATCH v4 08/10] hw/cxl: create helper function to create DC Event Records from extents anisa.su887
@ 2025-07-03 3:58 ` Fan Ni
0 siblings, 0 replies; 19+ messages in thread
From: Fan Ni @ 2025-07-03 3:58 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari,
linux-cxl, Anisa Su
On Thu, Jun 26, 2025 at 10:23:31PM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> Prepatory patch for following FMAPI Add/Release Patches. Refactors part
> of qmp_cxl_process_dynamic_capacity_prescriptive() into a helper
> function to create DC Event Records and insert in the event log.
>
> Moves definition for CXL_NUM_EXTENTS_SUPPORTED to cxl.h so it can be
> accessed by cxl-mailbox-utils.c and cxl-events.c, where the helper
> function is defined.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> ---
> hw/cxl/cxl-events.c | 38 +++++++++++++++++++++++++++++++++++++
> hw/cxl/cxl-mailbox-utils.c | 1 -
> hw/mem/cxl_type3.c | 37 +-----------------------------------
> include/hw/cxl/cxl.h | 1 +
> include/hw/cxl/cxl_device.h | 4 ++++
> 5 files changed, 44 insertions(+), 37 deletions(-)
>
> diff --git a/hw/cxl/cxl-events.c b/hw/cxl/cxl-events.c
> index 12dee2e467..724055f2cf 100644
> --- a/hw/cxl/cxl-events.c
> +++ b/hw/cxl/cxl-events.c
> @@ -260,3 +260,41 @@ void cxl_event_irq_assert(CXLType3Dev *ct3d)
> }
> }
> }
> +
> +void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> + CXLDCEventType type,
> + CXLDCExtentRaw extents[],
> + uint32_t ext_count)
> +{
> + CXLEventDynamicCapacity event_rec = {};
> + int i;
> +
> + cxl_assign_event_header(&event_rec.hdr,
> + &dynamic_capacity_uuid,
> + (1 << CXL_EVENT_TYPE_INFO),
> + sizeof(event_rec),
> + cxl_device_get_timestamp(&ct3d->cxl_dstate));
> + event_rec.type = type;
> + event_rec.validity_flags = 1;
> + event_rec.host_id = 0;
> + event_rec.updated_region_id = 0;
> + event_rec.extents_avail = CXL_NUM_EXTENTS_SUPPORTED -
> + ct3d->dc.total_extent_count;
> +
> + for (i = 0; i < ext_count; i++) {
> + memcpy(&event_rec.dynamic_capacity_extent,
> + &extents[i],
> + sizeof(CXLDCExtentRaw));
> + event_rec.flags = 0;
> + if (i < ext_count - 1) {
> + /* Set "More" flag */
> + event_rec.flags |= BIT(0);
> + }
> +
> + if (cxl_event_insert(&ct3d->cxl_dstate,
> + CXL_EVENT_TYPE_DYNAMIC_CAP,
> + (CXLEventRecordRaw *)&event_rec)) {
> + cxl_event_irq_assert(ct3d);
> + }
> + }
> +}
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index e3d54ed124..382c41c025 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -27,7 +27,6 @@
>
> #define CXL_CAPACITY_MULTIPLIER (256 * MiB)
> #define CXL_DC_EVENT_LOG_SIZE 8
> -#define CXL_NUM_EXTENTS_SUPPORTED 512
> #define CXL_NUM_TAGS_SUPPORTED 0
> #define CXL_ALERTS_LIFE_USED_WARN_THRESH (1 << 0)
> #define CXL_ALERTS_OVER_TEMP_WARN_THRESH (1 << 1)
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index ee554a77be..9c2b9d197b 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1957,15 +1957,11 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
> CxlDynamicCapacityExtentList *records, Error **errp)
> {
> Object *obj;
> - CXLEventDynamicCapacity dCap = {};
> - CXLEventRecordHdr *hdr = &dCap.hdr;
> CXLType3Dev *dcd;
> - uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
> uint32_t num_extents = 0;
> CxlDynamicCapacityExtentList *list;
> CXLDCExtentGroup *group = NULL;
> g_autofree CXLDCExtentRaw *extents = NULL;
> - uint8_t enc_log = CXL_EVENT_TYPE_DYNAMIC_CAP;
> uint64_t dpa, offset, len, block_size;
> g_autofree unsigned long *blk_bitmap = NULL;
> int i;
> @@ -2078,38 +2074,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
> dcd->dc.total_extent_count += num_extents;
> }
>
> - /*
> - * CXL r3.1 section 8.2.9.2.1.6: Dynamic Capacity Event Record
> - *
> - * All Dynamic Capacity event records shall set the Event Record Severity
> - * field in the Common Event Record Format to Informational Event. All
> - * Dynamic Capacity related events shall be logged in the Dynamic Capacity
> - * Event Log.
> - */
> - cxl_assign_event_header(hdr, &dynamic_capacity_uuid, flags, sizeof(dCap),
> - cxl_device_get_timestamp(&dcd->cxl_dstate));
> -
> - dCap.type = type;
> - /* FIXME: for now, validity flag is cleared */
> - dCap.validity_flags = 0;
> - stw_le_p(&dCap.host_id, hid);
> - /* only valid for DC_REGION_CONFIG_UPDATED event */
> - dCap.updated_region_id = 0;
> - for (i = 0; i < num_extents; i++) {
> - memcpy(&dCap.dynamic_capacity_extent, &extents[i],
> - sizeof(CXLDCExtentRaw));
> -
> - dCap.flags = 0;
> - if (i < num_extents - 1) {
> - /* Set "More" flag */
> - dCap.flags |= BIT(0);
> - }
> -
> - if (cxl_event_insert(&dcd->cxl_dstate, enc_log,
> - (CXLEventRecordRaw *)&dCap)) {
> - cxl_event_irq_assert(dcd);
> - }
> - }
> + cxl_create_dc_event_records_for_extents(dcd, type, extents, num_extents);
> }
>
> void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,
> diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
> index 75e47b6864..3ae4303383 100644
> --- a/include/hw/cxl/cxl.h
> +++ b/include/hw/cxl/cxl.h
> @@ -23,6 +23,7 @@
> #define CXL_DEVICE_REG_BAR_IDX 2
>
> #define CXL_WINDOW_MAX 10
> +#define CXL_NUM_EXTENTS_SUPPORTED 512
>
> typedef struct PXBCXLDev PXBCXLDev;
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index 82e3bc1a71..91ec1ba299 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -732,4 +732,8 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> const QemuUUID *uuid, uint32_t flags,
> uint8_t length, uint64_t timestamp);
> +void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> + CXLDCEventType type,
> + CXLDCExtentRaw extents[],
> + uint32_t ext_count);
> #endif
> --
> 2.47.2
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (7 preceding siblings ...)
2025-06-26 22:23 ` [QEMU PATCH v4 08/10] hw/cxl: create helper function to create DC Event Records from extents anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-30 17:01 ` Jonathan Cameron via
2025-07-03 4:17 ` Fan Ni
2025-06-26 22:23 ` [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release anisa.su887
9 siblings, 2 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 106 ++++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 8 +--
include/hw/cxl/cxl_device.h | 4 ++
3 files changed, 114 insertions(+), 4 deletions(-)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 382c41c025..787eeaa7b9 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -122,6 +122,7 @@ enum {
#define GET_HOST_DC_REGION_CONFIG 0x1
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
+ #define INITIATE_DC_ADD 0x4
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3539,6 +3540,104 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/*
+ * Helper function to convert CXLDCExtentRaw to CXLUpdateDCExtentListInPl
+ * in order to reuse cxl_detect_malformed_extent_list() function which accepts
+ * CXLUpdateDCExtentListInPl as a parameter.
+ */
+static void convert_raw_extents(CXLDCExtentRaw raw_extents[],
+ CXLUpdateDCExtentListInPl *extent_list,
+ int count)
+{
+ int i;
+
+ extent_list->num_entries_updated = count;
+
+ for (i = 0; i < count; i++) {
+ extent_list->updated_entries[i].start_dpa = raw_extents[i].start_dpa;
+ extent_list->updated_entries[i].len = raw_extents[i].len;
+ }
+}
+
+/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
+static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t selection_policy;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ int i, rc;
+
+ switch (in->selection_policy) {
+ case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {
+ /* Adding extents exceeds device's extent tracking ability. */
+ if (in->ext_count + ct3d->dc.total_extent_count >
+ CXL_NUM_EXTENTS_SUPPORTED) {
+ return CXL_MBOX_RESOURCES_EXHAUSTED;
+ }
+
+ g_autofree CXLUpdateDCExtentListInPl *list =
+ g_malloc0(sizeof(*list) +
+ in->ext_count * sizeof(*list->updated_entries));
+
+ convert_raw_extents(in->extents, list, in->ext_count);
+ rc = cxl_detect_malformed_extent_list(ct3d, list);
+
+ for (i = 0; i < in->ext_count; i++) {
+ CXLDCExtentRaw ext = in->extents[i];
+ /* Check requested extents do not overlap with pending extents. */
+ if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
+ ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ /* Check requested extents do not overlap with existing extents. */
+ if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents,
+ ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ }
+
+ if (rc) {
+ return rc;
+ }
+
+ CXLDCExtentGroup *group = NULL;
+ for (i = 0; i < in->ext_count; i++) {
+ group = cxl_insert_extent_to_extent_group(group,
+ in->extents[i].start_dpa,
+ in->extents[i].len,
+ in->extents[i].tag,
+ in->extents[i].shared_seq);
+ }
+
+ cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
+ ct3d->dc.total_extent_count += in->ext_count;
+ cxl_create_dc_event_records_for_extents(ct3d,
+ DC_EVENT_ADD_CAPACITY,
+ in->extents,
+ in->ext_count);
+
+ return CXL_MBOX_SUCCESS;
+ }
+ default: {
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent selection policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+ }
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3666,6 +3765,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
[FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
cmd_fm_get_dc_region_extent_list, 12, 0 },
+ [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
+ cmd_fm_initiate_dc_add, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 9c2b9d197b..7676d785c2 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1885,8 +1885,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
* the list.
* Return value: return true if has overlaps; otherwise, return false
*/
-static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtent *ent;
Range range1, range2;
@@ -1931,8 +1931,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
return false;
}
-static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtentGroup *group;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 91ec1ba299..7be68d98c6 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -736,4 +736,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
CXLDCEventType type,
CXLDCExtentRaw extents[],
uint32_t ext_count);
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len);
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len);
#endif
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-06-26 22:23 ` [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
@ 2025-06-30 17:01 ` Jonathan Cameron via
2025-07-03 4:17 ` Fan Ni
1 sibling, 0 replies; 19+ messages in thread
From: Jonathan Cameron via @ 2025-06-30 17:01 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, nifan.cxl, dave, alok.a.tiwari, linux-cxl, Anisa Su
On Thu, 26 Jun 2025 22:23:32 +0000
anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
There are a few long lines in here check patch doesn't like.
I tweaked as described inline whilst picking them up.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
> hw/cxl/cxl-mailbox-utils.c | 106 ++++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 8 +--
> include/hw/cxl/cxl_device.h | 4 ++
> 3 files changed, 114 insertions(+), 4 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 382c41c025..787eeaa7b9 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> +/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
> +static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t selection_policy;
> + uint8_t reg_num;
> + uint64_t length;
> + uint8_t tag[0x10];
> + uint32_t ext_count;
> + CXLDCExtentRaw extents[];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + int i, rc;
> +
> + switch (in->selection_policy) {
> + case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {
> + /* Adding extents exceeds device's extent tracking ability. */
> + if (in->ext_count + ct3d->dc.total_extent_count >
> + CXL_NUM_EXTENTS_SUPPORTED) {
> + return CXL_MBOX_RESOURCES_EXHAUSTED;
> + }
> +
> + g_autofree CXLUpdateDCExtentListInPl *list =
> + g_malloc0(sizeof(*list) +
> + in->ext_count * sizeof(*list->updated_entries));
> +
> + convert_raw_extents(in->extents, list, in->ext_count);
> + rc = cxl_detect_malformed_extent_list(ct3d, list);
> +
> + for (i = 0; i < in->ext_count; i++) {
> + CXLDCExtentRaw ext = in->extents[i];
Using a pointer here avoids copying data for no particular reason.
> + /* Check requested extents do not overlap with pending extents. */
This is a touch long. I tweaked to end with ... pending ones.
Given we are talking extents that should be clear.
> + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
This is the one case I'll leave as it is not nice to wrap it anywhere different.
> + ext.start_dpa, ext.len)) {
wrapped this
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + /* Check requested extents do not overlap with existing extents. */
exiting ones. */
> + if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents,
> + ext.start_dpa, ext.len)) {
Wrapped this.
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + }
> +
> + if (rc) {
> + return rc;
> + }
> +
> + CXLDCExtentGroup *group = NULL;
> + for (i = 0; i < in->ext_count; i++) {
Used
CXLDCExtentRaw *ext = &in->extents[i];
> + group = cxl_insert_extent_to_extent_group(group,
> + in->extents[i].start_dpa,
To shorten all these (similar to previous loop)
> + in->extents[i].len,
> + in->extents[i].tag,
> + in->extents[i].shared_seq);
> + }
> +
> + cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
> + ct3d->dc.total_extent_count += in->ext_count;
> + cxl_create_dc_event_records_for_extents(ct3d,
> + DC_EVENT_ADD_CAPACITY,
> + in->extents,
> + in->ext_count);
> +
> + return CXL_MBOX_SUCCESS;
> + }
> + default: {
> + qemu_log_mask(LOG_UNIMP,
> + "CXL extent selection policy not supported.\n");
> + return CXL_MBOX_INVALID_INPUT;
> + }
> + }
> +}
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-06-26 22:23 ` [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
2025-06-30 17:01 ` Jonathan Cameron via
@ 2025-07-03 4:17 ` Fan Ni
2025-07-03 9:05 ` Jonathan Cameron via
1 sibling, 1 reply; 19+ messages in thread
From: Fan Ni @ 2025-07-03 4:17 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari,
linux-cxl, Anisa Su
On Thu, Jun 26, 2025 at 10:23:32PM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
Minor comments inline...
> hw/cxl/cxl-mailbox-utils.c | 106 ++++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 8 +--
> include/hw/cxl/cxl_device.h | 4 ++
> 3 files changed, 114 insertions(+), 4 deletions(-)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 382c41c025..787eeaa7b9 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -122,6 +122,7 @@ enum {
> #define GET_HOST_DC_REGION_CONFIG 0x1
> #define SET_DC_REGION_CONFIG 0x2
> #define GET_DC_REGION_EXTENT_LIST 0x3
> + #define INITIATE_DC_ADD 0x4
> };
>
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> @@ -3539,6 +3540,104 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +/*
> + * Helper function to convert CXLDCExtentRaw to CXLUpdateDCExtentListInPl
> + * in order to reuse cxl_detect_malformed_extent_list() function which accepts
> + * CXLUpdateDCExtentListInPl as a parameter.
> + */
> +static void convert_raw_extents(CXLDCExtentRaw raw_extents[],
> + CXLUpdateDCExtentListInPl *extent_list,
> + int count)
> +{
> + int i;
> +
> + extent_list->num_entries_updated = count;
> +
> + for (i = 0; i < count; i++) {
> + extent_list->updated_entries[i].start_dpa = raw_extents[i].start_dpa;
> + extent_list->updated_entries[i].len = raw_extents[i].len;
> + }
> +}
> +
> +/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
Keep the spec reference comments consistent like below,
/* CXL r3.2 Section 7.6.7.6.5: Initiate Dynamic Capacity Add (Opcode 5604h) */
> +static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t selection_policy;
> + uint8_t reg_num;
> + uint64_t length;
> + uint8_t tag[0x10];
> + uint32_t ext_count;
> + CXLDCExtentRaw extents[];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + int i, rc;
> +
> + switch (in->selection_policy) {
> + case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {
> + /* Adding extents exceeds device's extent tracking ability. */
> + if (in->ext_count + ct3d->dc.total_extent_count >
> + CXL_NUM_EXTENTS_SUPPORTED) {
> + return CXL_MBOX_RESOURCES_EXHAUSTED;
> + }
> +
> + g_autofree CXLUpdateDCExtentListInPl *list =
This seems not consistent with existing code style. Type declaration
comes first.
> + g_malloc0(sizeof(*list) +
> + in->ext_count * sizeof(*list->updated_entries));
> +
> + convert_raw_extents(in->extents, list, in->ext_count);
> + rc = cxl_detect_malformed_extent_list(ct3d, list);
> +
> + for (i = 0; i < in->ext_count; i++) {
> + CXLDCExtentRaw ext = in->extents[i];
Use pointer as Jonathan mentioned.
> + /* Check requested extents do not overlap with pending extents. */
shorten the comments like
Extents to add cannot overlap with pending extents
> + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
> + ext.start_dpa, ext.len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + /* Check requested extents do not overlap with existing extents. */
Not allowed to add extents already existing
> + if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents,
> + ext.start_dpa, ext.len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + }
> +
> + if (rc) {
> + return rc;
> + }
> +
> + CXLDCExtentGroup *group = NULL;
> + for (i = 0; i < in->ext_count; i++) {
> + group = cxl_insert_extent_to_extent_group(group,
> + in->extents[i].start_dpa,
> + in->extents[i].len,
> + in->extents[i].tag,
> + in->extents[i].shared_seq);
Shorten the lines as Jonathan suggested.
Fan
> + }
> +
> + cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
> + ct3d->dc.total_extent_count += in->ext_count;
> + cxl_create_dc_event_records_for_extents(ct3d,
> + DC_EVENT_ADD_CAPACITY,
> + in->extents,
> + in->ext_count);
> +
> + return CXL_MBOX_SUCCESS;
> + }
> + default: {
> + qemu_log_mask(LOG_UNIMP,
> + "CXL extent selection policy not supported.\n");
> + return CXL_MBOX_INVALID_INPUT;
> + }
> + }
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3666,6 +3765,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
> cmd_fm_get_dc_region_extent_list, 12, 0 },
> + [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
> + cmd_fm_initiate_dc_add, ~0,
> + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> };
>
> /*
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 9c2b9d197b..7676d785c2 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1885,8 +1885,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
> * the list.
> * Return value: return true if has overlaps; otherwise, return false
> */
> -static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> - uint64_t dpa, uint64_t len)
> +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> + uint64_t dpa, uint64_t len)
> {
> CXLDCExtent *ent;
> Range range1, range2;
> @@ -1931,8 +1931,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
> return false;
> }
>
> -static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> - uint64_t dpa, uint64_t len)
> +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> + uint64_t dpa, uint64_t len)
> {
> CXLDCExtentGroup *group;
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index 91ec1ba299..7be68d98c6 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -736,4 +736,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> CXLDCEventType type,
> CXLDCExtentRaw extents[],
> uint32_t ext_count);
> +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> + uint64_t dpa, uint64_t len);
> +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> + uint64_t dpa, uint64_t len);
> #endif
> --
> 2.47.2
>
--
Fan Ni (From gmail)
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-07-03 4:17 ` Fan Ni
@ 2025-07-03 9:05 ` Jonathan Cameron via
0 siblings, 0 replies; 19+ messages in thread
From: Jonathan Cameron via @ 2025-07-03 9:05 UTC (permalink / raw)
To: Fan Ni; +Cc: anisa.su887, qemu-devel, dave, alok.a.tiwari, linux-cxl, Anisa Su
On Thu, 3 Jul 2025 04:17:28 +0000
Fan Ni <nifan.cxl@gmail.com> wrote:
> On Thu, Jun 26, 2025 at 10:23:32PM +0000, anisa.su887@gmail.com wrote:
> > From: Anisa Su <anisa.su@samsung.com>
> >
> > FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
> >
> > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > ---
>
> Minor comments inline...
Oops. This raced with me sending out the version for Michael to
consider picking up.
https://lore.kernel.org/qemu-devel/20250702160219.989731-1-Jonathan.Cameron@huawei.com/
I did the lazy maintainer thing of just tweaking the small stuff to
avoid the round trip of another version (and increased chance of missing
the soft freeze).
Other than the g_autofree comment where I'm not sure what you mean,
the only outstanding one is the missing colon and I'd rather not respin
for that even if it is a bit ugly.
Take a look as well at the comments that you point out needed shortening.
I did so but with different text from your suggestion.
> > +
> > +/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
>
> Keep the spec reference comments consistent like below,
> /* CXL r3.2 Section 7.6.7.6.5: Initiate Dynamic Capacity Add (Opcode 5604h) */
I missed this one. I'm not thinking this justifies a respin.
>
> > +static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> > + uint8_t *payload_in,
> > + size_t len_in,
> > + uint8_t *payload_out,
> > + size_t *len_out,
> > + CXLCCI *cci)
> > +{
> > + struct {
> > + uint16_t host_id;
> > + uint8_t selection_policy;
> > + uint8_t reg_num;
> > + uint64_t length;
> > + uint8_t tag[0x10];
> > + uint32_t ext_count;
> > + CXLDCExtentRaw extents[];
> > + } QEMU_PACKED *in = (void *)payload_in;
> > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > + int i, rc;
> > +
> > + switch (in->selection_policy) {
> > + case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {
> > + /* Adding extents exceeds device's extent tracking ability. */
> > + if (in->ext_count + ct3d->dc.total_extent_count >
> > + CXL_NUM_EXTENTS_SUPPORTED) {
> > + return CXL_MBOX_RESOURCES_EXHAUSTED;
> > + }
> > +
> > + g_autofree CXLUpdateDCExtentListInPl *list =
> This seems not consistent with existing code style. Type declaration
> comes first.
I'm not following this comment. I grepped and unlike the kernel equivalent
it seems g_autofree is always first in qemu code.
> > + g_malloc0(sizeof(*list) +
> > + in->ext_count * sizeof(*list->updated_entries));
> > +
> > + convert_raw_extents(in->extents, list, in->ext_count);
> > + rc = cxl_detect_malformed_extent_list(ct3d, list);
> > +
> > + for (i = 0; i < in->ext_count; i++) {
> > + CXLDCExtentRaw ext = in->extents[i];
> Use pointer as Jonathan mentioned.
I tweaked this.
> > + /* Check requested extents do not overlap with pending extents. */
> shorten the comments like
> Extents to add cannot overlap with pending extents
Shortened them but slightly differently to this.
Check requested extents do not overlap with pending ones
If you don't feel strongly about the wording I'd rather leave that be.
> > + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
> > + ext.start_dpa, ext.len)) {
> > + return CXL_MBOX_INVALID_EXTENT_LIST;
> > + }
> > + /* Check requested extents do not overlap with existing extents. */
> Not allowed to add extents already existing
> > + if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents,
> > + ext.start_dpa, ext.len)) {
> > + return CXL_MBOX_INVALID_EXTENT_LIST;
> > + }
> > + }
> > +
> > + if (rc) {
> > + return rc;
> > + }
> > +
> > + CXLDCExtentGroup *group = NULL;
> > + for (i = 0; i < in->ext_count; i++) {
> > + group = cxl_insert_extent_to_extent_group(group,
> > + in->extents[i].start_dpa,
> > + in->extents[i].len,
> > + in->extents[i].tag,
> > + in->extents[i].shared_seq);
> Shorten the lines as Jonathan suggested.
I did that in the version I posted.
Thanks,
Jonathan
>
> Fan
> > + }
> > +
> > + cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
> > + ct3d->dc.total_extent_count += in->ext_count;
> > + cxl_create_dc_event_records_for_extents(ct3d,
> > + DC_EVENT_ADD_CAPACITY,
> > + in->extents,
> > + in->ext_count);
> > +
> > + return CXL_MBOX_SUCCESS;
> > + }
> > + default: {
> > + qemu_log_mask(LOG_UNIMP,
> > + "CXL extent selection policy not supported.\n");
> > + return CXL_MBOX_INVALID_INPUT;
> > + }
> > + }
> > +}
> > +
> > static const struct cxl_cmd cxl_cmd_set[256][256] = {
> > [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> > cmd_infostat_bg_op_abort, 0, 0 },
> > @@ -3666,6 +3765,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> > CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> > [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
> > cmd_fm_get_dc_region_extent_list, 12, 0 },
> > + [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
> > + cmd_fm_initiate_dc_add, ~0,
> > + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> > + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> > + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> > + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> > + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> > };
> >
> > /*
> > diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> > index 9c2b9d197b..7676d785c2 100644
> > --- a/hw/mem/cxl_type3.c
> > +++ b/hw/mem/cxl_type3.c
> > @@ -1885,8 +1885,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
> > * the list.
> > * Return value: return true if has overlaps; otherwise, return false
> > */
> > -static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> > - uint64_t dpa, uint64_t len)
> > +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> > + uint64_t dpa, uint64_t len)
> > {
> > CXLDCExtent *ent;
> > Range range1, range2;
> > @@ -1931,8 +1931,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
> > return false;
> > }
> >
> > -static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> > - uint64_t dpa, uint64_t len)
> > +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> > + uint64_t dpa, uint64_t len)
> > {
> > CXLDCExtentGroup *group;
> >
> > diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> > index 91ec1ba299..7be68d98c6 100644
> > --- a/include/hw/cxl/cxl_device.h
> > +++ b/include/hw/cxl/cxl_device.h
> > @@ -736,4 +736,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> > CXLDCEventType type,
> > CXLDCExtentRaw extents[],
> > uint32_t ext_count);
> > +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> > + uint64_t dpa, uint64_t len);
> > +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> > + uint64_t dpa, uint64_t len);
> > #endif
> > --
> > 2.47.2
> >
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
2025-06-26 22:23 [QEMU PATCH v4 00/10] CXL: FMAPI DCD Management Commands 0x5600-0x5605 anisa.su887
` (8 preceding siblings ...)
2025-06-26 22:23 ` [QEMU PATCH v4 09/10] cxl-mailbox-utils: 0x5604 - FMAPI Initiate DC Add anisa.su887
@ 2025-06-26 22:23 ` anisa.su887
2025-06-30 17:06 ` Jonathan Cameron via
2025-07-03 4:21 ` Fan Ni
9 siblings, 2 replies; 19+ messages in thread
From: anisa.su887 @ 2025-06-26 22:23 UTC (permalink / raw)
To: qemu-devel
Cc: Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari, linux-cxl,
Anisa Su
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
Signed-off-by: Anisa Su <anisa.su@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 79 ++++++++++++++++++++++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 787eeaa7b9..87f9535d46 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -123,6 +123,7 @@ enum {
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
#define INITIATE_DC_ADD 0x4
+ #define INITIATE_DC_RELEASE 0x5
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3638,6 +3639,77 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
}
}
+#define CXL_EXTENT_REMOVAL_POLICY_MASK 0x0F
+#define CXL_FORCED_REMOVAL_MASK (1 << 4)
+/* CXL r3.2 Section 7.6.7.6.6 Initiate Dynamic Capacity Release (Opcode 5605h) */
+static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t flags;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ int i, rc;
+
+ switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {
+ case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE: {
+ CXLDCExtentList updated_list;
+ uint32_t updated_list_size;
+ g_autofree CXLUpdateDCExtentListInPl *list =
+ g_malloc0(sizeof(*list) +
+ in->ext_count * sizeof(*list->updated_entries));
+
+ convert_raw_extents(in->extents, list, in->ext_count);
+ rc = cxl_detect_malformed_extent_list(ct3d, list);
+ if (rc) {
+ return rc;
+ }
+
+ /* Fail with Invalid PA if an extent is pending and Forced Removal
+ * flag not set
+ */
+ if (!(in->flags & CXL_FORCED_REMOVAL_MASK)) {
+ for (i = 0; i < in->ext_count; i++) {
+ CXLDCExtentRaw ext = in->extents[i];
+ /* Check requested extents don't overlap with pending extents. */
+ if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
+ ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_PA;
+ }
+ }
+ }
+
+ rc = cxl_dc_extent_release_dry_run(ct3d,
+ list,
+ &updated_list,
+ &updated_list_size);
+ if (rc) {
+ return rc;
+ }
+ cxl_create_dc_event_records_for_extents(ct3d,
+ DC_EVENT_RELEASE_CAPACITY,
+ in->extents,
+ in->ext_count);
+ return CXL_MBOX_SUCCESS;
+ }
+ default: {
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent removal policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+ }
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3772,6 +3844,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
+ [FMAPI_DCD_MGMT][INITIATE_DC_RELEASE] = { "INIT_DC_RELEASE",
+ cmd_fm_initiate_dc_release, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
--
2.47.2
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
2025-06-26 22:23 ` [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release anisa.su887
@ 2025-06-30 17:06 ` Jonathan Cameron via
2025-07-03 4:21 ` Fan Ni
1 sibling, 0 replies; 19+ messages in thread
From: Jonathan Cameron via @ 2025-06-30 17:06 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, nifan.cxl, dave, alok.a.tiwari, linux-cxl, Anisa Su
On Thu, 26 Jun 2025 22:23:33 +0000
anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
A few more long line related tweaks.
> ---
> hw/cxl/cxl-mailbox-utils.c | 79 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 79 insertions(+)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 787eeaa7b9..87f9535d46 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -123,6 +123,7 @@ enum {
> #define SET_DC_REGION_CONFIG 0x2
> #define GET_DC_REGION_EXTENT_LIST 0x3
> #define INITIATE_DC_ADD 0x4
> + #define INITIATE_DC_RELEASE 0x5
> };
>
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> @@ -3638,6 +3639,77 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> }
> }
>
> +#define CXL_EXTENT_REMOVAL_POLICY_MASK 0x0F
> +#define CXL_FORCED_REMOVAL_MASK (1 << 4)
> +/* CXL r3.2 Section 7.6.7.6.6 Initiate Dynamic Capacity Release (Opcode 5605h) */
Added a colon and wrapped after the number.
> +static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t flags;
> + uint8_t reg_num;
> + uint64_t length;
> + uint8_t tag[0x10];
> + uint32_t ext_count;
> + CXLDCExtentRaw extents[];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + int i, rc;
> +
> + switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {
> + case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE: {
> + CXLDCExtentList updated_list;
> + uint32_t updated_list_size;
> + g_autofree CXLUpdateDCExtentListInPl *list =
> + g_malloc0(sizeof(*list) +
> + in->ext_count * sizeof(*list->updated_entries));
> +
> + convert_raw_extents(in->extents, list, in->ext_count);
> + rc = cxl_detect_malformed_extent_list(ct3d, list);
> + if (rc) {
> + return rc;
> + }
> +
> + /* Fail with Invalid PA if an extent is pending and Forced Removal
/*
* Fail...
> + * flag not set
> + */
> + if (!(in->flags & CXL_FORCED_REMOVAL_MASK)) {
> + for (i = 0; i < in->ext_count; i++) {
> + CXLDCExtentRaw ext = in->extents[i];
> + /* Check requested extents don't overlap with pending extents. */
Made this a multiline comment.
> + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
This is quite a bit too far over so I just went with the ugly
if (cxl_extent_groups_overlaps_dpa_range(
&ct3d->dc.extents_pending,
> + ext.start_dpa, ext.len)) {
> + return CXL_MBOX_INVALID_PA;
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
2025-06-26 22:23 ` [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release anisa.su887
2025-06-30 17:06 ` Jonathan Cameron via
@ 2025-07-03 4:21 ` Fan Ni
2025-07-03 9:02 ` Jonathan Cameron via
1 sibling, 1 reply; 19+ messages in thread
From: Fan Ni @ 2025-07-03 4:21 UTC (permalink / raw)
To: anisa.su887
Cc: qemu-devel, Jonathan.Cameron, nifan.cxl, dave, alok.a.tiwari,
linux-cxl, Anisa Su
On Thu, Jun 26, 2025 at 10:23:33PM +0000, anisa.su887@gmail.com wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> ---
Minor comments inline ...
> hw/cxl/cxl-mailbox-utils.c | 79 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 79 insertions(+)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 787eeaa7b9..87f9535d46 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -123,6 +123,7 @@ enum {
> #define SET_DC_REGION_CONFIG 0x2
> #define GET_DC_REGION_EXTENT_LIST 0x3
> #define INITIATE_DC_ADD 0x4
> + #define INITIATE_DC_RELEASE 0x5
> };
>
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> @@ -3638,6 +3639,77 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> }
> }
>
> +#define CXL_EXTENT_REMOVAL_POLICY_MASK 0x0F
> +#define CXL_FORCED_REMOVAL_MASK (1 << 4)
> +/* CXL r3.2 Section 7.6.7.6.6 Initiate Dynamic Capacity Release (Opcode 5605h) */
/* CXL r3.2 Section 7.6.7.6.6: Initiate Dynamic Capacity Release (Opcode 5605h) */
Fan
> +static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t flags;
> + uint8_t reg_num;
> + uint64_t length;
> + uint8_t tag[0x10];
> + uint32_t ext_count;
> + CXLDCExtentRaw extents[];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + int i, rc;
> +
> + switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {
> + case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE: {
> + CXLDCExtentList updated_list;
> + uint32_t updated_list_size;
> + g_autofree CXLUpdateDCExtentListInPl *list =
> + g_malloc0(sizeof(*list) +
> + in->ext_count * sizeof(*list->updated_entries));
> +
> + convert_raw_extents(in->extents, list, in->ext_count);
> + rc = cxl_detect_malformed_extent_list(ct3d, list);
> + if (rc) {
> + return rc;
> + }
> +
> + /* Fail with Invalid PA if an extent is pending and Forced Removal
> + * flag not set
> + */
> + if (!(in->flags & CXL_FORCED_REMOVAL_MASK)) {
> + for (i = 0; i < in->ext_count; i++) {
> + CXLDCExtentRaw ext = in->extents[i];
> + /* Check requested extents don't overlap with pending extents. */
> + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
> + ext.start_dpa, ext.len)) {
> + return CXL_MBOX_INVALID_PA;
> + }
> + }
> + }
> +
> + rc = cxl_dc_extent_release_dry_run(ct3d,
> + list,
> + &updated_list,
> + &updated_list_size);
> + if (rc) {
> + return rc;
> + }
> + cxl_create_dc_event_records_for_extents(ct3d,
> + DC_EVENT_RELEASE_CAPACITY,
> + in->extents,
> + in->ext_count);
> + return CXL_MBOX_SUCCESS;
> + }
> + default: {
> + qemu_log_mask(LOG_UNIMP,
> + "CXL extent removal policy not supported.\n");
> + return CXL_MBOX_INVALID_INPUT;
> + }
> + }
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3772,6 +3844,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> + [FMAPI_DCD_MGMT][INITIATE_DC_RELEASE] = { "INIT_DC_RELEASE",
> + cmd_fm_initiate_dc_release, ~0,
> + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> };
>
> /*
> --
> 2.47.2
>
--
Fan Ni (From gmail)
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [QEMU PATCH v4 10/10] cxl-mailbox-utils: 0x5605 - FMAPI Initiate DC Release
2025-07-03 4:21 ` Fan Ni
@ 2025-07-03 9:02 ` Jonathan Cameron via
0 siblings, 0 replies; 19+ messages in thread
From: Jonathan Cameron via @ 2025-07-03 9:02 UTC (permalink / raw)
To: Fan Ni; +Cc: anisa.su887, qemu-devel, dave, alok.a.tiwari, linux-cxl, Anisa Su
On Thu, 3 Jul 2025 04:21:25 +0000
Fan Ni <nifan.cxl@gmail.com> wrote:
> On Thu, Jun 26, 2025 at 10:23:33PM +0000, anisa.su887@gmail.com wrote:
> > From: Anisa Su <anisa.su@samsung.com>
> >
> > FM DCD Management command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
> >
> > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > ---
> Minor comments inline ...
Hi Fan,
See below. I tweaked what you are commenting on in version I rebased and asked
Michael to consider picking up.
If you are happy with that, please give a tag on
https://lore.kernel.org/qemu-devel/20250702160219.989731-12-Jonathan.Cameron@huawei.com/
>
> > hw/cxl/cxl-mailbox-utils.c | 79 ++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 79 insertions(+)
> >
> > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > index 787eeaa7b9..87f9535d46 100644
> > --- a/hw/cxl/cxl-mailbox-utils.c
> > +++ b/hw/cxl/cxl-mailbox-utils.c
> > @@ -123,6 +123,7 @@ enum {
> > #define SET_DC_REGION_CONFIG 0x2
> > #define GET_DC_REGION_EXTENT_LIST 0x3
> > #define INITIATE_DC_ADD 0x4
> > + #define INITIATE_DC_RELEASE 0x5
> > };
> >
> > /* CCI Message Format CXL r3.1 Figure 7-19 */
> > @@ -3638,6 +3639,77 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> > }
> > }
> >
> > +#define CXL_EXTENT_REMOVAL_POLICY_MASK 0x0F
> > +#define CXL_FORCED_REMOVAL_MASK (1 << 4)
> > +/* CXL r3.2 Section 7.6.7.6.6 Initiate Dynamic Capacity Release (Opcode 5605h) */
>
> /* CXL r3.2 Section 7.6.7.6.6: Initiate Dynamic Capacity Release (Opcode 5605h) */
This one I fixed. Noticed it because the line is also over 80 chars so now
formatted as
/*
* CXL r3.2 Section 7.6.7.6.6:
* Initiate Dynamic Capacity Release (Opcode 5605h) */
*/
>
> Fan
>
> > +static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
> > + uint8_t *payload_in,
> > + size_t len_in,
> > + uint8_t *payload_out,
> > + size_t *len_out,
> > + CXLCCI *cci)
> > +{
> > + struct {
> > + uint16_t host_id;
> > + uint8_t flags;
> > + uint8_t reg_num;
> > + uint64_t length;
> > + uint8_t tag[0x10];
> > + uint32_t ext_count;
> > + CXLDCExtentRaw extents[];
> > + } QEMU_PACKED *in = (void *)payload_in;
> > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > + int i, rc;
> > +
> > + switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {
> > + case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE: {
> > + CXLDCExtentList updated_list;
> > + uint32_t updated_list_size;
> > + g_autofree CXLUpdateDCExtentListInPl *list =
> > + g_malloc0(sizeof(*list) +
> > + in->ext_count * sizeof(*list->updated_entries));
> > +
> > + convert_raw_extents(in->extents, list, in->ext_count);
> > + rc = cxl_detect_malformed_extent_list(ct3d, list);
> > + if (rc) {
> > + return rc;
> > + }
> > +
> > + /* Fail with Invalid PA if an extent is pending and Forced Removal
> > + * flag not set
> > + */
> > + if (!(in->flags & CXL_FORCED_REMOVAL_MASK)) {
> > + for (i = 0; i < in->ext_count; i++) {
> > + CXLDCExtentRaw ext = in->extents[i];
> > + /* Check requested extents don't overlap with pending extents. */
> > + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
> > + ext.start_dpa, ext.len)) {
> > + return CXL_MBOX_INVALID_PA;
> > + }
> > + }
> > + }
> > +
> > + rc = cxl_dc_extent_release_dry_run(ct3d,
> > + list,
> > + &updated_list,
> > + &updated_list_size);
> > + if (rc) {
> > + return rc;
> > + }
> > + cxl_create_dc_event_records_for_extents(ct3d,
> > + DC_EVENT_RELEASE_CAPACITY,
> > + in->extents,
> > + in->ext_count);
> > + return CXL_MBOX_SUCCESS;
> > + }
> > + default: {
> > + qemu_log_mask(LOG_UNIMP,
> > + "CXL extent removal policy not supported.\n");
> > + return CXL_MBOX_INVALID_INPUT;
> > + }
> > + }
> > +}
> > +
> > static const struct cxl_cmd cxl_cmd_set[256][256] = {
> > [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> > cmd_infostat_bg_op_abort, 0, 0 },
> > @@ -3772,6 +3844,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> > CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> > CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> > CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> > + [FMAPI_DCD_MGMT][INITIATE_DC_RELEASE] = { "INIT_DC_RELEASE",
> > + cmd_fm_initiate_dc_release, ~0,
> > + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> > + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> > + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> > + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> > + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> > };
> >
> > /*
> > --
> > 2.47.2
> >
>
^ permalink raw reply [flat|nested] 19+ messages in thread