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From: Zhao Liu <zhao1.liu@intel.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Daniel P . Berrangé" <berrange@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>
Cc: Ewan Hai <ewanhai-oc@zhaoxin.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>, Tao Su <tao1.su@intel.com>,
	Yi Lai <yi1.lai@intel.com>, Dapeng Mi <dapeng1.mi@intel.com>,
	qemu-devel@nongnu.org, Zhao Liu <zhao1.liu@intel.com>
Subject: [PATCH 3/4] i386/cpu: Mark ECX/EDX in CPUID 0x80000008 leaf as reserved for Intel
Date: Fri, 27 Jun 2025 11:51:28 +0800	[thread overview]
Message-ID: <20250627035129.2755537-4-zhao1.liu@intel.com> (raw)
In-Reply-To: <20250627035129.2755537-1-zhao1.liu@intel.com>

Per SDM,

80000008H EAX Linear/Physical Address size.
              Bits 07-00: #Physical Address Bits*.
              Bits 15-08: #Linear Address Bits.
              Bits 31-16: Reserved = 0.
          EBX Bits 08-00: Reserved = 0.
              Bit 09: WBNOINVD is available if 1.
              Bits 31-10: Reserved = 0.
          ECX Reserved = 0.
          EDX Reserved = 0.

ECX/EDX in CPUID 0x80000008 leaf are reserved. Encode these 2 registers
as 0 for Intel.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
 target/i386/cpu.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6d590a9af389..5d5a227d4c8a 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8391,6 +8391,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
              *eax |= (cpu->guest_phys_bits << 16);
         }
         *ebx = env->features[FEAT_8000_0008_EBX];
+
+        if (cpu->vendor_cpuid_only_v2 && IS_INTEL_CPU(env)) {
+            *ecx = *edx = 0;
+            break;
+        }
+
         if (threads_per_pkg > 1) {
             /*
              * Bits 15:12 is "The number of bits in the initial
-- 
2.34.1



  parent reply	other threads:[~2025-06-27  3:30 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-27  3:51 [PATCH 0/4] i386/cpu: Clean Up Reserved CPUID Leaves for Intel Zhao Liu
2025-06-27  3:51 ` [PATCH 1/4] i386/cpu: Mark EBX/ECX/EDX in CPUID 0x80000000 leaf as reserved " Zhao Liu
2025-06-27  5:52   ` Ewan Hai
2025-06-27  8:20   ` Xiaoyao Li
2025-06-27  3:51 ` [PATCH 2/4] i386/cpu: Mark CPUID 0x80000007[EBX] " Zhao Liu
2025-06-27  5:52   ` Ewan Hai
2025-06-27  3:51 ` Zhao Liu [this message]
2025-06-27  5:52   ` [PATCH 3/4] i386/cpu: Mark ECX/EDX in CPUID 0x80000008 leaf " Ewan Hai
2025-06-27  8:24   ` Xiaoyao Li
2025-06-30  5:20     ` Zhao Liu
2025-07-01  1:00       ` Xiaoyao Li
2025-06-27  3:51 ` [PATCH 4/4] i386/cpu: Reorder CPUID leaves in cpu_x86_cpuid() Zhao Liu
2025-06-27  8:17 ` [PATCH 0/4] i386/cpu: Clean Up Reserved CPUID Leaves for Intel Xiaoyao Li
2025-07-07  0:55 ` Tao Su

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