From: Max Chou <max.chou@sifive.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
antonb@tenstorrent.com, Max Chou <max.chou@sifive.com>
Subject: [PATCH v2 0/3] Fix some more RVV source overlap issues
Date: Fri, 27 Jun 2025 21:20:19 +0800 [thread overview]
Message-ID: <20250627132022.439315-1-max.chou@sifive.com> (raw)
This patchset is based on the v1 provided by Anoton Blanchard with
following update:
* Add the missing input EEWs checking rule for widen vector reduction
instruction.
Reference:
* v1: 20250415043207.3512209-1-antonb@tenstorrent.com
Anton Blanchard (3):
target/riscv: rvv: Apply vext_check_input_eew to vector integer/fp
compare instructions
target/riscv: rvv: Apply vext_check_input_eew to vector reduction
instructions
target/riscv: vadc and vsbc are vm=0 instructions
target/riscv/insn32.decode | 10 +++++-----
target/riscv/insn_trans/trans_rvv.c.inc | 26 ++++++++++++++-----------
2 files changed, 20 insertions(+), 16 deletions(-)
--
2.43.0
next reply other threads:[~2025-06-27 13:21 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-27 13:20 Max Chou [this message]
2025-06-27 13:20 ` [PATCH v2 1/3] target/riscv: rvv: Apply vext_check_input_eew to vector integer/fp compare instructions Max Chou
2025-07-01 6:43 ` Nutty Liu
2025-06-27 13:20 ` [PATCH v2 2/3] target/riscv: rvv: Apply vext_check_input_eew to vector reduction instructions Max Chou
2025-07-01 6:43 ` Nutty Liu
2025-07-07 10:30 ` Max Chou
2025-06-27 13:20 ` [PATCH v2 3/3] target/riscv: vadc and vsbc are vm=0 instructions Max Chou
2025-07-01 6:44 ` Nutty Liu
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