From: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
To: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>,
"peterx@redhat.com" <peterx@redhat.com>,
"david@redhat.com" <david@redhat.com>,
"mst@redhat.com" <mst@redhat.com>,
"jasowang@redhat.com" <jasowang@redhat.com>,
"zhenzhong.duan@intel.com" <zhenzhong.duan@intel.com>,
"kevin.tian@intel.com" <kevin.tian@intel.com>,
"yi.l.liu@intel.com" <yi.l.liu@intel.com>,
"joao.m.martins@oracle.com" <joao.m.martins@oracle.com>,
"tjeznach@rivosinc.com" <tjeznach@rivosinc.com>,
"minwoo.im@samsung.com" <minwoo.im@samsung.com>,
Ethan MILON <ethan.milon@eviden.com>,
CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
Subject: [PATCH 03/10] memory: Allow to store the PASID in IOMMUTLBEntry
Date: Sat, 28 Jun 2025 18:04:00 +0000 [thread overview]
Message-ID: <20250628180226.133285-4-clement.mathieu--drif@eviden.com> (raw)
In-Reply-To: <20250628180226.133285-1-clement.mathieu--drif@eviden.com>
This will be useful for devices that support ATS
and need to store entries in an ATC (device IOTLB).
Signed-off-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com>
---
include/system/memory.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/system/memory.h b/include/system/memory.h
index 1672622d70..d6d069fd50 100644
--- a/include/system/memory.h
+++ b/include/system/memory.h
@@ -144,6 +144,7 @@ struct IOMMUTLBEntry {
hwaddr translated_addr;
hwaddr addr_mask; /* 0xfff = 4k translation */
IOMMUAccessFlags perm;
+ uint32_t pasid;
};
/*
--
2.49.0
next prev parent reply other threads:[~2025-06-28 18:05 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-28 18:03 [PATCH v5 00/10] intel_iommu: Add ATS support CLEMENT MATHIEU--DRIF
2025-06-28 18:03 ` [PATCH 01/10] pci: Add a memory attribute for pre-translated DMA operations CLEMENT MATHIEU--DRIF
2025-06-28 18:03 ` [PATCH 02/10] memory: Add permissions in IOMMUAccessFlags CLEMENT MATHIEU--DRIF
2025-06-28 18:04 ` CLEMENT MATHIEU--DRIF [this message]
2025-06-28 18:04 ` [PATCH 04/10] intel_iommu: Fill the PASID field when creating an IOMMUTLBEntry CLEMENT MATHIEU--DRIF
2025-06-28 18:04 ` [PATCH 05/10] intel_iommu: Declare supported PASID size CLEMENT MATHIEU--DRIF
2025-06-28 18:04 ` [PATCH 06/10] intel_iommu: Implement vtd_get_iotlb_info from PCIIOMMUOps CLEMENT MATHIEU--DRIF
2025-06-28 18:04 ` [PATCH 07/10] intel_iommu: Implement the PCIIOMMUOps callbacks related to invalidations of device-IOTLB CLEMENT MATHIEU--DRIF
2025-06-28 18:04 ` [PATCH 08/10] intel_iommu: Return page walk level even when the translation fails CLEMENT MATHIEU--DRIF
2025-06-28 18:04 ` [PATCH 09/10] intel_iommu: Set address mask when a translation fails and adjust W permission CLEMENT MATHIEU--DRIF
2025-06-28 18:04 ` [PATCH 10/10] intel_iommu: Add support for ATS CLEMENT MATHIEU--DRIF
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