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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-454a99b6f94sm5577135e9.32.2025.07.02.12.00.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 02 Jul 2025 12:00:39 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , Richard Henderson , Pierrick Bouvier , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v4 63/65] accel/tcg: Factor rr_cpu_exec() out Date: Wed, 2 Jul 2025 20:53:25 +0200 Message-ID: <20250702185332.43650-64-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250702185332.43650-1-philmd@linaro.org> References: <20250702185332.43650-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Altough we aren't going to re-use rr_cpu_exec(), factor it out to have RR implementation matches with MTTCG one. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/tcg-accel-ops-rr.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/accel/tcg/tcg-accel-ops-rr.c b/accel/tcg/tcg-accel-ops-rr.c index 9578bc639cb..d976daa7319 100644 --- a/accel/tcg/tcg-accel-ops-rr.c +++ b/accel/tcg/tcg-accel-ops-rr.c @@ -169,6 +169,25 @@ static int rr_cpu_count(void) return cpu_count; } +static int rr_cpu_exec(CPUState *cpu, int64_t cpu_budget) +{ + int ret; + + bql_unlock(); + if (icount_enabled()) { + icount_prepare_for_run(cpu, cpu_budget); + } + + ret = tcg_cpu_exec(cpu); + + if (icount_enabled()) { + icount_process_data(cpu); + } + bql_lock(); + + return ret; +} + /* * In the single-threaded case each vCPU is simulated in turn. If * there is more than a single vCPU we create a simple timer to kick @@ -254,17 +273,7 @@ static void *rr_cpu_thread_fn(void *arg) (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0); if (cpu_can_run(cpu)) { - int r; - - bql_unlock(); - if (icount_enabled()) { - icount_prepare_for_run(cpu, cpu_budget); - } - r = tcg_cpu_exec(cpu); - if (icount_enabled()) { - icount_process_data(cpu); - } - bql_lock(); + int r = rr_cpu_exec(cpu, cpu_budget); if (r == EXCP_DEBUG) { cpu_handle_guest_debug(cpu); -- 2.49.0