From: "Cédric Le Goater" <clg@redhat.com>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: "Ed Tanous" <etanous@nvidia.com>, "Cédric Le Goater" <clg@redhat.com>
Subject: [PULL 11/11] tests/functional: Add gb200 tests
Date: Fri, 4 Jul 2025 10:37:23 +0200 [thread overview]
Message-ID: <20250704083723.1410455-12-clg@redhat.com> (raw)
In-Reply-To: <20250704083723.1410455-1-clg@redhat.com>
From: Ed Tanous <etanous@nvidia.com>
To support the newly added gb200 machine, add appropriate tests and
extend do_test_arm_aspeed_openbmc() to support the hostname of this
new system: "gb200nvl-obmc".
Signed-off-by: Ed Tanous <etanous@nvidia.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250703144249.3348879-5-etanous@nvidia.com
[ clg: Adjust commit log to document do_test_arm_aspeed_openbmc() change ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
tests/functional/aspeed.py | 9 +++++--
tests/functional/meson.build | 2 ++
.../test_arm_aspeed_gb200nvl_bmc.py | 26 +++++++++++++++++++
3 files changed, 35 insertions(+), 2 deletions(-)
create mode 100644 tests/functional/test_arm_aspeed_gb200nvl_bmc.py
diff --git a/tests/functional/aspeed.py b/tests/functional/aspeed.py
index 7a40d5dda736..b131703c5283 100644
--- a/tests/functional/aspeed.py
+++ b/tests/functional/aspeed.py
@@ -8,8 +8,13 @@
class AspeedTest(LinuxKernelTest):
def do_test_arm_aspeed_openbmc(self, machine, image, uboot='2019.04',
- cpu_id='0x0', soc='AST2500 rev A1'):
- hostname = machine.removesuffix('-bmc')
+ cpu_id='0x0', soc='AST2500 rev A1',
+ image_hostname=None):
+ # Allow for the image hostname to not end in "-bmc"
+ if image_hostname is not None:
+ hostname = image_hostname
+ else:
+ hostname = machine.removesuffix('-bmc')
self.set_machine(machine)
self.vm.set_console()
diff --git a/tests/functional/meson.build b/tests/functional/meson.build
index fb87b957aa6c..050c9000b95c 100644
--- a/tests/functional/meson.build
+++ b/tests/functional/meson.build
@@ -33,6 +33,7 @@ test_timeouts = {
'arm_aspeed_ast2600' : 1200,
'arm_aspeed_bletchley' : 480,
'arm_aspeed_catalina' : 480,
+ 'arm_aspeed_gb200nvl_bmc' : 480,
'arm_aspeed_rainier' : 480,
'arm_bpim2u' : 500,
'arm_collie' : 180,
@@ -129,6 +130,7 @@ tests_arm_system_thorough = [
'arm_aspeed_ast2600',
'arm_aspeed_bletchley',
'arm_aspeed_catalina',
+ 'arm_aspeed_gb200nvl_bmc',
'arm_aspeed_rainier',
'arm_bpim2u',
'arm_canona1100',
diff --git a/tests/functional/test_arm_aspeed_gb200nvl_bmc.py b/tests/functional/test_arm_aspeed_gb200nvl_bmc.py
new file mode 100644
index 000000000000..8e8e3f05c1b2
--- /dev/null
+++ b/tests/functional/test_arm_aspeed_gb200nvl_bmc.py
@@ -0,0 +1,26 @@
+#!/usr/bin/env python3
+#
+# Functional test that boots the ASPEED machines
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from qemu_test import Asset
+from aspeed import AspeedTest
+
+
+class GB200Machine(AspeedTest):
+
+ ASSET_GB200_FLASH = Asset(
+ 'https://github.com/legoater/qemu-aspeed-boot/raw/refs/heads/master/images/gb200nvl-obmc/obmc-phosphor-image-gb200nvl-obmc-20250702182348.static.mtd.xz',
+ 'b84819317cb3dc762895ad507705978ef000bfc77c50c33a63bdd37921db0dbc')
+
+ def test_arm_aspeed_gb200_openbmc(self):
+ image_path = self.uncompress(self.ASSET_GB200_FLASH)
+
+ self.do_test_arm_aspeed_openbmc('gb200nvl-bmc', image=image_path,
+ uboot='2019.04', cpu_id='0xf00',
+ soc='AST2600 rev A3',
+ image_hostname='gb200nvl-obmc')
+
+if __name__ == '__main__':
+ AspeedTest.main()
--
2.50.0
next prev parent reply other threads:[~2025-07-04 8:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-04 8:37 [PULL 00/11] aspeed queue Cédric Le Goater
2025-07-04 8:37 ` [PULL 01/11] hw/misc/aspeed_sdmc: Skipping dram_init in u-boot for AST2700 Cédric Le Goater
2025-07-04 8:37 ` [PULL 02/11] hw/misc/aspeed_scu: Support the Frequency Counter Control register " Cédric Le Goater
2025-07-04 8:37 ` [PULL 03/11] hw/arm/aspeed: bletchley: update hw strap values Cédric Le Goater
2025-07-04 8:37 ` [PULL 04/11] hw/arm/aspeed: add Catalina machine type Cédric Le Goater
2025-07-04 8:37 ` [PULL 05/11] hw/misc/aspeed_scu: Handle AST2600 protection key registers correctly Cédric Le Goater
2025-07-04 8:37 ` [PULL 06/11] tests/qtest: Add test for ASPEED SCU Cédric Le Goater
2025-07-04 8:37 ` [PULL 07/11] aspeed: Deprecate the ast2700a0-evb machine Cédric Le Goater
2025-07-04 8:37 ` [PULL 08/11] hw/arm/aspeed: Add second SPI chip to Aspeed model Cédric Le Goater
2025-07-04 8:37 ` [PULL 09/11] docs: add support for gb200-bmc Cédric Le Goater
2025-07-11 12:01 ` Peter Maydell
2025-07-15 6:13 ` Cédric Le Goater
2025-07-15 8:49 ` Peter Maydell
2025-07-04 8:37 ` [PULL 10/11] hw/arm/aspeed: Add GB200 BMC target Cédric Le Goater
2025-07-04 8:37 ` Cédric Le Goater [this message]
2025-07-04 17:49 ` [PULL 00/11] aspeed queue Stefan Hajnoczi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250704083723.1410455-12-clg@redhat.com \
--to=clg@redhat.com \
--cc=etanous@nvidia.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).