[PATCH 11/20] target/arm: Convert get_phys_addr_nogpc to access_perm

[Richard Henderson <richard.henderson@linaro.org>]

Because of the recursion with get_phys_addr_twostage,
we must convert the two functions at the same time.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/ptw.c | 39 ++++++++++++++++++++-------------------
 1 file changed, 20 insertions(+), 19 deletions(-)

diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 5b8040a174..fef9e9a7cb 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -74,7 +74,7 @@ typedef struct S1Translate {
 
 static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
                                 vaddr address,
-                                MMUAccessType access_type, MemOp memop,
+                                unsigned access_perm, MemOp memop,
                                 GetPhysAddrResult *result,
                                 ARMMMUFaultInfo *fi);
 
@@ -3276,7 +3276,7 @@ static bool get_phys_addr_disabled(CPUARMState *env,
 
 static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
                                    vaddr address,
-                                   MMUAccessType access_type, MemOp memop,
+                                   unsigned access_perm, MemOp memop,
                                    GetPhysAddrResult *result,
                                    ARMMMUFaultInfo *fi)
 {
@@ -3288,7 +3288,7 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
     ARMSecuritySpace ipa_space;
     uint64_t hcr;
 
-    ret = get_phys_addr_nogpc(env, ptw, address, access_type,
+    ret = get_phys_addr_nogpc(env, ptw, address, access_perm,
                               memop, result, fi);
 
     /* If S1 fails, return early.  */
@@ -3315,7 +3315,7 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
     cacheattrs1 = result->cacheattrs;
     memset(result, 0, sizeof(*result));
 
-    ret = get_phys_addr_nogpc(env, ptw, ipa, access_type,
+    ret = get_phys_addr_nogpc(env, ptw, ipa, access_perm,
                               memop, result, fi);
     fi->s2addr = ipa;
 
@@ -3383,7 +3383,7 @@ static bool get_phys_addr_twostage(CPUARMState *env, S1Translate *ptw,
 
 static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
                                       vaddr address,
-                                      MMUAccessType access_type, MemOp memop,
+                                      unsigned access_perm, MemOp memop,
                                       GetPhysAddrResult *result,
                                       ARMMMUFaultInfo *fi)
 {
@@ -3404,7 +3404,7 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
     case ARMMMUIdx_Phys_Root:
     case ARMMMUIdx_Phys_Realm:
         /* Checking Phys early avoids special casing later vs regime_el. */
-        return get_phys_addr_disabled(env, ptw, address, 1 << access_type,
+        return get_phys_addr_disabled(env, ptw, address, access_perm,
                                       result, fi);
 
     case ARMMMUIdx_Stage1_E0:
@@ -3445,7 +3445,7 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
         ptw->in_mmu_idx = mmu_idx = s1_mmu_idx;
         if (arm_feature(env, ARM_FEATURE_EL2) &&
             !regime_translation_disabled(env, ARMMMUIdx_Stage2, ptw->in_space)) {
-            return get_phys_addr_twostage(env, ptw, address, access_type,
+            return get_phys_addr_twostage(env, ptw, address, access_perm,
                                           memop, result, fi);
         }
         /* fall through */
@@ -3477,21 +3477,22 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
 
         if (arm_feature(env, ARM_FEATURE_V8)) {
             /* PMSAv8 */
-            ret = get_phys_addr_pmsav8(env, ptw, address, 1 << access_type,
+            ret = get_phys_addr_pmsav8(env, ptw, address, access_perm,
                                        result, fi);
         } else if (arm_feature(env, ARM_FEATURE_V7)) {
             /* PMSAv7 */
-            ret = get_phys_addr_pmsav7(env, ptw, address, 1 << access_type,
+            ret = get_phys_addr_pmsav7(env, ptw, address, access_perm,
                                        result, fi);
         } else {
             /* Pre-v7 MPU */
-            ret = get_phys_addr_pmsav5(env, ptw, address, 1 << access_type,
+            ret = get_phys_addr_pmsav5(env, ptw, address, access_perm,
                                        result, fi);
         }
-        qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32
+        qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %c%c%c at 0x%08" PRIx32
                       " mmu_idx %u -> %s (prot %c%c%c)\n",
-                      access_type == MMU_DATA_LOAD ? "reading" :
-                      (access_type == MMU_DATA_STORE ? "writing" : "execute"),
+                      access_perm & PAGE_READ ? 'r' : '-',
+                      access_perm & PAGE_WRITE ? 'w' : '-',
+                      access_perm & PAGE_EXEC ? 'x' : '-',
                       (uint32_t)address, mmu_idx,
                       ret ? "Miss" : "Hit",
                       result->f.prot & PAGE_READ ? 'r' : '-',
@@ -3504,18 +3505,18 @@ static bool get_phys_addr_nogpc(CPUARMState *env, S1Translate *ptw,
     /* Definitely a real MMU, not an MPU */
 
     if (regime_translation_disabled(env, mmu_idx, ptw->in_space)) {
-        return get_phys_addr_disabled(env, ptw, address, 1 << access_type,
+        return get_phys_addr_disabled(env, ptw, address, access_perm,
                                       result, fi);
     }
 
     if (regime_using_lpae_format(env, mmu_idx)) {
-        return get_phys_addr_lpae(env, ptw, address, 1 << access_type,
+        return get_phys_addr_lpae(env, ptw, address, access_perm,
                                   memop, result, fi);
     } else if (arm_feature(env, ARM_FEATURE_V7) ||
                regime_sctlr(env, mmu_idx) & SCTLR_XP) {
-        return get_phys_addr_v6(env, ptw, address, 1 << access_type, result, fi);
+        return get_phys_addr_v6(env, ptw, address, access_perm, result, fi);
     } else {
-        return get_phys_addr_v5(env, ptw, address, 1 << access_type, result, fi);
+        return get_phys_addr_v5(env, ptw, address, access_perm, result, fi);
     }
 }
 
@@ -3525,7 +3526,7 @@ static bool get_phys_addr_gpc(CPUARMState *env, S1Translate *ptw,
                               GetPhysAddrResult *result,
                               ARMMMUFaultInfo *fi)
 {
-    if (get_phys_addr_nogpc(env, ptw, address, access_type,
+    if (get_phys_addr_nogpc(env, ptw, address, 1 << access_type,
                             memop, result, fi)) {
         return true;
     }
@@ -3547,7 +3548,7 @@ bool get_phys_addr_with_space_nogpc(CPUARMState *env, vaddr address,
         .in_mmu_idx = mmu_idx,
         .in_space = space,
     };
-    return get_phys_addr_nogpc(env, &ptw, address, access_type,
+    return get_phys_addr_nogpc(env, &ptw, address, 1 << access_type,
                                memop, result, fi);
 }
 
-- 
2.43.0