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From: Zhao Liu <zhao1.liu@intel.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Daniel P . Berrangé" <berrange@redhat.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Eduardo Habkost" <eduardo@habkost.net>
Cc: Ewan Hai <ewanhai-oc@zhaoxin.com>,
	Jason Zeng <jason.zeng@intel.com>,
	Xiaoyao Li <xiaoyao.li@intel.com>, Tao Su <tao1.su@intel.com>,
	Yi Lai <yi1.lai@intel.com>, Dapeng Mi <dapeng1.mi@intel.com>,
	Tejus GK <tejus.gk@nutanix.com>,
	Manish Mishra <manish.mishra@nutanix.com>,
	qemu-devel@nongnu.org, Zhao Liu <zhao1.liu@intel.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: [PATCH v2 5/9] i386/cpu: Add a "x-force-cpuid-0x1f" property
Date: Fri, 11 Jul 2025 18:45:59 +0800	[thread overview]
Message-ID: <20250711104603.1634832-6-zhao1.liu@intel.com> (raw)
In-Reply-To: <20250711104603.1634832-1-zhao1.liu@intel.com>

From: Manish Mishra <manish.mishra@nutanix.com>

Add a "x-force-cpuid-0x1f" property so that CPU models can enable it and
have 0x1f CPUID leaf natually as the Host CPU.

The advantage is that when the CPU model's cache model is already
consistent with the Host CPU, for example, SRF defaults to l2 per
module & l3 per package, 0x1f can better help users identify the
topology in the VM.

Adding 0x1f for specific CPU models should not cause any trouble in
principle. This property is only enabled for CPU models that already
have 0x1f leaf on the Host, so software that originally runs normally on
the Host won't encounter issues in the Guest with corresponding CPU
model. Conversely, some software that relies on checking 0x1f might
have problems in the Guest due to the lack of 0x1f [*]. In
summary, adding 0x1f is also intended to further emulate the Host CPU
environment.

[*]: https://lore.kernel.org/qemu-devel/PH0PR02MB738410511BF51B12DB09BE6CF6AC2@PH0PR02MB7384.namprd02.prod.outlook.com/

Signed-off-by: Manish Mishra <manish.mishra@nutanix.com>
Co-authored-by: Xiaoyao Li <xiaoyao.li@intel.com>
Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
[Integrated and rebased 2 previous patches (ordered by post time)]
Reviewed-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
Note:
  This patch integrates the idea from 2 previous posted patches (ordered
by post time)[1] [2], following the s-o-b policy of "Re-starting
abandoned work" in docs/devel/code-provenance.rst.

[1]: From Manish: https://lore.kernel.org/qemu-devel/20240722101859.47408-1-manish.mishra@nutanix.com/
[2]: From Xiaoyao: https://lore.kernel.org/qemu-devel/20240813033145.279307-1-xiaoyao.li@intel.com/
---
Changes since RFC:
 * Rebase and rename the property as "x-force-cpuid-0x1f". (Igor)
---
 target/i386/cpu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5676e5526f40..d27eeb1cb718 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -9940,6 +9940,7 @@ static const Property x86_cpu_properties[] = {
     DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
                      true),
     DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true),
+    DEFINE_PROP_BOOL("x-force-cpuid-0x1f", X86CPU, force_cpuid_0x1f, false),
 };
 
 #ifndef CONFIG_USER_ONLY
-- 
2.34.1



  parent reply	other threads:[~2025-07-11 10:27 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-11 10:45 [PATCH v2 0/9] i386/cpu: Intel cache model & topo CPUID enhencement Zhao Liu
2025-07-11 10:45 ` [PATCH v2 1/9] i386/cpu: Introduce cache model for SierraForest Zhao Liu
2025-07-11 10:45 ` [PATCH v2 2/9] i386/cpu: Introduce cache model for GraniteRapids Zhao Liu
2025-07-11 10:45 ` [PATCH v2 3/9] i386/cpu: Introduce cache model for SapphireRapids Zhao Liu
2025-07-11 10:45 ` [PATCH v2 4/9] i386/cpu: Introduce cache model for YongFeng Zhao Liu
2025-07-11 10:45 ` Zhao Liu [this message]
2025-07-11 10:46 ` [PATCH v2 6/9] i386/cpu: Enable 0x1f leaf for SierraForest by default Zhao Liu
2025-07-11 10:46 ` [PATCH v2 7/9] i386/cpu: Enable 0x1f leaf for GraniteRapids " Zhao Liu
2025-07-11 10:46 ` [PATCH v2 8/9] i386/cpu: Enable 0x1f leaf for SapphireRapids " Zhao Liu
2025-07-11 10:46 ` [PATCH v2 9/9] i386/cpu: Enable 0x1f leaf for YongFeng " Zhao Liu
2025-07-11 16:51 ` [PATCH v2 0/9] i386/cpu: Intel cache model & topo CPUID enhencement Paolo Bonzini

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