From: Zhao Liu <zhao1.liu@intel.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Igor Mammedov" <imammedo@redhat.com>
Cc: Ewan Hai <ewanhai-oc@zhaoxin.com>,
Xiaoyao Li <xiaoyao.li@intel.com>, Tao Su <tao1.su@intel.com>,
Yi Lai <yi1.lai@intel.com>, Dapeng Mi <dapeng1.mi@intel.com>,
qemu-devel@nongnu.org, Zhao Liu <zhao1.liu@intel.com>,
Tao Su <tao1.su@linux.intel.com>
Subject: [PATCH v2 1/7] i386/cpu: Mark EBX/ECX/EDX in CPUID 0x80000000 leaf as reserved for Intel
Date: Mon, 14 Jul 2025 16:08:53 +0800 [thread overview]
Message-ID: <20250714080859.1960104-2-zhao1.liu@intel.com> (raw)
In-Reply-To: <20250714080859.1960104-1-zhao1.liu@intel.com>
Per SDM,
80000000H EAX Maximum Input Value for Extended Function CPUID Information.
EBX Reserved.
ECX Reserved.
EDX Reserved.
EBX/ECX/EDX in CPUID 0x80000000 leaf are reserved. Intel and Zhaoxin are
already using 0x0 leaf to encode vendor.
Reviewed-by: Tao Su <tao1.su@linux.intel.com>
Tested-by: Yi Lai <yi1.lai@intel.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
---
Changes Since v1:
* Consider Zhaoxin CPU. (Ewan)
---
target/i386/cpu.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 8d67cadec2f2..37e4bf51d890 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -8278,9 +8278,15 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
break;
case 0x80000000:
*eax = env->cpuid_xlevel;
- *ebx = env->cpuid_vendor1;
- *edx = env->cpuid_vendor2;
- *ecx = env->cpuid_vendor3;
+
+ if (cpu->vendor_cpuid_only_v2 &&
+ (IS_INTEL_CPU(env) || IS_ZHAOXIN_CPU(env))) {
+ *ebx = *ecx = *edx = 0;
+ } else {
+ *ebx = env->cpuid_vendor1;
+ *edx = env->cpuid_vendor2;
+ *ecx = env->cpuid_vendor3;
+ }
break;
case 0x80000001:
*eax = env->cpuid_version;
--
2.34.1
next prev parent reply other threads:[~2025-07-14 8:09 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-14 8:08 [PATCH v2 0/7] i386/cpu: Clean Up Reserved CPUID Leaves & Topology Overflow Fix Zhao Liu
2025-07-14 8:08 ` Zhao Liu [this message]
2025-07-14 8:15 ` [PATCH v2 1/7] i386/cpu: Mark EBX/ECX/EDX in CPUID 0x80000000 leaf as reserved for Intel Xiaoyao Li
2025-07-14 8:08 ` [PATCH v2 2/7] i386/cpu: Mark CPUID 0x80000008 ECX bits[0:7] & [12:15] as reserved for Intel/Zhaoxin Zhao Liu
2025-07-14 8:27 ` Xiaoyao Li
2025-07-14 9:23 ` Zhao Liu
2025-07-14 8:08 ` [PATCH v2 3/7] i386/cpu: Reorder CPUID leaves in cpu_x86_cpuid() Zhao Liu
2025-07-14 8:08 ` [PATCH v2 4/7] i386/cpu: Fix number of addressable IDs field for CPUID.01H.EBX[23:16] Zhao Liu
2025-07-14 8:29 ` Xiaoyao Li
2025-07-16 15:31 ` Michael Tokarev
2025-07-17 3:06 ` Zhao Liu
2025-07-17 3:25 ` Michael Tokarev
2025-07-17 4:09 ` Zhao Liu
2025-07-14 8:08 ` [PATCH v2 5/7] i386/cpu: Fix cpu number overflow in CPUID.01H.EBX[23:16] Zhao Liu
2025-07-14 8:08 ` [PATCH v2 6/7] i386/cpu: Fix overflow of cache topology fields in CPUID.04H Zhao Liu
2025-07-14 8:08 ` [PATCH v2 7/7] i386/cpu: Honor maximum value for CPUID.8000001DH.EAX[25:14] Zhao Liu
2025-07-14 14:51 ` Moger, Babu
2025-07-14 15:41 ` Zhao Liu
2025-07-14 15:25 ` Moger, Babu
2025-07-14 8:25 ` [PATCH v2 0/7] i386/cpu: Clean Up Reserved CPUID Leaves & Topology Overflow Fix Paolo Bonzini
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