* [PATCH qemu 01/11] hw/cxl: fix DC extent capacity tracking
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 02/11] hw/cxl: mailbox-utils: 0x5600 - FMAPI Get DCD Info Jonathan Cameron via
` (9 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Fan Ni <fan.ni@samsung.com>
Per cxl r3.2 Section 9.13.3.3, extent capacity tracking should include
extents in different states including added, pending, etc.
Before the change, for the in-device extent number tracking purpose, we only
have "total_extent_count" defined, which only tracks the number of
extents accepted. However, we need to track number of extents in other
states also, for now it is extents pending-to-add.
To fix that, we introduce a new counter for dynamic capacity
"nr_extents_accepted" which explicitly tracks number of the extents
accepted by the hosts, and fix "total_extent_count" to include
both accepted and pending extents counting.
Signed-off-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl_device.h | 3 ++-
hw/cxl/cxl-mailbox-utils.c | 26 ++++++++++++++++++--------
hw/mem/cxl_type3.c | 1 +
3 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index ed6cd50c67..a151e19da8 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -618,6 +618,7 @@ struct CXLType3Dev {
CXLDCExtentList extents;
CXLDCExtentGroupList extents_pending;
uint32_t total_extent_count;
+ uint32_t nr_extents_accepted;
uint32_t ext_list_gen_seq;
uint8_t num_regions; /* 0-8 regions */
@@ -696,7 +697,7 @@ CXLDCExtentGroup *cxl_insert_extent_to_extent_group(CXLDCExtentGroup *group,
uint16_t shared_seq);
void cxl_extent_group_list_insert_tail(CXLDCExtentGroupList *list,
CXLDCExtentGroup *group);
-void cxl_extent_group_list_delete_front(CXLDCExtentGroupList *list);
+uint32_t cxl_extent_group_list_delete_front(CXLDCExtentGroupList *list);
void ct3_set_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
uint64_t len);
void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 299f232f26..0b615ea37a 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -2750,7 +2750,7 @@ static CXLRetCode cmd_dcd_get_dyn_cap_ext_list(const struct cxl_cmd *cmd,
uint16_t out_pl_len, size;
CXLDCExtent *ent;
- if (start_extent_id > ct3d->dc.total_extent_count) {
+ if (start_extent_id > ct3d->dc.nr_extents_accepted) {
return CXL_MBOX_INVALID_INPUT;
}
@@ -2761,7 +2761,7 @@ static CXLRetCode cmd_dcd_get_dyn_cap_ext_list(const struct cxl_cmd *cmd,
out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
stl_le_p(&out->count, record_count);
- stl_le_p(&out->total_extents, ct3d->dc.total_extent_count);
+ stl_le_p(&out->total_extents, ct3d->dc.nr_extents_accepted);
stl_le_p(&out->generation_num, ct3d->dc.ext_list_gen_seq);
if (record_count > 0) {
@@ -2883,16 +2883,20 @@ void cxl_extent_group_list_insert_tail(CXLDCExtentGroupList *list,
QTAILQ_INSERT_TAIL(list, group, node);
}
-void cxl_extent_group_list_delete_front(CXLDCExtentGroupList *list)
+uint32_t cxl_extent_group_list_delete_front(CXLDCExtentGroupList *list)
{
CXLDCExtent *ent, *ent_next;
CXLDCExtentGroup *group = QTAILQ_FIRST(list);
+ uint32_t extents_deleted = 0;
QTAILQ_REMOVE(list, group, node);
QTAILQ_FOREACH_SAFE(ent, &group->list, node, ent_next) {
cxl_remove_extent_from_extent_list(&group->list, ent);
+ extents_deleted++;
}
g_free(group);
+
+ return extents_deleted;
}
/*
@@ -3011,7 +3015,7 @@ static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd,
CXLUpdateDCExtentListInPl *in = (void *)payload_in;
CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
CXLDCExtentList *extent_list = &ct3d->dc.extents;
- uint32_t i;
+ uint32_t i, num;
uint64_t dpa, len;
CXLRetCode ret;
@@ -3020,7 +3024,8 @@ static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd,
}
if (in->num_entries_updated == 0) {
- cxl_extent_group_list_delete_front(&ct3d->dc.extents_pending);
+ num = cxl_extent_group_list_delete_front(&ct3d->dc.extents_pending);
+ ct3d->dc.total_extent_count -= num;
return CXL_MBOX_SUCCESS;
}
@@ -3051,10 +3056,12 @@ static CXLRetCode cmd_dcd_add_dyn_cap_rsp(const struct cxl_cmd *cmd,
cxl_insert_extent_to_extent_list(extent_list, dpa, len, NULL, 0);
ct3d->dc.total_extent_count += 1;
+ ct3d->dc.nr_extents_accepted += 1;
ct3_set_region_block_backed(ct3d, dpa, len);
}
/* Remove the first extent group in the pending list */
- cxl_extent_group_list_delete_front(&ct3d->dc.extents_pending);
+ num = cxl_extent_group_list_delete_front(&ct3d->dc.extents_pending);
+ ct3d->dc.total_extent_count -= num;
return CXL_MBOX_SUCCESS;
}
@@ -3160,7 +3167,7 @@ free_and_exit:
}
*updated_list_size = 0;
} else {
- *updated_list_size = ct3d->dc.total_extent_count + cnt_delta;
+ *updated_list_size = ct3d->dc.nr_extents_accepted + cnt_delta;
}
return ret;
@@ -3222,7 +3229,10 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd,
ct3_set_region_block_backed(ct3d, ent->start_dpa, ent->len);
cxl_remove_extent_from_extent_list(&updated_list, ent);
}
- ct3d->dc.total_extent_count = updated_list_size;
+ ct3d->dc.total_extent_count += (updated_list_size -
+ ct3d->dc.nr_extents_accepted);
+
+ ct3d->dc.nr_extents_accepted = updated_list_size;
return CXL_MBOX_SUCCESS;
}
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 94e7274912..f283178d88 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -2076,6 +2076,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
}
if (group) {
cxl_extent_group_list_insert_tail(&dcd->dc.extents_pending, group);
+ dcd->dc.total_extent_count += num_extents;
}
/*
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH qemu 02/11] hw/cxl: mailbox-utils: 0x5600 - FMAPI Get DCD Info
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 01/11] hw/cxl: fix DC extent capacity tracking Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 03/11] hw/mem: cxl_type3: Add dsmas_flags to CXLDCRegion struct Jonathan Cameron via
` (8 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5600 implemented per CXL 3.2 Spec Section 7.6.7.6.1.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl_device.h | 1 +
hw/cxl/cxl-mailbox-utils.c | 59 +++++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 4 +++
3 files changed, 64 insertions(+)
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index a151e19da8..7eade9cf8a 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -530,6 +530,7 @@ typedef struct CXLDCRegion {
uint32_t dsmadhandle;
uint8_t flags;
unsigned long *blk_bitmap;
+ uint64_t supported_blk_size_bitmask;
} CXLDCRegion;
typedef struct CXLSetFeatureInfo {
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 0b615ea37a..3304048922 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -23,6 +23,7 @@
#include "qemu/uuid.h"
#include "system/hostmem.h"
#include "qemu/range.h"
+#include "qapi/qapi-types-cxl.h"
#define CXL_CAPACITY_MULTIPLIER (256 * MiB)
#define CXL_DC_EVENT_LOG_SIZE 8
@@ -117,6 +118,8 @@ enum {
#define GET_PHYSICAL_PORT_STATE 0x1
TUNNEL = 0x53,
#define MANAGEMENT_COMMAND 0x0
+ FMAPI_DCD_MGMT = 0x56,
+ #define GET_DCD_INFO 0x0
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3237,6 +3240,52 @@ static CXLRetCode cmd_dcd_release_dyn_cap(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.1: Get DCD Info (Opcode 5600h) */
+static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint8_t num_hosts;
+ uint8_t num_regions_supported;
+ uint8_t rsvd1[2];
+ uint16_t supported_add_sel_policy_bitmask;
+ uint8_t rsvd2[2];
+ uint16_t supported_removal_policy_bitmask;
+ uint8_t sanitize_on_release_bitmask;
+ uint8_t rsvd3;
+ uint64_t total_dynamic_capacity;
+ uint64_t region_blk_size_bitmasks[8];
+ } QEMU_PACKED *out = (void *)payload_out;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLDCRegion *region;
+ int i;
+
+ out->num_hosts = 1;
+ out->num_regions_supported = ct3d->dc.num_regions;
+ stw_le_p(&out->supported_add_sel_policy_bitmask,
+ BIT(CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE));
+ stw_le_p(&out->supported_removal_policy_bitmask,
+ BIT(CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE));
+ out->sanitize_on_release_bitmask = 0;
+
+ stq_le_p(&out->total_dynamic_capacity,
+ ct3d->dc.total_capacity / CXL_CAPACITY_MULTIPLIER);
+
+ for (i = 0; i < ct3d->dc.num_regions; i++) {
+ region = &ct3d->dc.regions[i];
+ memcpy(&out->region_blk_size_bitmasks[i],
+ ®ion->supported_blk_size_bitmask,
+ sizeof(out->region_blk_size_bitmasks[i]));
+ }
+
+ *len_out = sizeof(*out);
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3350,6 +3399,11 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
cmd_tunnel_management_cmd, ~0, 0 },
};
+static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
+ [FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
+ cmd_fm_get_dcd_info, 0, 0 },
+};
+
/*
* While the command is executing in the background, the device should
* update the percentage complete in the Background Command Status Register
@@ -3624,7 +3678,12 @@ void cxl_initialize_t3_fm_owned_ld_mctpcci(CXLCCI *cci, DeviceState *d,
DeviceState *intf,
size_t payload_max)
{
+ CXLType3Dev *ct3d = CXL_TYPE3(d);
+
cxl_copy_cci_commands(cci, cxl_cmd_set_t3_fm_owned_ld_mctp);
+ if (ct3d->dc.num_regions) {
+ cxl_copy_cci_commands(cci, cxl_cmd_set_fm_dcd);
+ }
cci->d = d;
cci->intf = intf;
cxl_init_cci(cci, payload_max);
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index f283178d88..f608470362 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -8,6 +8,7 @@
*
* SPDX-License-Identifier: GPL-v2-only
*/
+#include <math.h>
#include "qemu/osdep.h"
#include "qemu/units.h"
@@ -634,6 +635,8 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
uint64_t region_len;
uint64_t decode_len;
uint64_t blk_size = 2 * MiB;
+ /* Only 1 block size is supported for now. */
+ uint64_t supported_blk_size_bitmask = BIT((int) log2(blk_size));
CXLDCRegion *region;
MemoryRegion *mr;
uint64_t dc_size;
@@ -679,6 +682,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
.block_size = blk_size,
/* dsmad_handle set when creating CDAT table entries */
.flags = 0,
+ .supported_blk_size_bitmask = supported_blk_size_bitmask,
};
ct3d->dc.total_capacity += region->len;
region->blk_bitmap = bitmap_new(region->len / region->block_size);
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH qemu 03/11] hw/mem: cxl_type3: Add dsmas_flags to CXLDCRegion struct
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 01/11] hw/cxl: fix DC extent capacity tracking Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 02/11] hw/cxl: mailbox-utils: 0x5600 - FMAPI Get DCD Info Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 04/11] hw/cxl: mailbox-utils: 0x5601 - FMAPI Get Host Region Config Jonathan Cameron via
` (7 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
Add booleans to DC Region struct to represent dsmas flags (defined in CDAT) in
preparation for the next command, which returns the flags in the next mailbox
command 0x5601.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl_device.h | 15 +++++++++++++++
hw/mem/cxl_type3.c | 8 +++++++-
2 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 7eade9cf8a..469e5d872a 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -133,6 +133,15 @@ typedef enum {
CXL_MBOX_MAX = 0x20
} CXLRetCode;
+/* r3.2 Section 7.6.7.6.2 Table 7-66 DSMAS Flags Bits */
+typedef enum {
+ CXL_DSMAS_FLAGS_NONVOLATILE = 2,
+ CXL_DSMAS_FLAGS_SHARABLE = 3,
+ CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY = 4,
+ CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT = 5,
+ CXL_DSMAS_FLAGS_RDONLY = 6,
+} CXLDSMASFlags;
+
typedef struct CXLCCI CXLCCI;
typedef struct cxl_device_state CXLDeviceState;
struct cxl_cmd;
@@ -531,6 +540,12 @@ typedef struct CXLDCRegion {
uint8_t flags;
unsigned long *blk_bitmap;
uint64_t supported_blk_size_bitmask;
+ /* Following bools make up dsmas flags, as defined in the CDAT */
+ bool nonvolatile;
+ bool sharable;
+ bool hw_managed_coherency;
+ bool ic_specific_dc_management;
+ bool rdonly;
} CXLDCRegion;
typedef struct CXLSetFeatureInfo {
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index f608470362..0fccd22800 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -226,10 +226,16 @@ static int ct3_build_cdat_table(CDATSubHeader ***cdat_table, void *priv)
* future.
*/
for (i = 0; i < ct3d->dc.num_regions; i++) {
+ ct3d->dc.regions[i].nonvolatile = false;
+ ct3d->dc.regions[i].sharable = false;
+ ct3d->dc.regions[i].hw_managed_coherency = false;
+ ct3d->dc.regions[i].ic_specific_dc_management = false;
+ ct3d->dc.regions[i].rdonly = false;
ct3_build_cdat_entries_for_mr(&(table[cur_ent]),
dsmad_handle++,
ct3d->dc.regions[i].len,
- false, true, region_base);
+ ct3d->dc.regions[i].nonvolatile,
+ true, region_base);
ct3d->dc.regions[i].dsmadhandle = dsmad_handle - 1;
cur_ent += CT3_CDAT_NUM_ENTRIES;
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH qemu 04/11] hw/cxl: mailbox-utils: 0x5601 - FMAPI Get Host Region Config
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (2 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 03/11] hw/mem: cxl_type3: Add dsmas_flags to CXLDCRegion struct Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 05/11] hw/cxl: Move definition for dynamic_capacity_uuid and enum for DC event types to header Jonathan Cameron via
` (6 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5601 implemented per CXL r3.2 Spec Section 7.6.7.6.2
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/cxl/cxl-mailbox-utils.c | 106 +++++++++++++++++++++++++++++++++++++
1 file changed, 106 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 3304048922..bf1710b251 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -120,6 +120,7 @@ enum {
#define MANAGEMENT_COMMAND 0x0
FMAPI_DCD_MGMT = 0x56,
#define GET_DCD_INFO 0x0
+ #define GET_HOST_DC_REGION_CONFIG 0x1
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3286,6 +3287,109 @@ static CXLRetCode cmd_fm_get_dcd_info(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+static void build_dsmas_flags(uint8_t *flags, CXLDCRegion *region)
+{
+ *flags = 0;
+
+ if (region->nonvolatile) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_NONVOLATILE);
+ }
+ if (region->sharable) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_SHARABLE);
+ }
+ if (region->hw_managed_coherency) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_HW_MANAGED_COHERENCY);
+ }
+ if (region->ic_specific_dc_management) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_IC_SPECIFIC_DC_MANAGEMENT);
+ }
+ if (region->rdonly) {
+ *flags |= BIT(CXL_DSMAS_FLAGS_RDONLY);
+ }
+}
+
+/*
+ * CXL r3.2 section 7.6.7.6.2:
+ * Get Host DC Region Configuration (Opcode 5601h)
+ */
+static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t region_cnt;
+ uint8_t start_rid;
+ } QEMU_PACKED *in = (void *)payload_in;
+ struct {
+ uint16_t host_id;
+ uint8_t num_regions;
+ uint8_t regions_returned;
+ struct {
+ uint64_t base;
+ uint64_t decode_len;
+ uint64_t region_len;
+ uint64_t block_size;
+ uint8_t flags;
+ uint8_t rsvd1[3];
+ uint8_t sanitize;
+ uint8_t rsvd2[3];
+ } QEMU_PACKED records[];
+ } QEMU_PACKED *out = (void *)payload_out;
+ struct {
+ uint32_t num_extents_supported;
+ uint32_t num_extents_available;
+ uint32_t num_tags_supported;
+ uint32_t num_tags_available;
+ } QEMU_PACKED *extra_out;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ uint16_t record_count, out_pl_len, i;
+
+ if (in->start_rid >= ct3d->dc.num_regions) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+ record_count = MIN(ct3d->dc.num_regions - in->start_rid, in->region_cnt);
+
+ out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
+ extra_out = (void *)out + out_pl_len;
+ out_pl_len += sizeof(*extra_out);
+
+ assert(out_pl_len <= CXL_MAILBOX_MAX_PAYLOAD_SIZE);
+
+ stw_le_p(&out->host_id, 0);
+ out->num_regions = ct3d->dc.num_regions;
+ out->regions_returned = record_count;
+
+ for (i = 0; i < record_count; i++) {
+ stq_le_p(&out->records[i].base,
+ ct3d->dc.regions[in->start_rid + i].base);
+ stq_le_p(&out->records[i].decode_len,
+ ct3d->dc.regions[in->start_rid + i].decode_len /
+ CXL_CAPACITY_MULTIPLIER);
+ stq_le_p(&out->records[i].region_len,
+ ct3d->dc.regions[in->start_rid + i].len);
+ stq_le_p(&out->records[i].block_size,
+ ct3d->dc.regions[in->start_rid + i].block_size);
+ build_dsmas_flags(&out->records[i].flags,
+ &ct3d->dc.regions[in->start_rid + i]);
+ /* Sanitize is bit 0 of flags. */
+ out->records[i].sanitize =
+ ct3d->dc.regions[in->start_rid + i].flags & BIT(0);
+ }
+
+ stl_le_p(&extra_out->num_extents_supported, CXL_NUM_EXTENTS_SUPPORTED);
+ stl_le_p(&extra_out->num_extents_available, CXL_NUM_EXTENTS_SUPPORTED -
+ ct3d->dc.total_extent_count);
+ stl_le_p(&extra_out->num_tags_supported, CXL_NUM_TAGS_SUPPORTED);
+ stl_le_p(&extra_out->num_tags_available, CXL_NUM_TAGS_SUPPORTED);
+
+ *len_out = out_pl_len;
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3402,6 +3506,8 @@ static const struct cxl_cmd cxl_cmd_set_sw[256][256] = {
static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
[FMAPI_DCD_MGMT][GET_DCD_INFO] = { "GET_DCD_INFO",
cmd_fm_get_dcd_info, 0, 0 },
+ [FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
+ cmd_fm_get_host_dc_region_config, 4, 0 },
};
/*
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH qemu 05/11] hw/cxl: Move definition for dynamic_capacity_uuid and enum for DC event types to header
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (3 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 04/11] hw/cxl: mailbox-utils: 0x5601 - FMAPI Get Host Region Config Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 06/11] hw/mem: cxl_type3: Add DC Region bitmap lock Jonathan Cameron via
` (5 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
Move definition/enum to cxl_events.h for shared use in next patch
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl_events.h | 15 +++++++++++++++
hw/mem/cxl_type3.c | 15 ---------------
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/include/hw/cxl/cxl_events.h b/include/hw/cxl/cxl_events.h
index 38cadaa0f3..758b075a64 100644
--- a/include/hw/cxl/cxl_events.h
+++ b/include/hw/cxl/cxl_events.h
@@ -184,4 +184,19 @@ typedef struct CXLEventDynamicCapacity {
uint32_t tags_avail;
} QEMU_PACKED CXLEventDynamicCapacity;
+/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
+static const QemuUUID dynamic_capacity_uuid = {
+ .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
+ 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
+};
+
+typedef enum CXLDCEventType {
+ DC_EVENT_ADD_CAPACITY = 0x0,
+ DC_EVENT_RELEASE_CAPACITY = 0x1,
+ DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
+ DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
+ DC_EVENT_ADD_CAPACITY_RSP = 0x4,
+ DC_EVENT_CAPACITY_RELEASED = 0x5,
+} CXLDCEventType;
+
#endif /* CXL_EVENTS_H */
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 0fccd22800..cdd60079c4 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1876,21 +1876,6 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
}
}
-/* CXL r3.1 Table 8-50: Dynamic Capacity Event Record */
-static const QemuUUID dynamic_capacity_uuid = {
- .data = UUID(0xca95afa7, 0xf183, 0x4018, 0x8c, 0x2f,
- 0x95, 0x26, 0x8e, 0x10, 0x1a, 0x2a),
-};
-
-typedef enum CXLDCEventType {
- DC_EVENT_ADD_CAPACITY = 0x0,
- DC_EVENT_RELEASE_CAPACITY = 0x1,
- DC_EVENT_FORCED_RELEASE_CAPACITY = 0x2,
- DC_EVENT_REGION_CONFIG_UPDATED = 0x3,
- DC_EVENT_ADD_CAPACITY_RSP = 0x4,
- DC_EVENT_CAPACITY_RELEASED = 0x5,
-} CXLDCEventType;
-
/*
* Check whether the range [dpa, dpa + len - 1] has overlaps with extents in
* the list.
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH qemu 06/11] hw/mem: cxl_type3: Add DC Region bitmap lock
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (4 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 05/11] hw/cxl: Move definition for dynamic_capacity_uuid and enum for DC event types to header Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config Jonathan Cameron via
` (4 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
Add a lock on the bitmap of each CXLDCRegion in preparation for the next
patch which implements FMAPI Set DC Region Configuration. This command
can modify the block size, which means the region's bitmap must be updated
accordingly.
The lock becomes necessary when commands that add/release extents
(meaning they update the bitmap too) are enabled on a different CCI than
the CCI on which the FMAPI commands are enabled.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl_device.h | 1 +
hw/mem/cxl_type3.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 469e5d872a..96ef9be444 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -540,6 +540,7 @@ typedef struct CXLDCRegion {
uint8_t flags;
unsigned long *blk_bitmap;
uint64_t supported_blk_size_bitmask;
+ QemuMutex bitmap_lock;
/* Following bools make up dsmas flags, as defined in the CDAT */
bool nonvolatile;
bool sharable;
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index cdd60079c4..b872a26173 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -692,6 +692,7 @@ static bool cxl_create_dc_regions(CXLType3Dev *ct3d, Error **errp)
};
ct3d->dc.total_capacity += region->len;
region->blk_bitmap = bitmap_new(region->len / region->block_size);
+ qemu_mutex_init(®ion->bitmap_lock);
}
QTAILQ_INIT(&ct3d->dc.extents);
QTAILQ_INIT(&ct3d->dc.extents_pending);
@@ -1020,6 +1021,7 @@ void ct3_set_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
return;
}
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
bitmap_set(region->blk_bitmap, (dpa - region->base) / region->block_size,
len / region->block_size);
}
@@ -1046,6 +1048,7 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
* if bits between [dpa, dpa + len) are all 1s, meaning the DPA range is
* backed with DC extents, return true; else return false.
*/
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
return find_next_zero_bit(region->blk_bitmap, nr + nbits, nr) == nr + nbits;
}
@@ -1067,6 +1070,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
nr = (dpa - region->base) / region->block_size;
nbits = len / region->block_size;
+ QEMU_LOCK_GUARD(®ion->bitmap_lock);
bitmap_clear(region->blk_bitmap, nr, nbits);
}
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (5 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 06/11] hw/mem: cxl_type3: Add DC Region bitmap lock Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-14 9:32 ` Michael S. Tsirkin
2025-07-02 16:02 ` [PATCH qemu 08/11] hw/cxl: mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists Jonathan Cameron via
` (3 subsequent siblings)
10 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl_device.h | 3 ++
include/hw/cxl/cxl_mailbox.h | 6 +++
hw/cxl/cxl-mailbox-utils.c | 86 ++++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 6 +--
4 files changed, 98 insertions(+), 3 deletions(-)
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 96ef9be444..76af75d2d0 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -721,4 +721,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
uint64_t len);
bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
uint64_t len);
+void cxl_assign_event_header(CXLEventRecordHdr *hdr,
+ const QemuUUID *uuid, uint32_t flags,
+ uint8_t length, uint64_t timestamp);
#endif
diff --git a/include/hw/cxl/cxl_mailbox.h b/include/hw/cxl/cxl_mailbox.h
index 9008402d1c..a05d7cb5b7 100644
--- a/include/hw/cxl/cxl_mailbox.h
+++ b/include/hw/cxl/cxl_mailbox.h
@@ -8,6 +8,7 @@
#ifndef CXL_MAILBOX_H
#define CXL_MAILBOX_H
+#define CXL_MBOX_CONFIG_CHANGE_COLD_RESET (1)
#define CXL_MBOX_IMMEDIATE_CONFIG_CHANGE (1 << 1)
#define CXL_MBOX_IMMEDIATE_DATA_CHANGE (1 << 2)
#define CXL_MBOX_IMMEDIATE_POLICY_CHANGE (1 << 3)
@@ -15,5 +16,10 @@
#define CXL_MBOX_SECURITY_STATE_CHANGE (1 << 5)
#define CXL_MBOX_BACKGROUND_OPERATION (1 << 6)
#define CXL_MBOX_BACKGROUND_OPERATION_ABORT (1 << 7)
+#define CXL_MBOX_SECONDARY_MBOX_SUPPORTED (1 << 8)
+#define CXL_MBOX_REQUEST_ABORT_BACKGROUND_OP_SUPPORTED (1 << 9)
+#define CXL_MBOX_CEL_10_TO_11_VALID (1 << 10)
+#define CXL_MBOX_CONFIG_CHANGE_CONV_RESET (1 << 11)
+#define CXL_MBOX_CONFIG_CHANGE_CXL_RESET (1 << 12)
#endif
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index bf1710b251..1fc453f70d 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -121,6 +121,7 @@ enum {
FMAPI_DCD_MGMT = 0x56,
#define GET_DCD_INFO 0x0
#define GET_HOST_DC_REGION_CONFIG 0x1
+ #define SET_DC_REGION_CONFIG 0x2
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3390,6 +3391,84 @@ static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
+static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint8_t reg_id;
+ uint8_t rsvd[3];
+ uint64_t block_sz;
+ uint8_t flags;
+ uint8_t rsvd2[3];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLEventDynamicCapacity dcEvent = {};
+ CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
+
+ /*
+ * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
+ * This command shall fail with Unsupported when the Sanitize on Release
+ * field does not match the region’s configuration... and the device
+ * does not support reconfiguration of the Sanitize on Release setting.
+ *
+ * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
+ * doesn't match.
+ */
+ if ((in->flags & 0x1) != (region->flags & 0x1)) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ if (in->reg_id >= DCD_MAX_NUM_REGION) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ /* Check that no extents are in the region being reconfigured */
+ if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
+ return CXL_MBOX_UNSUPPORTED;
+ }
+
+ /* Check that new block size is supported */
+ if (!test_bit(BIT((int) log2(in->block_sz)),
+ ®ion->supported_blk_size_bitmask)) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ /* Return success if new block size == current block size */
+ if (in->block_sz == region->block_size) {
+ return CXL_MBOX_SUCCESS;
+ }
+
+ /* Free bitmap and create new one for new block size. */
+ qemu_mutex_lock(®ion->bitmap_lock);
+ g_free(region->blk_bitmap);
+ region->blk_bitmap = bitmap_new(region->len / in->block_sz);
+ qemu_mutex_unlock(®ion->bitmap_lock);
+ region->block_size = in->block_sz;
+
+ /* Create event record and insert into event log */
+ cxl_assign_event_header(&dcEvent.hdr,
+ &dynamic_capacity_uuid,
+ (1 << CXL_EVENT_TYPE_INFO),
+ sizeof(dcEvent),
+ cxl_device_get_timestamp(&ct3d->cxl_dstate));
+ dcEvent.type = DC_EVENT_REGION_CONFIG_UPDATED;
+ dcEvent.validity_flags = 1;
+ dcEvent.host_id = 0;
+ dcEvent.updated_region_id = in->reg_id;
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&dcEvent)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3508,6 +3587,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
cmd_fm_get_dcd_info, 0, 0 },
[FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
cmd_fm_get_host_dc_region_config, 4, 0 },
+ [FMAPI_DCD_MGMT][SET_DC_REGION_CONFIG] = { "SET_DC_REGION_CONFIG",
+ cmd_fm_set_dc_region_config, 16,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index b872a26173..ee554a77be 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1590,9 +1590,9 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
pcie_aer_inject_error(PCI_DEVICE(obj), &err);
}
-static void cxl_assign_event_header(CXLEventRecordHdr *hdr,
- const QemuUUID *uuid, uint32_t flags,
- uint8_t length, uint64_t timestamp)
+void cxl_assign_event_header(CXLEventRecordHdr *hdr,
+ const QemuUUID *uuid, uint32_t flags,
+ uint8_t length, uint64_t timestamp)
{
st24_le_p(&hdr->flags, flags);
hdr->length = length;
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-02 16:02 ` [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config Jonathan Cameron via
@ 2025-07-14 9:32 ` Michael S. Tsirkin
2025-07-14 14:02 ` Jonathan Cameron via
0 siblings, 1 reply; 24+ messages in thread
From: Michael S. Tsirkin @ 2025-07-14 9:32 UTC (permalink / raw)
To: Jonathan Cameron; +Cc: qemu-devel, Fan Ni, linux-cxl, linuxarm
On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
>
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> include/hw/cxl/cxl_device.h | 3 ++
> include/hw/cxl/cxl_mailbox.h | 6 +++
> hw/cxl/cxl-mailbox-utils.c | 86 ++++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 6 +--
> 4 files changed, 98 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index 96ef9be444..76af75d2d0 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -721,4 +721,7 @@ void ct3_clear_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> uint64_t len);
> bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> uint64_t len);
> +void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> + const QemuUUID *uuid, uint32_t flags,
> + uint8_t length, uint64_t timestamp);
> #endif
> diff --git a/include/hw/cxl/cxl_mailbox.h b/include/hw/cxl/cxl_mailbox.h
> index 9008402d1c..a05d7cb5b7 100644
> --- a/include/hw/cxl/cxl_mailbox.h
> +++ b/include/hw/cxl/cxl_mailbox.h
> @@ -8,6 +8,7 @@
> #ifndef CXL_MAILBOX_H
> #define CXL_MAILBOX_H
>
> +#define CXL_MBOX_CONFIG_CHANGE_COLD_RESET (1)
> #define CXL_MBOX_IMMEDIATE_CONFIG_CHANGE (1 << 1)
> #define CXL_MBOX_IMMEDIATE_DATA_CHANGE (1 << 2)
> #define CXL_MBOX_IMMEDIATE_POLICY_CHANGE (1 << 3)
> @@ -15,5 +16,10 @@
> #define CXL_MBOX_SECURITY_STATE_CHANGE (1 << 5)
> #define CXL_MBOX_BACKGROUND_OPERATION (1 << 6)
> #define CXL_MBOX_BACKGROUND_OPERATION_ABORT (1 << 7)
> +#define CXL_MBOX_SECONDARY_MBOX_SUPPORTED (1 << 8)
> +#define CXL_MBOX_REQUEST_ABORT_BACKGROUND_OP_SUPPORTED (1 << 9)
> +#define CXL_MBOX_CEL_10_TO_11_VALID (1 << 10)
> +#define CXL_MBOX_CONFIG_CHANGE_CONV_RESET (1 << 11)
> +#define CXL_MBOX_CONFIG_CHANGE_CXL_RESET (1 << 12)
>
> #endif
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index bf1710b251..1fc453f70d 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -121,6 +121,7 @@ enum {
> FMAPI_DCD_MGMT = 0x56,
> #define GET_DCD_INFO 0x0
> #define GET_HOST_DC_REGION_CONFIG 0x1
> + #define SET_DC_REGION_CONFIG 0x2
> };
>
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> @@ -3390,6 +3391,84 @@ static CXLRetCode cmd_fm_get_host_dc_region_config(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint8_t reg_id;
> + uint8_t rsvd[3];
> + uint64_t block_sz;
> + uint8_t flags;
> + uint8_t rsvd2[3];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + CXLEventDynamicCapacity dcEvent = {};
> + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> +
> + /*
> + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> + * This command shall fail with Unsupported when the Sanitize on Release
> + * field does not match the region’s configuration... and the device
> + * does not support reconfiguration of the Sanitize on Release setting.
> + *
> + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> + * doesn't match.
> + */
> + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + /* Check that no extents are in the region being reconfigured */
> + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> + return CXL_MBOX_UNSUPPORTED;
> + }
> +
> + /* Check that new block size is supported */
> + if (!test_bit(BIT((int) log2(in->block_sz)),
> + ®ion->supported_blk_size_bitmask)) {
> + return CXL_MBOX_INVALID_INPUT;
> + }
This does not work: test_bit works on unsigned long, while
supported_blk_size_bitmask is uint64_t.
Why so funky? what is wrong with:
if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
And BTW why cast to int here?
> +
> + /* Return success if new block size == current block size */
> + if (in->block_sz == region->block_size) {
> + return CXL_MBOX_SUCCESS;
> + }
> +
> + /* Free bitmap and create new one for new block size. */
> + qemu_mutex_lock(®ion->bitmap_lock);
> + g_free(region->blk_bitmap);
> + region->blk_bitmap = bitmap_new(region->len / in->block_sz);
> + qemu_mutex_unlock(®ion->bitmap_lock);
> + region->block_size = in->block_sz;
> +
> + /* Create event record and insert into event log */
> + cxl_assign_event_header(&dcEvent.hdr,
> + &dynamic_capacity_uuid,
> + (1 << CXL_EVENT_TYPE_INFO),
> + sizeof(dcEvent),
> + cxl_device_get_timestamp(&ct3d->cxl_dstate));
> + dcEvent.type = DC_EVENT_REGION_CONFIG_UPDATED;
> + dcEvent.validity_flags = 1;
> + dcEvent.host_id = 0;
> + dcEvent.updated_region_id = in->reg_id;
> +
> + if (cxl_event_insert(&ct3d->cxl_dstate,
> + CXL_EVENT_TYPE_DYNAMIC_CAP,
> + (CXLEventRecordRaw *)&dcEvent)) {
> + cxl_event_irq_assert(ct3d);
> + }
> + return CXL_MBOX_SUCCESS;
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3508,6 +3587,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> cmd_fm_get_dcd_info, 0, 0 },
> [FMAPI_DCD_MGMT][GET_HOST_DC_REGION_CONFIG] = { "GET_HOST_DC_REGION_CONFIG",
> cmd_fm_get_host_dc_region_config, 4, 0 },
> + [FMAPI_DCD_MGMT][SET_DC_REGION_CONFIG] = { "SET_DC_REGION_CONFIG",
> + cmd_fm_set_dc_region_config, 16,
> + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> };
>
> /*
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index b872a26173..ee554a77be 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1590,9 +1590,9 @@ void qmp_cxl_inject_correctable_error(const char *path, CxlCorErrorType type,
> pcie_aer_inject_error(PCI_DEVICE(obj), &err);
> }
>
> -static void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> - const QemuUUID *uuid, uint32_t flags,
> - uint8_t length, uint64_t timestamp)
> +void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> + const QemuUUID *uuid, uint32_t flags,
> + uint8_t length, uint64_t timestamp)
> {
> st24_le_p(&hdr->flags, flags);
> hdr->length = length;
> --
> 2.48.1
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-14 9:32 ` Michael S. Tsirkin
@ 2025-07-14 14:02 ` Jonathan Cameron via
2025-07-14 14:15 ` Jonathan Cameron via
0 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-14 14:02 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: qemu-devel, Fan Ni, linux-cxl, linuxarm, Anisa Su
On Mon, 14 Jul 2025 05:32:19 -0400
"Michael S. Tsirkin" <mst@redhat.com> wrote:
> On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> > From: Anisa Su <anisa.su@samsung.com>
> >
> > FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
> >
> > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > index bf1710b251..1fc453f70d 100644
> > --- a/hw/cxl/cxl-mailbox-utils.c
> > +++ b/hw/cxl/cxl-mailbox-utils.c
> > +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> > +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> > + uint8_t *payload_in,
> > + size_t len_in,
> > + uint8_t *payload_out,
> > + size_t *len_out,
> > + CXLCCI *cci)
> > +{
> > + struct {
> > + uint8_t reg_id;
> > + uint8_t rsvd[3];
> > + uint64_t block_sz;
> > + uint8_t flags;
> > + uint8_t rsvd2[3];
> > + } QEMU_PACKED *in = (void *)payload_in;
> > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > + CXLEventDynamicCapacity dcEvent = {};
> > + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> > +
> > + /*
> > + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> > + * This command shall fail with Unsupported when the Sanitize on Release
> > + * field does not match the region’s configuration... and the device
> > + * does not support reconfiguration of the Sanitize on Release setting.
> > + *
> > + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> > + * doesn't match.
> > + */
> > + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> > + return CXL_MBOX_UNSUPPORTED;
> > + }
> > +
> > + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> > + return CXL_MBOX_UNSUPPORTED;
> > + }
> > +
> > + /* Check that no extents are in the region being reconfigured */
> > + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> > + return CXL_MBOX_UNSUPPORTED;
> > + }
> > +
> > + /* Check that new block size is supported */
> > + if (!test_bit(BIT((int) log2(in->block_sz)),
> > + ®ion->supported_blk_size_bitmask)) {
> > + return CXL_MBOX_INVALID_INPUT;
> > + }
>
> This does not work: test_bit works on unsigned long, while
> supported_blk_size_bitmask is uint64_t.
>
> Why so funky? what is wrong with:
>
> if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
>
> And BTW why cast to int here?
Change looks fine to me, so I'll prepare an updated set with this
and the missing semi colon. Anisa if you can have a look at this
that would be great.
Sorry I seem to have missed Anisa off the cc for this!
Jonathan
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-14 14:02 ` Jonathan Cameron via
@ 2025-07-14 14:15 ` Jonathan Cameron via
2025-07-14 14:16 ` Jonathan Cameron via
0 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-14 14:15 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: qemu-devel, Fan Ni, linux-cxl, linuxarm, Anisa Su
On Mon, 14 Jul 2025 15:02:18 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 14 Jul 2025 05:32:19 -0400
> "Michael S. Tsirkin" <mst@redhat.com> wrote:
>
> > On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> > > From: Anisa Su <anisa.su@samsung.com>
> > >
> > > FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
> > >
> > > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
>
> > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > index bf1710b251..1fc453f70d 100644
> > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > +++ b/hw/cxl/cxl-mailbox-utils.c
>
> > > +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> > > +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> > > + uint8_t *payload_in,
> > > + size_t len_in,
> > > + uint8_t *payload_out,
> > > + size_t *len_out,
> > > + CXLCCI *cci)
> > > +{
> > > + struct {
> > > + uint8_t reg_id;
> > > + uint8_t rsvd[3];
> > > + uint64_t block_sz;
> > > + uint8_t flags;
> > > + uint8_t rsvd2[3];
> > > + } QEMU_PACKED *in = (void *)payload_in;
> > > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > > + CXLEventDynamicCapacity dcEvent = {};
> > > + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> > > +
> > > + /*
> > > + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> > > + * This command shall fail with Unsupported when the Sanitize on Release
> > > + * field does not match the region’s configuration... and the device
> > > + * does not support reconfiguration of the Sanitize on Release setting.
> > > + *
> > > + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> > > + * doesn't match.
> > > + */
> > > + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> > > + return CXL_MBOX_UNSUPPORTED;
> > > + }
> > > +
> > > + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> > > + return CXL_MBOX_UNSUPPORTED;
> > > + }
> > > +
> > > + /* Check that no extents are in the region being reconfigured */
> > > + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> > > + return CXL_MBOX_UNSUPPORTED;
> > > + }
> > > +
> > > + /* Check that new block size is supported */
> > > + if (!test_bit(BIT((int) log2(in->block_sz)),
> > > + ®ion->supported_blk_size_bitmask)) {
> > > + return CXL_MBOX_INVALID_INPUT;
> > > + }
> >
> > This does not work: test_bit works on unsigned long, while
> > supported_blk_size_bitmask is uint64_t.
> >
> > Why so funky? what is wrong with:
> >
> > if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
> >
> > And BTW why cast to int here?
This became obvious when your suggestion didn't build :(
./../hw/cxl/cxl-mailbox-utils.c: In function ‘cmd_fm_set_dc_region_config’:
/home/jic23/src/qemu/include/qemu/bitops.h:25:39: error: invalid operands to binary << (have ‘long long unsigned int’ and ‘double’)
25 | #define BIT_ULL(nr) (1ULL << (nr))
| ^~ ~~~~
../../hw/cxl/cxl-mailbox-utils.c:3436:11: note: in expansion of macro ‘BIT_ULL’
3436 | if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask)) {
| ^~~~~~~
Now I look again, this is effectively 2**(log_2(x)) or x. So
if (in->block_sz & region->supporte_blk_size_bitmask)
Should work as long as we know block_size is a power of 2 (which the specification
says it must be).
Anisa?
>
> Change looks fine to me, so I'll prepare an updated set with this
> and the missing semi colon. Anisa if you can have a look at this
> that would be great.
>
> Sorry I seem to have missed Anisa off the cc for this!
>
> Jonathan
>
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-14 14:15 ` Jonathan Cameron via
@ 2025-07-14 14:16 ` Jonathan Cameron via
2025-07-14 16:45 ` Fan Ni
0 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-14 14:16 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: qemu-devel, Fan Ni, linux-cxl, linuxarm, Anisa Su
On Mon, 14 Jul 2025 15:15:12 +0100
Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> On Mon, 14 Jul 2025 15:02:18 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
> > On Mon, 14 Jul 2025 05:32:19 -0400
> > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> >
> > > On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> > > > From: Anisa Su <anisa.su@samsung.com>
> > > >
> > > > FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
> > > >
> > > > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> >
> >
> > > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > > index bf1710b251..1fc453f70d 100644
> > > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > > +++ b/hw/cxl/cxl-mailbox-utils.c
> >
> > > > +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> > > > +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> > > > + uint8_t *payload_in,
> > > > + size_t len_in,
> > > > + uint8_t *payload_out,
> > > > + size_t *len_out,
> > > > + CXLCCI *cci)
> > > > +{
> > > > + struct {
> > > > + uint8_t reg_id;
> > > > + uint8_t rsvd[3];
> > > > + uint64_t block_sz;
> > > > + uint8_t flags;
> > > > + uint8_t rsvd2[3];
> > > > + } QEMU_PACKED *in = (void *)payload_in;
> > > > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > > > + CXLEventDynamicCapacity dcEvent = {};
> > > > + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> > > > +
> > > > + /*
> > > > + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> > > > + * This command shall fail with Unsupported when the Sanitize on Release
> > > > + * field does not match the region’s configuration... and the device
> > > > + * does not support reconfiguration of the Sanitize on Release setting.
> > > > + *
> > > > + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> > > > + * doesn't match.
> > > > + */
> > > > + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> > > > + return CXL_MBOX_UNSUPPORTED;
> > > > + }
> > > > +
> > > > + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> > > > + return CXL_MBOX_UNSUPPORTED;
> > > > + }
> > > > +
> > > > + /* Check that no extents are in the region being reconfigured */
> > > > + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> > > > + return CXL_MBOX_UNSUPPORTED;
> > > > + }
> > > > +
> > > > + /* Check that new block size is supported */
> > > > + if (!test_bit(BIT((int) log2(in->block_sz)),
> > > > + ®ion->supported_blk_size_bitmask)) {
> > > > + return CXL_MBOX_INVALID_INPUT;
> > > > + }
> > >
> > > This does not work: test_bit works on unsigned long, while
> > > supported_blk_size_bitmask is uint64_t.
> > >
> > > Why so funky? what is wrong with:
> > >
> > > if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
> > >
> > > And BTW why cast to int here?
> This became obvious when your suggestion didn't build :(
>
> ./../hw/cxl/cxl-mailbox-utils.c: In function ‘cmd_fm_set_dc_region_config’:
> /home/jic23/src/qemu/include/qemu/bitops.h:25:39: error: invalid operands to binary << (have ‘long long unsigned int’ and ‘double’)
> 25 | #define BIT_ULL(nr) (1ULL << (nr))
> | ^~ ~~~~
> ../../hw/cxl/cxl-mailbox-utils.c:3436:11: note: in expansion of macro ‘BIT_ULL’
> 3436 | if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask)) {
> | ^~~~~~~
>
> Now I look again, this is effectively 2**(log_2(x)) or x. So
> if (in->block_sz & region->supporte_blk_size_bitmask)
it (!(in->block_sz & region->supports_blk_size_bitmask))
I mean.
> Should work as long as we know block_size is a power of 2 (which the specification
> says it must be).
>
> Anisa?
>
> >
> > Change looks fine to me, so I'll prepare an updated set with this
> > and the missing semi colon. Anisa if you can have a look at this
> > that would be great.
> >
> > Sorry I seem to have missed Anisa off the cc for this!
> >
> > Jonathan
> >
>
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-14 14:16 ` Jonathan Cameron via
@ 2025-07-14 16:45 ` Fan Ni
2025-07-14 17:02 ` Jonathan Cameron via
0 siblings, 1 reply; 24+ messages in thread
From: Fan Ni @ 2025-07-14 16:45 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Michael S. Tsirkin, qemu-devel, linux-cxl, linuxarm, Anisa Su
On Mon, Jul 14, 2025 at 03:16:38PM +0100, Jonathan Cameron wrote:
> On Mon, 14 Jul 2025 15:15:12 +0100
> Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
>
> > On Mon, 14 Jul 2025 15:02:18 +0100
> > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> >
> > > On Mon, 14 Jul 2025 05:32:19 -0400
> > > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > >
> > > > On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> > > > > From: Anisa Su <anisa.su@samsung.com>
> > > > >
> > > > > FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
> > > > >
> > > > > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > > > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > >
> > >
> > > > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > > > index bf1710b251..1fc453f70d 100644
> > > > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > > > +++ b/hw/cxl/cxl-mailbox-utils.c
> > >
> > > > > +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> > > > > +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> > > > > + uint8_t *payload_in,
> > > > > + size_t len_in,
> > > > > + uint8_t *payload_out,
> > > > > + size_t *len_out,
> > > > > + CXLCCI *cci)
> > > > > +{
> > > > > + struct {
> > > > > + uint8_t reg_id;
> > > > > + uint8_t rsvd[3];
> > > > > + uint64_t block_sz;
> > > > > + uint8_t flags;
> > > > > + uint8_t rsvd2[3];
> > > > > + } QEMU_PACKED *in = (void *)payload_in;
> > > > > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > > > > + CXLEventDynamicCapacity dcEvent = {};
> > > > > + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> > > > > +
> > > > > + /*
> > > > > + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> > > > > + * This command shall fail with Unsupported when the Sanitize on Release
> > > > > + * field does not match the region’s configuration... and the device
> > > > > + * does not support reconfiguration of the Sanitize on Release setting.
> > > > > + *
> > > > > + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> > > > > + * doesn't match.
> > > > > + */
> > > > > + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > + }
> > > > > +
> > > > > + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > + }
> > > > > +
> > > > > + /* Check that no extents are in the region being reconfigured */
> > > > > + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > + }
> > > > > +
> > > > > + /* Check that new block size is supported */
> > > > > + if (!test_bit(BIT((int) log2(in->block_sz)),
> > > > > + ®ion->supported_blk_size_bitmask)) {
> > > > > + return CXL_MBOX_INVALID_INPUT;
> > > > > + }
> > > >
> > > > This does not work: test_bit works on unsigned long, while
> > > > supported_blk_size_bitmask is uint64_t.
> > > >
> > > > Why so funky? what is wrong with:
> > > >
> > > > if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
> > > >
> > > > And BTW why cast to int here?
> > This became obvious when your suggestion didn't build :(
> >
> > ./../hw/cxl/cxl-mailbox-utils.c: In function ‘cmd_fm_set_dc_region_config’:
> > /home/jic23/src/qemu/include/qemu/bitops.h:25:39: error: invalid operands to binary << (have ‘long long unsigned int’ and ‘double’)
> > 25 | #define BIT_ULL(nr) (1ULL << (nr))
> > | ^~ ~~~~
> > ../../hw/cxl/cxl-mailbox-utils.c:3436:11: note: in expansion of macro ‘BIT_ULL’
> > 3436 | if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask)) {
> > | ^~~~~~~
> >
> > Now I look again, this is effectively 2**(log_2(x)) or x. So
> > if (in->block_sz & region->supporte_blk_size_bitmask)
>
> it (!(in->block_sz & region->supports_blk_size_bitmask))
>
> I mean.
Make sense to me.
The only thing is how to detect the violation if the passed in block_sz
is not power of 2.
Or who will do the check if not in qemu?
Fan
>
>
> > Should work as long as we know block_size is a power of 2 (which the specification
> > says it must be).
> >
> > Anisa?
> >
> > >
> > > Change looks fine to me, so I'll prepare an updated set with this
> > > and the missing semi colon. Anisa if you can have a look at this
> > > that would be great.
> > >
> > > Sorry I seem to have missed Anisa off the cc for this!
> > >
> > > Jonathan
> > >
> >
>
--
Fan Ni
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-14 16:45 ` Fan Ni
@ 2025-07-14 17:02 ` Jonathan Cameron via
2025-07-14 17:21 ` Anisa Su
0 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-14 17:02 UTC (permalink / raw)
To: Fan Ni; +Cc: Michael S. Tsirkin, qemu-devel, linux-cxl, linuxarm, Anisa Su
On Mon, 14 Jul 2025 09:45:31 -0700
Fan Ni <nifan.cxl@gmail.com> wrote:
> On Mon, Jul 14, 2025 at 03:16:38PM +0100, Jonathan Cameron wrote:
> > On Mon, 14 Jul 2025 15:15:12 +0100
> > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> >
> > > On Mon, 14 Jul 2025 15:02:18 +0100
> > > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> > >
> > > > On Mon, 14 Jul 2025 05:32:19 -0400
> > > > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > > >
> > > > > On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> > > > > > From: Anisa Su <anisa.su@samsung.com>
> > > > > >
> > > > > > FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
> > > > > >
> > > > > > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > > > > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > > > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > > >
> > > >
> > > > > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > > > > index bf1710b251..1fc453f70d 100644
> > > > > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > > > > +++ b/hw/cxl/cxl-mailbox-utils.c
> > > >
> > > > > > +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> > > > > > +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> > > > > > + uint8_t *payload_in,
> > > > > > + size_t len_in,
> > > > > > + uint8_t *payload_out,
> > > > > > + size_t *len_out,
> > > > > > + CXLCCI *cci)
> > > > > > +{
> > > > > > + struct {
> > > > > > + uint8_t reg_id;
> > > > > > + uint8_t rsvd[3];
> > > > > > + uint64_t block_sz;
> > > > > > + uint8_t flags;
> > > > > > + uint8_t rsvd2[3];
> > > > > > + } QEMU_PACKED *in = (void *)payload_in;
> > > > > > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > > > > > + CXLEventDynamicCapacity dcEvent = {};
> > > > > > + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> > > > > > +
> > > > > > + /*
> > > > > > + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> > > > > > + * This command shall fail with Unsupported when the Sanitize on Release
> > > > > > + * field does not match the region’s configuration... and the device
> > > > > > + * does not support reconfiguration of the Sanitize on Release setting.
> > > > > > + *
> > > > > > + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> > > > > > + * doesn't match.
> > > > > > + */
> > > > > > + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > + }
> > > > > > +
> > > > > > + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > + }
> > > > > > +
> > > > > > + /* Check that no extents are in the region being reconfigured */
> > > > > > + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > + }
> > > > > > +
> > > > > > + /* Check that new block size is supported */
> > > > > > + if (!test_bit(BIT((int) log2(in->block_sz)),
> > > > > > + ®ion->supported_blk_size_bitmask)) {
> > > > > > + return CXL_MBOX_INVALID_INPUT;
> > > > > > + }
> > > > >
> > > > > This does not work: test_bit works on unsigned long, while
> > > > > supported_blk_size_bitmask is uint64_t.
> > > > >
> > > > > Why so funky? what is wrong with:
> > > > >
> > > > > if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
> > > > >
> > > > > And BTW why cast to int here?
> > > This became obvious when your suggestion didn't build :(
> > >
> > > ./../hw/cxl/cxl-mailbox-utils.c: In function ‘cmd_fm_set_dc_region_config’:
> > > /home/jic23/src/qemu/include/qemu/bitops.h:25:39: error: invalid operands to binary << (have ‘long long unsigned int’ and ‘double’)
> > > 25 | #define BIT_ULL(nr) (1ULL << (nr))
> > > | ^~ ~~~~
> > > ../../hw/cxl/cxl-mailbox-utils.c:3436:11: note: in expansion of macro ‘BIT_ULL’
> > > 3436 | if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask)) {
> > > | ^~~~~~~
> > >
> > > Now I look again, this is effectively 2**(log_2(x)) or x. So
> > > if (in->block_sz & region->supporte_blk_size_bitmask)
> >
> > it (!(in->block_sz & region->supports_blk_size_bitmask))
> >
> > I mean.
>
> Make sense to me.
>
> The only thing is how to detect the violation if the passed in block_sz
> is not power of 2.
> Or who will do the check if not in qemu?
Hi Fan,
I checked the spec on this. There isn't an explicit statement that the device
should return an error on this. Looks to be impdef. I'd happily see such
a check as a usability improvement though!
I'm just not set up to test this right now so decided to be
risk averse and not trying adding one.
If you want to send a patch on top I'd be happy to add it.
Jonathan
>
> Fan
>
> >
> >
> > > Should work as long as we know block_size is a power of 2 (which the specification
> > > says it must be).
> > >
> > > Anisa?
> > >
> > > >
> > > > Change looks fine to me, so I'll prepare an updated set with this
> > > > and the missing semi colon. Anisa if you can have a look at this
> > > > that would be great.
> > > >
> > > > Sorry I seem to have missed Anisa off the cc for this!
> > > >
> > > > Jonathan
> > > >
> > >
> >
>
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-14 17:02 ` Jonathan Cameron via
@ 2025-07-14 17:21 ` Anisa Su
2025-07-14 17:28 ` Jonathan Cameron via
0 siblings, 1 reply; 24+ messages in thread
From: Anisa Su @ 2025-07-14 17:21 UTC (permalink / raw)
To: Jonathan Cameron
Cc: Fan Ni, Michael S. Tsirkin, qemu-devel, linux-cxl, linuxarm
On Mon, Jul 14, 2025 at 06:02:26PM +0100, Jonathan Cameron wrote:
> On Mon, 14 Jul 2025 09:45:31 -0700
> Fan Ni <nifan.cxl@gmail.com> wrote:
>
> > On Mon, Jul 14, 2025 at 03:16:38PM +0100, Jonathan Cameron wrote:
> > > On Mon, 14 Jul 2025 15:15:12 +0100
> > > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> > >
> > > > On Mon, 14 Jul 2025 15:02:18 +0100
> > > > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> > > >
> > > > > On Mon, 14 Jul 2025 05:32:19 -0400
> > > > > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > > > >
> > > > > > On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> > > > > > > From: Anisa Su <anisa.su@samsung.com>
> > > > > > >
> > > > > > > FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
> > > > > > >
> > > > > > > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > > > > > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > > > > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > > > >
> > > > >
> > > > > > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > > > > > index bf1710b251..1fc453f70d 100644
> > > > > > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > > > > > +++ b/hw/cxl/cxl-mailbox-utils.c
> > > > >
> > > > > > > +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> > > > > > > +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> > > > > > > + uint8_t *payload_in,
> > > > > > > + size_t len_in,
> > > > > > > + uint8_t *payload_out,
> > > > > > > + size_t *len_out,
> > > > > > > + CXLCCI *cci)
> > > > > > > +{
> > > > > > > + struct {
> > > > > > > + uint8_t reg_id;
> > > > > > > + uint8_t rsvd[3];
> > > > > > > + uint64_t block_sz;
> > > > > > > + uint8_t flags;
> > > > > > > + uint8_t rsvd2[3];
> > > > > > > + } QEMU_PACKED *in = (void *)payload_in;
> > > > > > > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > > > > > > + CXLEventDynamicCapacity dcEvent = {};
> > > > > > > + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> > > > > > > +
> > > > > > > + /*
> > > > > > > + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> > > > > > > + * This command shall fail with Unsupported when the Sanitize on Release
> > > > > > > + * field does not match the region’s configuration... and the device
> > > > > > > + * does not support reconfiguration of the Sanitize on Release setting.
> > > > > > > + *
> > > > > > > + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> > > > > > > + * doesn't match.
> > > > > > > + */
> > > > > > > + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> > > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > > + }
> > > > > > > +
> > > > > > > + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> > > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > > + }
> > > > > > > +
> > > > > > > + /* Check that no extents are in the region being reconfigured */
> > > > > > > + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> > > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > > + }
> > > > > > > +
> > > > > > > + /* Check that new block size is supported */
> > > > > > > + if (!test_bit(BIT((int) log2(in->block_sz)),
> > > > > > > + ®ion->supported_blk_size_bitmask)) {
> > > > > > > + return CXL_MBOX_INVALID_INPUT;
> > > > > > > + }
> > > > > >
> > > > > > This does not work: test_bit works on unsigned long, while
> > > > > > supported_blk_size_bitmask is uint64_t.
> > > > > >
> > > > > > Why so funky? what is wrong with:
> > > > > >
> > > > > > if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
> > > > > >
> > > > > > And BTW why cast to int here?
> > > > This became obvious when your suggestion didn't build :(
> > > >
> > > > ./../hw/cxl/cxl-mailbox-utils.c: In function ‘cmd_fm_set_dc_region_config’:
> > > > /home/jic23/src/qemu/include/qemu/bitops.h:25:39: error: invalid operands to binary << (have ‘long long unsigned int’ and ‘double’)
> > > > 25 | #define BIT_ULL(nr) (1ULL << (nr))
> > > > | ^~ ~~~~
> > > > ../../hw/cxl/cxl-mailbox-utils.c:3436:11: note: in expansion of macro ‘BIT_ULL’
> > > > 3436 | if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask)) {
> > > > | ^~~~~~~
> > > >
> > > > Now I look again, this is effectively 2**(log_2(x)) or x. So
> > > > if (in->block_sz & region->supporte_blk_size_bitmask)
> > >
> > > it (!(in->block_sz & region->supports_blk_size_bitmask))
> > >
> > > I mean.
> >
> > Make sense to me.
> >
> > The only thing is how to detect the violation if the passed in block_sz
> > is not power of 2.
> > Or who will do the check if not in qemu?
> Hi Fan,
>
> I checked the spec on this. There isn't an explicit statement that the device
> should return an error on this. Looks to be impdef. I'd happily see such
> a check as a usability improvement though!
>
> I'm just not set up to test this right now so decided to be
> risk averse and not trying adding one.
>
> If you want to send a patch on top I'd be happy to add it.
>
> Jonathan
>
>
Would something like this work?
/* Check that new block size is supported */
if (!is_power_of_2(in->block_sz) ||
!(in->block_sz & region->supported_blk_size_bitmask)) {
return CXL_MBOX_INVALID_INPUT;
}
I did not have to add any extra headers to use this helper function in
include/qemu/host-utils.h and it compiles for me.
Anisa
>
> >
> > Fan
> >
> > >
> > >
> > > > Should work as long as we know block_size is a power of 2 (which the specification
> > > > says it must be).
> > > >
> > > > Anisa?
> > > >
> > > > >
> > > > > Change looks fine to me, so I'll prepare an updated set with this
> > > > > and the missing semi colon. Anisa if you can have a look at this
> > > > > that would be great.
> > > > >
> > > > > Sorry I seem to have missed Anisa off the cc for this!
> > > > >
> > > > > Jonathan
> > > > >
> > > >
> > >
> >
>
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config
2025-07-14 17:21 ` Anisa Su
@ 2025-07-14 17:28 ` Jonathan Cameron via
0 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-14 17:28 UTC (permalink / raw)
To: Anisa Su; +Cc: Fan Ni, Michael S. Tsirkin, qemu-devel, linux-cxl, linuxarm
On Mon, 14 Jul 2025 17:21:10 +0000
Anisa Su <anisa.su887@gmail.com> wrote:
> On Mon, Jul 14, 2025 at 06:02:26PM +0100, Jonathan Cameron wrote:
> > On Mon, 14 Jul 2025 09:45:31 -0700
> > Fan Ni <nifan.cxl@gmail.com> wrote:
> >
> > > On Mon, Jul 14, 2025 at 03:16:38PM +0100, Jonathan Cameron wrote:
> > > > On Mon, 14 Jul 2025 15:15:12 +0100
> > > > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> > > >
> > > > > On Mon, 14 Jul 2025 15:02:18 +0100
> > > > > Jonathan Cameron <Jonathan.Cameron@huawei.com> wrote:
> > > > >
> > > > > > On Mon, 14 Jul 2025 05:32:19 -0400
> > > > > > "Michael S. Tsirkin" <mst@redhat.com> wrote:
> > > > > >
> > > > > > > On Wed, Jul 02, 2025 at 05:02:13PM +0100, Jonathan Cameron wrote:
> > > > > > > > From: Anisa Su <anisa.su@samsung.com>
> > > > > > > >
> > > > > > > > FM DCD Management command 0x5602 implemented per CXL r3.2 Spec Section 7.6.7.6.3
> > > > > > > >
> > > > > > > > Reviewed-by: Fan Ni <fan.ni@samsung.com>
> > > > > > > > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > > > > > > > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> > > > > >
> > > > > >
> > > > > > > > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > > > > > > > index bf1710b251..1fc453f70d 100644
> > > > > > > > --- a/hw/cxl/cxl-mailbox-utils.c
> > > > > > > > +++ b/hw/cxl/cxl-mailbox-utils.c
> > > > > >
> > > > > > > > +/* CXL r3.2 section 7.6.7.6.3: Set Host DC Region Configuration (Opcode 5602) */
> > > > > > > > +static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
> > > > > > > > + uint8_t *payload_in,
> > > > > > > > + size_t len_in,
> > > > > > > > + uint8_t *payload_out,
> > > > > > > > + size_t *len_out,
> > > > > > > > + CXLCCI *cci)
> > > > > > > > +{
> > > > > > > > + struct {
> > > > > > > > + uint8_t reg_id;
> > > > > > > > + uint8_t rsvd[3];
> > > > > > > > + uint64_t block_sz;
> > > > > > > > + uint8_t flags;
> > > > > > > > + uint8_t rsvd2[3];
> > > > > > > > + } QEMU_PACKED *in = (void *)payload_in;
> > > > > > > > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > > > > > > > + CXLEventDynamicCapacity dcEvent = {};
> > > > > > > > + CXLDCRegion *region = &ct3d->dc.regions[in->reg_id];
> > > > > > > > +
> > > > > > > > + /*
> > > > > > > > + * CXL r3.2 7.6.7.6.3: Set DC Region Configuration
> > > > > > > > + * This command shall fail with Unsupported when the Sanitize on Release
> > > > > > > > + * field does not match the region’s configuration... and the device
> > > > > > > > + * does not support reconfiguration of the Sanitize on Release setting.
> > > > > > > > + *
> > > > > > > > + * Currently not reconfigurable, so always fail if sanitize bit (bit 0)
> > > > > > > > + * doesn't match.
> > > > > > > > + */
> > > > > > > > + if ((in->flags & 0x1) != (region->flags & 0x1)) {
> > > > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > > > + }
> > > > > > > > +
> > > > > > > > + if (in->reg_id >= DCD_MAX_NUM_REGION) {
> > > > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > > > + }
> > > > > > > > +
> > > > > > > > + /* Check that no extents are in the region being reconfigured */
> > > > > > > > + if (!bitmap_empty(region->blk_bitmap, region->len / region->block_size)) {
> > > > > > > > + return CXL_MBOX_UNSUPPORTED;
> > > > > > > > + }
> > > > > > > > +
> > > > > > > > + /* Check that new block size is supported */
> > > > > > > > + if (!test_bit(BIT((int) log2(in->block_sz)),
> > > > > > > > + ®ion->supported_blk_size_bitmask)) {
> > > > > > > > + return CXL_MBOX_INVALID_INPUT;
> > > > > > > > + }
> > > > > > >
> > > > > > > This does not work: test_bit works on unsigned long, while
> > > > > > > supported_blk_size_bitmask is uint64_t.
> > > > > > >
> > > > > > > Why so funky? what is wrong with:
> > > > > > >
> > > > > > > if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask))
> > > > > > >
> > > > > > > And BTW why cast to int here?
> > > > > This became obvious when your suggestion didn't build :(
> > > > >
> > > > > ./../hw/cxl/cxl-mailbox-utils.c: In function ‘cmd_fm_set_dc_region_config’:
> > > > > /home/jic23/src/qemu/include/qemu/bitops.h:25:39: error: invalid operands to binary << (have ‘long long unsigned int’ and ‘double’)
> > > > > 25 | #define BIT_ULL(nr) (1ULL << (nr))
> > > > > | ^~ ~~~~
> > > > > ../../hw/cxl/cxl-mailbox-utils.c:3436:11: note: in expansion of macro ‘BIT_ULL’
> > > > > 3436 | if (!(BIT_ULL(log2(in->block_sz)) & region->supported_blk_size_bitmask)) {
> > > > > | ^~~~~~~
> > > > >
> > > > > Now I look again, this is effectively 2**(log_2(x)) or x. So
> > > > > if (in->block_sz & region->supporte_blk_size_bitmask)
> > > >
> > > > it (!(in->block_sz & region->supports_blk_size_bitmask))
> > > >
> > > > I mean.
> > >
> > > Make sense to me.
> > >
> > > The only thing is how to detect the violation if the passed in block_sz
> > > is not power of 2.
> > > Or who will do the check if not in qemu?
> > Hi Fan,
> >
> > I checked the spec on this. There isn't an explicit statement that the device
> > should return an error on this. Looks to be impdef. I'd happily see such
> > a check as a usability improvement though!
> >
> > I'm just not set up to test this right now so decided to be
> > risk averse and not trying adding one.
> >
> > If you want to send a patch on top I'd be happy to add it.
> >
> > Jonathan
> >
> >
> Would something like this work?
>
> /* Check that new block size is supported */
> if (!is_power_of_2(in->block_sz) ||
> !(in->block_sz & region->supported_blk_size_bitmask)) {
> return CXL_MBOX_INVALID_INPUT;
> }
>
> I did not have to add any extra headers to use this helper function in
> include/qemu/host-utils.h and it compiles for me.
Nice. I knew I was too tired today!
I'll roll that in as seems safe enough.
V2 coming shortly.
J
>
> Anisa
> >
> > >
> > > Fan
> > >
> > > >
> > > >
> > > > > Should work as long as we know block_size is a power of 2 (which the specification
> > > > > says it must be).
> > > > >
> > > > > Anisa?
> > > > >
> > > > > >
> > > > > > Change looks fine to me, so I'll prepare an updated set with this
> > > > > > and the missing semi colon. Anisa if you can have a look at this
> > > > > > that would be great.
> > > > > >
> > > > > > Sorry I seem to have missed Anisa off the cc for this!
> > > > > >
> > > > > > Jonathan
> > > > > >
> > > > >
> > > >
> > >
> >
>
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH qemu 08/11] hw/cxl: mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (6 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 07/11] hw/cxl: mailbox-utils: 0x5602 - FMAPI Set DC Region Config Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 09/11] hw/cxl: Create helper function to create DC Event Records from extents Jonathan Cameron via
` (2 subsequent siblings)
10 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5603 implemented per CXL r3.2 Spec Section 7.6.7.6.4
Very similar to previously implemented command 0x4801.
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/cxl/cxl-mailbox-utils.c | 76 ++++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 1fc453f70d..24e4ba0200 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -122,6 +122,7 @@ enum {
#define GET_DCD_INFO 0x0
#define GET_HOST_DC_REGION_CONFIG 0x1
#define SET_DC_REGION_CONFIG 0x2
+ #define GET_DC_REGION_EXTENT_LIST 0x3
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3469,6 +3470,79 @@ static CXLRetCode cmd_fm_set_dc_region_config(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/* CXL r3.2 section 7.6.7.6.4 Get DC Region Extent Lists (Opcode 5603h) */
+static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t rsvd[2];
+ uint32_t extent_cnt;
+ uint32_t start_extent_id;
+ } QEMU_PACKED *in = (void *)payload_in;
+ struct {
+ uint16_t host_id;
+ uint8_t rsvd[2];
+ uint32_t start_extent_id;
+ uint32_t extents_returned;
+ uint32_t total_extents;
+ uint32_t list_generation_num;
+ uint8_t rsvd2[4];
+ CXLDCExtentRaw records[];
+ } QEMU_PACKED *out = (void *)payload_out;
+ QEMU_BUILD_BUG_ON(sizeof(*in) != 0xc);
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ CXLDCExtent *ent;
+ CXLDCExtentRaw *out_rec;
+ uint16_t record_count = 0, record_done = 0, i = 0;
+ uint16_t out_pl_len, max_size;
+
+ if (in->host_id != 0) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ if (in->start_extent_id > ct3d->dc.nr_extents_accepted) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ record_count = MIN(in->extent_cnt,
+ ct3d->dc.nr_extents_accepted - in->start_extent_id);
+ max_size = CXL_MAILBOX_MAX_PAYLOAD_SIZE - sizeof(*out);
+ record_count = MIN(record_count, max_size / sizeof(out->records[0]));
+ out_pl_len = sizeof(*out) + record_count * sizeof(out->records[0]);
+
+ stw_le_p(&out->host_id, in->host_id);
+ stl_le_p(&out->start_extent_id, in->start_extent_id);
+ stl_le_p(&out->extents_returned, record_count);
+ stl_le_p(&out->total_extents, ct3d->dc.nr_extents_accepted);
+ stl_le_p(&out->list_generation_num, ct3d->dc.ext_list_gen_seq);
+
+ if (record_count > 0) {
+ QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) {
+ if (i++ < in->start_extent_id) {
+ continue;
+ }
+ out_rec = &out->records[record_done];
+ stq_le_p(&out_rec->start_dpa, ent->start_dpa);
+ stq_le_p(&out_rec->len, ent->len);
+ memcpy(&out_rec->tag, ent->tag, 0x10);
+ stw_le_p(&out_rec->shared_seq, ent->shared_seq);
+
+ record_done++;
+ if (record_done == record_count) {
+ break;
+ }
+ }
+ }
+
+ *len_out = out_pl_len;
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3594,6 +3668,8 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
+ [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
+ cmd_fm_get_dc_region_extent_list, 12, 0 },
};
/*
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [PATCH qemu 09/11] hw/cxl: Create helper function to create DC Event Records from extents
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (7 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 08/11] hw/cxl: mailbox-utils: 0x5603 - FMAPI Get DC Region Extent Lists Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-03 16:21 ` Fan Ni
2025-07-02 16:02 ` [PATCH qemu 10/11] hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add Jonathan Cameron via
2025-07-02 16:02 ` [PATCH qemu 11/11] hw/cxl: mailbox-utils: 0x5605 - FMAPI Initiate DC Release Jonathan Cameron via
10 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
Prepatory patch for following FMAPI Add/Release Patches. Refactors part
of qmp_cxl_process_dynamic_capacity_prescriptive() into a helper
function to create DC Event Records and insert in the event log.
Moves definition for CXL_NUM_EXTENTS_SUPPORTED to cxl.h so it can be
accessed by cxl-mailbox-utils.c and cxl-events.c, where the helper
function is defined.
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl.h | 1 +
include/hw/cxl/cxl_device.h | 4 ++++
hw/cxl/cxl-events.c | 38 +++++++++++++++++++++++++++++++++++++
hw/cxl/cxl-mailbox-utils.c | 1 -
hw/mem/cxl_type3.c | 37 +-----------------------------------
5 files changed, 44 insertions(+), 37 deletions(-)
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index 75e47b6864..3ae4303383 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -23,6 +23,7 @@
#define CXL_DEVICE_REG_BAR_IDX 2
#define CXL_WINDOW_MAX 10
+#define CXL_NUM_EXTENTS_SUPPORTED 512
typedef struct PXBCXLDev PXBCXLDev;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 76af75d2d0..ed91e5387e 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -724,4 +724,8 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
void cxl_assign_event_header(CXLEventRecordHdr *hdr,
const QemuUUID *uuid, uint32_t flags,
uint8_t length, uint64_t timestamp);
+void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
+ CXLDCEventType type,
+ CXLDCExtentRaw extents[],
+ uint32_t ext_count);
#endif
diff --git a/hw/cxl/cxl-events.c b/hw/cxl/cxl-events.c
index 12dee2e467..724055f2cf 100644
--- a/hw/cxl/cxl-events.c
+++ b/hw/cxl/cxl-events.c
@@ -260,3 +260,41 @@ void cxl_event_irq_assert(CXLType3Dev *ct3d)
}
}
}
+
+void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
+ CXLDCEventType type,
+ CXLDCExtentRaw extents[],
+ uint32_t ext_count)
+{
+ CXLEventDynamicCapacity event_rec = {};
+ int i;
+
+ cxl_assign_event_header(&event_rec.hdr,
+ &dynamic_capacity_uuid,
+ (1 << CXL_EVENT_TYPE_INFO),
+ sizeof(event_rec),
+ cxl_device_get_timestamp(&ct3d->cxl_dstate));
+ event_rec.type = type;
+ event_rec.validity_flags = 1;
+ event_rec.host_id = 0;
+ event_rec.updated_region_id = 0;
+ event_rec.extents_avail = CXL_NUM_EXTENTS_SUPPORTED -
+ ct3d->dc.total_extent_count;
+
+ for (i = 0; i < ext_count; i++) {
+ memcpy(&event_rec.dynamic_capacity_extent,
+ &extents[i],
+ sizeof(CXLDCExtentRaw));
+ event_rec.flags = 0;
+ if (i < ext_count - 1) {
+ /* Set "More" flag */
+ event_rec.flags |= BIT(0);
+ }
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&event_rec)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ }
+}
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 24e4ba0200..d0a1d63582 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -27,7 +27,6 @@
#define CXL_CAPACITY_MULTIPLIER (256 * MiB)
#define CXL_DC_EVENT_LOG_SIZE 8
-#define CXL_NUM_EXTENTS_SUPPORTED 512
#define CXL_NUM_TAGS_SUPPORTED 0
#define CXL_ALERTS_LIFE_USED_WARN_THRESH (1 << 0)
#define CXL_ALERTS_OVER_TEMP_WARN_THRESH (1 << 1)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index ee554a77be..9c2b9d197b 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1957,15 +1957,11 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
CxlDynamicCapacityExtentList *records, Error **errp)
{
Object *obj;
- CXLEventDynamicCapacity dCap = {};
- CXLEventRecordHdr *hdr = &dCap.hdr;
CXLType3Dev *dcd;
- uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
uint32_t num_extents = 0;
CxlDynamicCapacityExtentList *list;
CXLDCExtentGroup *group = NULL;
g_autofree CXLDCExtentRaw *extents = NULL;
- uint8_t enc_log = CXL_EVENT_TYPE_DYNAMIC_CAP;
uint64_t dpa, offset, len, block_size;
g_autofree unsigned long *blk_bitmap = NULL;
int i;
@@ -2078,38 +2074,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
dcd->dc.total_extent_count += num_extents;
}
- /*
- * CXL r3.1 section 8.2.9.2.1.6: Dynamic Capacity Event Record
- *
- * All Dynamic Capacity event records shall set the Event Record Severity
- * field in the Common Event Record Format to Informational Event. All
- * Dynamic Capacity related events shall be logged in the Dynamic Capacity
- * Event Log.
- */
- cxl_assign_event_header(hdr, &dynamic_capacity_uuid, flags, sizeof(dCap),
- cxl_device_get_timestamp(&dcd->cxl_dstate));
-
- dCap.type = type;
- /* FIXME: for now, validity flag is cleared */
- dCap.validity_flags = 0;
- stw_le_p(&dCap.host_id, hid);
- /* only valid for DC_REGION_CONFIG_UPDATED event */
- dCap.updated_region_id = 0;
- for (i = 0; i < num_extents; i++) {
- memcpy(&dCap.dynamic_capacity_extent, &extents[i],
- sizeof(CXLDCExtentRaw));
-
- dCap.flags = 0;
- if (i < num_extents - 1) {
- /* Set "More" flag */
- dCap.flags |= BIT(0);
- }
-
- if (cxl_event_insert(&dcd->cxl_dstate, enc_log,
- (CXLEventRecordRaw *)&dCap)) {
- cxl_event_irq_assert(dcd);
- }
- }
+ cxl_create_dc_event_records_for_extents(dcd, type, extents, num_extents);
}
void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH qemu 09/11] hw/cxl: Create helper function to create DC Event Records from extents
2025-07-02 16:02 ` [PATCH qemu 09/11] hw/cxl: Create helper function to create DC Event Records from extents Jonathan Cameron via
@ 2025-07-03 16:21 ` Fan Ni
0 siblings, 0 replies; 24+ messages in thread
From: Fan Ni @ 2025-07-03 16:21 UTC (permalink / raw)
To: Jonathan Cameron; +Cc: qemu-devel, Michael Tsirkin, linux-cxl, linuxarm
On Wed, Jul 02, 2025 at 05:02:15PM +0100, Jonathan Cameron wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> Prepatory patch for following FMAPI Add/Release Patches. Refactors part
> of qmp_cxl_process_dynamic_capacity_prescriptive() into a helper
> function to create DC Event Records and insert in the event log.
>
> Moves definition for CXL_NUM_EXTENTS_SUPPORTED to cxl.h so it can be
> accessed by cxl-mailbox-utils.c and cxl-events.c, where the helper
> function is defined.
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> include/hw/cxl/cxl.h | 1 +
> include/hw/cxl/cxl_device.h | 4 ++++
> hw/cxl/cxl-events.c | 38 +++++++++++++++++++++++++++++++++++++
> hw/cxl/cxl-mailbox-utils.c | 1 -
> hw/mem/cxl_type3.c | 37 +-----------------------------------
> 5 files changed, 44 insertions(+), 37 deletions(-)
>
> diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
> index 75e47b6864..3ae4303383 100644
> --- a/include/hw/cxl/cxl.h
> +++ b/include/hw/cxl/cxl.h
> @@ -23,6 +23,7 @@
> #define CXL_DEVICE_REG_BAR_IDX 2
>
> #define CXL_WINDOW_MAX 10
> +#define CXL_NUM_EXTENTS_SUPPORTED 512
>
> typedef struct PXBCXLDev PXBCXLDev;
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index 76af75d2d0..ed91e5387e 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -724,4 +724,8 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d, uint64_t dpa,
> void cxl_assign_event_header(CXLEventRecordHdr *hdr,
> const QemuUUID *uuid, uint32_t flags,
> uint8_t length, uint64_t timestamp);
> +void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> + CXLDCEventType type,
> + CXLDCExtentRaw extents[],
> + uint32_t ext_count);
> #endif
> diff --git a/hw/cxl/cxl-events.c b/hw/cxl/cxl-events.c
> index 12dee2e467..724055f2cf 100644
> --- a/hw/cxl/cxl-events.c
> +++ b/hw/cxl/cxl-events.c
> @@ -260,3 +260,41 @@ void cxl_event_irq_assert(CXLType3Dev *ct3d)
> }
> }
> }
> +
> +void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> + CXLDCEventType type,
> + CXLDCExtentRaw extents[],
> + uint32_t ext_count)
> +{
> + CXLEventDynamicCapacity event_rec = {};
> + int i;
> +
> + cxl_assign_event_header(&event_rec.hdr,
> + &dynamic_capacity_uuid,
> + (1 << CXL_EVENT_TYPE_INFO),
> + sizeof(event_rec),
> + cxl_device_get_timestamp(&ct3d->cxl_dstate));
> + event_rec.type = type;
> + event_rec.validity_flags = 1;
> + event_rec.host_id = 0;
> + event_rec.updated_region_id = 0;
> + event_rec.extents_avail = CXL_NUM_EXTENTS_SUPPORTED -
> + ct3d->dc.total_extent_count;
> +
> + for (i = 0; i < ext_count; i++) {
> + memcpy(&event_rec.dynamic_capacity_extent,
> + &extents[i],
> + sizeof(CXLDCExtentRaw));
> + event_rec.flags = 0;
> + if (i < ext_count - 1) {
> + /* Set "More" flag */
> + event_rec.flags |= BIT(0);
> + }
> +
> + if (cxl_event_insert(&ct3d->cxl_dstate,
> + CXL_EVENT_TYPE_DYNAMIC_CAP,
> + (CXLEventRecordRaw *)&event_rec)) {
> + cxl_event_irq_assert(ct3d);
> + }
> + }
> +}
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 24e4ba0200..d0a1d63582 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -27,7 +27,6 @@
>
> #define CXL_CAPACITY_MULTIPLIER (256 * MiB)
> #define CXL_DC_EVENT_LOG_SIZE 8
> -#define CXL_NUM_EXTENTS_SUPPORTED 512
> #define CXL_NUM_TAGS_SUPPORTED 0
> #define CXL_ALERTS_LIFE_USED_WARN_THRESH (1 << 0)
> #define CXL_ALERTS_OVER_TEMP_WARN_THRESH (1 << 1)
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index ee554a77be..9c2b9d197b 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1957,15 +1957,11 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
> CxlDynamicCapacityExtentList *records, Error **errp)
> {
> Object *obj;
> - CXLEventDynamicCapacity dCap = {};
> - CXLEventRecordHdr *hdr = &dCap.hdr;
> CXLType3Dev *dcd;
> - uint8_t flags = 1 << CXL_EVENT_TYPE_INFO;
> uint32_t num_extents = 0;
> CxlDynamicCapacityExtentList *list;
> CXLDCExtentGroup *group = NULL;
> g_autofree CXLDCExtentRaw *extents = NULL;
> - uint8_t enc_log = CXL_EVENT_TYPE_DYNAMIC_CAP;
> uint64_t dpa, offset, len, block_size;
> g_autofree unsigned long *blk_bitmap = NULL;
> int i;
> @@ -2078,38 +2074,7 @@ static void qmp_cxl_process_dynamic_capacity_prescriptive(const char *path,
> dcd->dc.total_extent_count += num_extents;
> }
>
> - /*
> - * CXL r3.1 section 8.2.9.2.1.6: Dynamic Capacity Event Record
> - *
> - * All Dynamic Capacity event records shall set the Event Record Severity
> - * field in the Common Event Record Format to Informational Event. All
> - * Dynamic Capacity related events shall be logged in the Dynamic Capacity
> - * Event Log.
> - */
> - cxl_assign_event_header(hdr, &dynamic_capacity_uuid, flags, sizeof(dCap),
> - cxl_device_get_timestamp(&dcd->cxl_dstate));
> -
> - dCap.type = type;
> - /* FIXME: for now, validity flag is cleared */
> - dCap.validity_flags = 0;
> - stw_le_p(&dCap.host_id, hid);
> - /* only valid for DC_REGION_CONFIG_UPDATED event */
> - dCap.updated_region_id = 0;
> - for (i = 0; i < num_extents; i++) {
> - memcpy(&dCap.dynamic_capacity_extent, &extents[i],
> - sizeof(CXLDCExtentRaw));
> -
> - dCap.flags = 0;
> - if (i < num_extents - 1) {
> - /* Set "More" flag */
> - dCap.flags |= BIT(0);
> - }
> -
> - if (cxl_event_insert(&dcd->cxl_dstate, enc_log,
> - (CXLEventRecordRaw *)&dCap)) {
> - cxl_event_irq_assert(dcd);
> - }
> - }
> + cxl_create_dc_event_records_for_extents(dcd, type, extents, num_extents);
> }
>
> void qmp_cxl_add_dynamic_capacity(const char *path, uint16_t host_id,
> --
> 2.48.1
>
--
Fan Ni (From gmail)
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH qemu 10/11] hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (8 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 09/11] hw/cxl: Create helper function to create DC Event Records from extents Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-03 16:23 ` Fan Ni
2025-07-02 16:02 ` [PATCH qemu 11/11] hw/cxl: mailbox-utils: 0x5605 - FMAPI Initiate DC Release Jonathan Cameron via
10 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
include/hw/cxl/cxl_device.h | 4 ++
hw/cxl/cxl-mailbox-utils.c | 109 ++++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 8 +--
3 files changed, 117 insertions(+), 4 deletions(-)
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index ed91e5387e..fdee60b977 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -728,4 +728,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
CXLDCEventType type,
CXLDCExtentRaw extents[],
uint32_t ext_count);
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len);
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len);
#endif
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index d0a1d63582..5ea0d07808 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -122,6 +122,7 @@ enum {
#define GET_HOST_DC_REGION_CONFIG 0x1
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
+ #define INITIATE_DC_ADD 0x4
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3542,6 +3543,107 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/*
+ * Helper function to convert CXLDCExtentRaw to CXLUpdateDCExtentListInPl
+ * in order to reuse cxl_detect_malformed_extent_list() function which accepts
+ * CXLUpdateDCExtentListInPl as a parameter.
+ */
+static void convert_raw_extents(CXLDCExtentRaw raw_extents[],
+ CXLUpdateDCExtentListInPl *extent_list,
+ int count)
+{
+ int i;
+
+ extent_list->num_entries_updated = count;
+
+ for (i = 0; i < count; i++) {
+ extent_list->updated_entries[i].start_dpa = raw_extents[i].start_dpa;
+ extent_list->updated_entries[i].len = raw_extents[i].len;
+ }
+}
+
+/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
+static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t selection_policy;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ int i, rc;
+
+ switch (in->selection_policy) {
+ case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {
+ /* Adding extents exceeds device's extent tracking ability. */
+ if (in->ext_count + ct3d->dc.total_extent_count >
+ CXL_NUM_EXTENTS_SUPPORTED) {
+ return CXL_MBOX_RESOURCES_EXHAUSTED;
+ }
+
+ g_autofree CXLUpdateDCExtentListInPl *list =
+ g_malloc0(sizeof(*list) +
+ in->ext_count * sizeof(*list->updated_entries));
+
+ convert_raw_extents(in->extents, list, in->ext_count);
+ rc = cxl_detect_malformed_extent_list(ct3d, list);
+
+ for (i = 0; i < in->ext_count; i++) {
+ CXLDCExtentRaw *ext = &in->extents[i];
+
+ /* Check requested extents do not overlap with pending ones. */
+ if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
+ ext->start_dpa,
+ ext->len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ /* Check requested extents do not overlap with existing ones. */
+ if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents,
+ ext->start_dpa,
+ ext->len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ }
+
+ if (rc) {
+ return rc;
+ }
+
+ CXLDCExtentGroup *group = NULL;
+ for (i = 0; i < in->ext_count; i++) {
+ CXLDCExtentRaw *ext = &in->extents[i];
+
+ group = cxl_insert_extent_to_extent_group(group, ext->start_dpa,
+ ext->len, ext->tag,
+ ext->shared_seq);
+ }
+
+ cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
+ ct3d->dc.total_extent_count += in->ext_count;
+ cxl_create_dc_event_records_for_extents(ct3d,
+ DC_EVENT_ADD_CAPACITY,
+ in->extents,
+ in->ext_count);
+
+ return CXL_MBOX_SUCCESS;
+ }
+ default: {
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent selection policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+ }
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3669,6 +3771,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
[FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
cmd_fm_get_dc_region_extent_list, 12, 0 },
+ [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
+ cmd_fm_initiate_dc_add, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 9c2b9d197b..7676d785c2 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1885,8 +1885,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
* the list.
* Return value: return true if has overlaps; otherwise, return false
*/
-static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtent *ent;
Range range1, range2;
@@ -1931,8 +1931,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
return false;
}
-static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtentGroup *group;
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH qemu 10/11] hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-07-02 16:02 ` [PATCH qemu 10/11] hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add Jonathan Cameron via
@ 2025-07-03 16:23 ` Fan Ni
2025-07-04 8:12 ` Jonathan Cameron via
0 siblings, 1 reply; 24+ messages in thread
From: Fan Ni @ 2025-07-03 16:23 UTC (permalink / raw)
To: Jonathan Cameron; +Cc: qemu-devel, Michael Tsirkin, linux-cxl, linuxarm
On Wed, Jul 02, 2025 at 05:02:16PM +0100, Jonathan Cameron wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Only a minor comment inline ...
> ---
> include/hw/cxl/cxl_device.h | 4 ++
> hw/cxl/cxl-mailbox-utils.c | 109 ++++++++++++++++++++++++++++++++++++
> hw/mem/cxl_type3.c | 8 +--
> 3 files changed, 117 insertions(+), 4 deletions(-)
>
> diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> index ed91e5387e..fdee60b977 100644
> --- a/include/hw/cxl/cxl_device.h
> +++ b/include/hw/cxl/cxl_device.h
> @@ -728,4 +728,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> CXLDCEventType type,
> CXLDCExtentRaw extents[],
> uint32_t ext_count);
> +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> + uint64_t dpa, uint64_t len);
> +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> + uint64_t dpa, uint64_t len);
> #endif
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index d0a1d63582..5ea0d07808 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -122,6 +122,7 @@ enum {
> #define GET_HOST_DC_REGION_CONFIG 0x1
> #define SET_DC_REGION_CONFIG 0x2
> #define GET_DC_REGION_EXTENT_LIST 0x3
> + #define INITIATE_DC_ADD 0x4
> };
>
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> @@ -3542,6 +3543,107 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
> return CXL_MBOX_SUCCESS;
> }
>
> +/*
> + * Helper function to convert CXLDCExtentRaw to CXLUpdateDCExtentListInPl
> + * in order to reuse cxl_detect_malformed_extent_list() function which accepts
> + * CXLUpdateDCExtentListInPl as a parameter.
> + */
> +static void convert_raw_extents(CXLDCExtentRaw raw_extents[],
> + CXLUpdateDCExtentListInPl *extent_list,
> + int count)
> +{
> + int i;
> +
> + extent_list->num_entries_updated = count;
> +
> + for (i = 0; i < count; i++) {
> + extent_list->updated_entries[i].start_dpa = raw_extents[i].start_dpa;
> + extent_list->updated_entries[i].len = raw_extents[i].len;
> + }
> +}
> +
> +/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
/* CXL r3.2 Section 7.6.7.6.5: Initiate Dynamic Capacity Add (Opcode 5604h) */
Fan
> +static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t selection_policy;
> + uint8_t reg_num;
> + uint64_t length;
> + uint8_t tag[0x10];
> + uint32_t ext_count;
> + CXLDCExtentRaw extents[];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + int i, rc;
> +
> + switch (in->selection_policy) {
> + case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {
> + /* Adding extents exceeds device's extent tracking ability. */
> + if (in->ext_count + ct3d->dc.total_extent_count >
> + CXL_NUM_EXTENTS_SUPPORTED) {
> + return CXL_MBOX_RESOURCES_EXHAUSTED;
> + }
> +
> + g_autofree CXLUpdateDCExtentListInPl *list =
> + g_malloc0(sizeof(*list) +
> + in->ext_count * sizeof(*list->updated_entries));
> +
> + convert_raw_extents(in->extents, list, in->ext_count);
> + rc = cxl_detect_malformed_extent_list(ct3d, list);
> +
> + for (i = 0; i < in->ext_count; i++) {
> + CXLDCExtentRaw *ext = &in->extents[i];
> +
> + /* Check requested extents do not overlap with pending ones. */
> + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
> + ext->start_dpa,
> + ext->len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + /* Check requested extents do not overlap with existing ones. */
> + if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents,
> + ext->start_dpa,
> + ext->len)) {
> + return CXL_MBOX_INVALID_EXTENT_LIST;
> + }
> + }
> +
> + if (rc) {
> + return rc;
> + }
> +
> + CXLDCExtentGroup *group = NULL;
> + for (i = 0; i < in->ext_count; i++) {
> + CXLDCExtentRaw *ext = &in->extents[i];
> +
> + group = cxl_insert_extent_to_extent_group(group, ext->start_dpa,
> + ext->len, ext->tag,
> + ext->shared_seq);
> + }
> +
> + cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
> + ct3d->dc.total_extent_count += in->ext_count;
> + cxl_create_dc_event_records_for_extents(ct3d,
> + DC_EVENT_ADD_CAPACITY,
> + in->extents,
> + in->ext_count);
> +
> + return CXL_MBOX_SUCCESS;
> + }
> + default: {
> + qemu_log_mask(LOG_UNIMP,
> + "CXL extent selection policy not supported.\n");
> + return CXL_MBOX_INVALID_INPUT;
> + }
> + }
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3669,6 +3771,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
> cmd_fm_get_dc_region_extent_list, 12, 0 },
> + [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
> + cmd_fm_initiate_dc_add, ~0,
> + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> };
>
> /*
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 9c2b9d197b..7676d785c2 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -1885,8 +1885,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
> * the list.
> * Return value: return true if has overlaps; otherwise, return false
> */
> -static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> - uint64_t dpa, uint64_t len)
> +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> + uint64_t dpa, uint64_t len)
> {
> CXLDCExtent *ent;
> Range range1, range2;
> @@ -1931,8 +1931,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
> return false;
> }
>
> -static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> - uint64_t dpa, uint64_t len)
> +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> + uint64_t dpa, uint64_t len)
> {
> CXLDCExtentGroup *group;
>
> --
> 2.48.1
>
--
Fan Ni (From gmail)
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [PATCH qemu 10/11] hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add
2025-07-03 16:23 ` Fan Ni
@ 2025-07-04 8:12 ` Jonathan Cameron via
0 siblings, 0 replies; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-04 8:12 UTC (permalink / raw)
To: Fan Ni; +Cc: qemu-devel, Michael Tsirkin, linux-cxl, linuxarm
On Thu, 3 Jul 2025 16:23:57 +0000
Fan Ni <nifan.cxl@gmail.com> wrote:
> On Wed, Jul 02, 2025 at 05:02:16PM +0100, Jonathan Cameron wrote:
> > From: Anisa Su <anisa.su@samsung.com>
> >
> > FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
> >
> > Signed-off-by: Anisa Su <anisa.su@samsung.com>
> > Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
>
> Reviewed-by: Fan Ni <fan.ni@samsung.com>
>
> Only a minor comment inline ...
Thanks!
Michael, I'll let these sit for a little while but if it is helpful
for you if I do a v2 with the colon added just let me know.
Jonathan
> > ---
> > include/hw/cxl/cxl_device.h | 4 ++
> > hw/cxl/cxl-mailbox-utils.c | 109 ++++++++++++++++++++++++++++++++++++
> > hw/mem/cxl_type3.c | 8 +--
> > 3 files changed, 117 insertions(+), 4 deletions(-)
> >
> > diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
> > index ed91e5387e..fdee60b977 100644
> > --- a/include/hw/cxl/cxl_device.h
> > +++ b/include/hw/cxl/cxl_device.h
> > @@ -728,4 +728,8 @@ void cxl_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
> > CXLDCEventType type,
> > CXLDCExtentRaw extents[],
> > uint32_t ext_count);
> > +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> > + uint64_t dpa, uint64_t len);
> > +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> > + uint64_t dpa, uint64_t len);
> > #endif
> > diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> > index d0a1d63582..5ea0d07808 100644
> > --- a/hw/cxl/cxl-mailbox-utils.c
> > +++ b/hw/cxl/cxl-mailbox-utils.c
> > @@ -122,6 +122,7 @@ enum {
> > #define GET_HOST_DC_REGION_CONFIG 0x1
> > #define SET_DC_REGION_CONFIG 0x2
> > #define GET_DC_REGION_EXTENT_LIST 0x3
> > + #define INITIATE_DC_ADD 0x4
> > };
> >
> > /* CCI Message Format CXL r3.1 Figure 7-19 */
> > @@ -3542,6 +3543,107 @@ static CXLRetCode cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
> > return CXL_MBOX_SUCCESS;
> > }
> >
> > +/*
> > + * Helper function to convert CXLDCExtentRaw to CXLUpdateDCExtentListInPl
> > + * in order to reuse cxl_detect_malformed_extent_list() function which accepts
> > + * CXLUpdateDCExtentListInPl as a parameter.
> > + */
> > +static void convert_raw_extents(CXLDCExtentRaw raw_extents[],
> > + CXLUpdateDCExtentListInPl *extent_list,
> > + int count)
> > +{
> > + int i;
> > +
> > + extent_list->num_entries_updated = count;
> > +
> > + for (i = 0; i < count; i++) {
> > + extent_list->updated_entries[i].start_dpa = raw_extents[i].start_dpa;
> > + extent_list->updated_entries[i].len = raw_extents[i].len;
> > + }
> > +}
> > +
> > +/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
>
> /* CXL r3.2 Section 7.6.7.6.5: Initiate Dynamic Capacity Add (Opcode 5604h) */
>
> Fan
>
> > +static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> > + uint8_t *payload_in,
> > + size_t len_in,
> > + uint8_t *payload_out,
> > + size_t *len_out,
> > + CXLCCI *cci)
> > +{
> > + struct {
> > + uint16_t host_id;
> > + uint8_t selection_policy;
> > + uint8_t reg_num;
> > + uint64_t length;
> > + uint8_t tag[0x10];
> > + uint32_t ext_count;
> > + CXLDCExtentRaw extents[];
> > + } QEMU_PACKED *in = (void *)payload_in;
> > + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> > + int i, rc;
> > +
> > + switch (in->selection_policy) {
> > + case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE: {
> > + /* Adding extents exceeds device's extent tracking ability. */
> > + if (in->ext_count + ct3d->dc.total_extent_count >
> > + CXL_NUM_EXTENTS_SUPPORTED) {
> > + return CXL_MBOX_RESOURCES_EXHAUSTED;
> > + }
> > +
> > + g_autofree CXLUpdateDCExtentListInPl *list =
> > + g_malloc0(sizeof(*list) +
> > + in->ext_count * sizeof(*list->updated_entries));
> > +
> > + convert_raw_extents(in->extents, list, in->ext_count);
> > + rc = cxl_detect_malformed_extent_list(ct3d, list);
> > +
> > + for (i = 0; i < in->ext_count; i++) {
> > + CXLDCExtentRaw *ext = &in->extents[i];
> > +
> > + /* Check requested extents do not overlap with pending ones. */
> > + if (cxl_extent_groups_overlaps_dpa_range(&ct3d->dc.extents_pending,
> > + ext->start_dpa,
> > + ext->len)) {
> > + return CXL_MBOX_INVALID_EXTENT_LIST;
> > + }
> > + /* Check requested extents do not overlap with existing ones. */
> > + if (cxl_extents_overlaps_dpa_range(&ct3d->dc.extents,
> > + ext->start_dpa,
> > + ext->len)) {
> > + return CXL_MBOX_INVALID_EXTENT_LIST;
> > + }
> > + }
> > +
> > + if (rc) {
> > + return rc;
> > + }
> > +
> > + CXLDCExtentGroup *group = NULL;
> > + for (i = 0; i < in->ext_count; i++) {
> > + CXLDCExtentRaw *ext = &in->extents[i];
> > +
> > + group = cxl_insert_extent_to_extent_group(group, ext->start_dpa,
> > + ext->len, ext->tag,
> > + ext->shared_seq);
> > + }
> > +
> > + cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
> > + ct3d->dc.total_extent_count += in->ext_count;
> > + cxl_create_dc_event_records_for_extents(ct3d,
> > + DC_EVENT_ADD_CAPACITY,
> > + in->extents,
> > + in->ext_count);
> > +
> > + return CXL_MBOX_SUCCESS;
> > + }
> > + default: {
> > + qemu_log_mask(LOG_UNIMP,
> > + "CXL extent selection policy not supported.\n");
> > + return CXL_MBOX_INVALID_INPUT;
> > + }
> > + }
> > +}
> > +
> > static const struct cxl_cmd cxl_cmd_set[256][256] = {
> > [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> > cmd_infostat_bg_op_abort, 0, 0 },
> > @@ -3669,6 +3771,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> > CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> > [FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = { "GET_DC_REGION_EXTENT_LIST",
> > cmd_fm_get_dc_region_extent_list, 12, 0 },
> > + [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
> > + cmd_fm_initiate_dc_add, ~0,
> > + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> > + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> > + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> > + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> > + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> > };
> >
> > /*
> > diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> > index 9c2b9d197b..7676d785c2 100644
> > --- a/hw/mem/cxl_type3.c
> > +++ b/hw/mem/cxl_type3.c
> > @@ -1885,8 +1885,8 @@ void qmp_cxl_inject_memory_module_event(const char *path, CxlEventLog log,
> > * the list.
> > * Return value: return true if has overlaps; otherwise, return false
> > */
> > -static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> > - uint64_t dpa, uint64_t len)
> > +bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
> > + uint64_t dpa, uint64_t len)
> > {
> > CXLDCExtent *ent;
> > Range range1, range2;
> > @@ -1931,8 +1931,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
> > return false;
> > }
> >
> > -static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> > - uint64_t dpa, uint64_t len)
> > +bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
> > + uint64_t dpa, uint64_t len)
> > {
> > CXLDCExtentGroup *group;
> >
> > --
> > 2.48.1
> >
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH qemu 11/11] hw/cxl: mailbox-utils: 0x5605 - FMAPI Initiate DC Release
2025-07-02 16:02 [PATCH qemu 00/11] hw/cxl: DCD Fabric Management Command Set (for 10.1) Jonathan Cameron via
` (9 preceding siblings ...)
2025-07-02 16:02 ` [PATCH qemu 10/11] hw/cxl: mailbox-utils: 0x5604 - FMAPI Initiate DC Add Jonathan Cameron via
@ 2025-07-02 16:02 ` Jonathan Cameron via
2025-07-03 16:24 ` Fan Ni
10 siblings, 1 reply; 24+ messages in thread
From: Jonathan Cameron via @ 2025-07-02 16:02 UTC (permalink / raw)
To: qemu-devel, Michael Tsirkin, Fan Ni; +Cc: linux-cxl, linuxarm
From: Anisa Su <anisa.su@samsung.com>
FM DCD Management command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
Signed-off-by: Anisa Su <anisa.su@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
---
hw/cxl/cxl-mailbox-utils.c | 88 ++++++++++++++++++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index 5ea0d07808..43a0d503aa 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -123,6 +123,7 @@ enum {
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
#define INITIATE_DC_ADD 0x4
+ #define INITIATE_DC_RELEASE 0x5
};
/* CCI Message Format CXL r3.1 Figure 7-19 */
@@ -3644,6 +3645,86 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
}
}
+#define CXL_EXTENT_REMOVAL_POLICY_MASK 0x0F
+#define CXL_FORCED_REMOVAL_MASK (1 << 4)
+/*
+ * CXL r3.2 Section 7.6.7.6.6:
+ * Initiate Dynamic Capacity Release (Opcode 5605h)
+ */
+static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t flags;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ int i, rc;
+
+ switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {
+ case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE: {
+ CXLDCExtentList updated_list;
+ uint32_t updated_list_size;
+ g_autofree CXLUpdateDCExtentListInPl *list =
+ g_malloc0(sizeof(*list) +
+ in->ext_count * sizeof(*list->updated_entries));
+
+ convert_raw_extents(in->extents, list, in->ext_count);
+ rc = cxl_detect_malformed_extent_list(ct3d, list);
+ if (rc) {
+ return rc;
+ }
+
+ /*
+ * Fail with Invalid PA if an extent is pending and Forced Removal
+ * flag not set.
+ */
+ if (!(in->flags & CXL_FORCED_REMOVAL_MASK)) {
+ for (i = 0; i < in->ext_count; i++) {
+ CXLDCExtentRaw ext = in->extents[i];
+ /*
+ * Check requested extents don't overlap with pending
+ * extents.
+ */
+ if (cxl_extent_groups_overlaps_dpa_range(
+ &ct3d->dc.extents_pending,
+ ext.start_dpa,
+ ext.len)) {
+ return CXL_MBOX_INVALID_PA;
+ }
+ }
+ }
+
+ rc = cxl_dc_extent_release_dry_run(ct3d,
+ list,
+ &updated_list,
+ &updated_list_size);
+ if (rc) {
+ return rc;
+ }
+ cxl_create_dc_event_records_for_extents(ct3d,
+ DC_EVENT_RELEASE_CAPACITY,
+ in->extents,
+ in->ext_count);
+ return CXL_MBOX_SUCCESS;
+ }
+ default: {
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent removal policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+ }
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3778,6 +3859,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
+ [FMAPI_DCD_MGMT][INITIATE_DC_RELEASE] = { "INIT_DC_RELEASE",
+ cmd_fm_initiate_dc_release, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
--
2.48.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [PATCH qemu 11/11] hw/cxl: mailbox-utils: 0x5605 - FMAPI Initiate DC Release
2025-07-02 16:02 ` [PATCH qemu 11/11] hw/cxl: mailbox-utils: 0x5605 - FMAPI Initiate DC Release Jonathan Cameron via
@ 2025-07-03 16:24 ` Fan Ni
0 siblings, 0 replies; 24+ messages in thread
From: Fan Ni @ 2025-07-03 16:24 UTC (permalink / raw)
To: Jonathan Cameron; +Cc: qemu-devel, Michael Tsirkin, linux-cxl, linuxarm
On Wed, Jul 02, 2025 at 05:02:17PM +0100, Jonathan Cameron wrote:
> From: Anisa Su <anisa.su@samsung.com>
>
> FM DCD Management command 0x5605 implemented per CXL r3.2 Spec Section 7.6.7.6.6
>
> Signed-off-by: Anisa Su <anisa.su@samsung.com>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> hw/cxl/cxl-mailbox-utils.c | 88 ++++++++++++++++++++++++++++++++++++++
> 1 file changed, 88 insertions(+)
>
> diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
> index 5ea0d07808..43a0d503aa 100644
> --- a/hw/cxl/cxl-mailbox-utils.c
> +++ b/hw/cxl/cxl-mailbox-utils.c
> @@ -123,6 +123,7 @@ enum {
> #define SET_DC_REGION_CONFIG 0x2
> #define GET_DC_REGION_EXTENT_LIST 0x3
> #define INITIATE_DC_ADD 0x4
> + #define INITIATE_DC_RELEASE 0x5
> };
>
> /* CCI Message Format CXL r3.1 Figure 7-19 */
> @@ -3644,6 +3645,86 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
> }
> }
>
> +#define CXL_EXTENT_REMOVAL_POLICY_MASK 0x0F
> +#define CXL_FORCED_REMOVAL_MASK (1 << 4)
> +/*
> + * CXL r3.2 Section 7.6.7.6.6:
> + * Initiate Dynamic Capacity Release (Opcode 5605h)
> + */
> +static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
> + uint8_t *payload_in,
> + size_t len_in,
> + uint8_t *payload_out,
> + size_t *len_out,
> + CXLCCI *cci)
> +{
> + struct {
> + uint16_t host_id;
> + uint8_t flags;
> + uint8_t reg_num;
> + uint64_t length;
> + uint8_t tag[0x10];
> + uint32_t ext_count;
> + CXLDCExtentRaw extents[];
> + } QEMU_PACKED *in = (void *)payload_in;
> + CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
> + int i, rc;
> +
> + switch (in->flags & CXL_EXTENT_REMOVAL_POLICY_MASK) {
> + case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE: {
> + CXLDCExtentList updated_list;
> + uint32_t updated_list_size;
> + g_autofree CXLUpdateDCExtentListInPl *list =
> + g_malloc0(sizeof(*list) +
> + in->ext_count * sizeof(*list->updated_entries));
> +
> + convert_raw_extents(in->extents, list, in->ext_count);
> + rc = cxl_detect_malformed_extent_list(ct3d, list);
> + if (rc) {
> + return rc;
> + }
> +
> + /*
> + * Fail with Invalid PA if an extent is pending and Forced Removal
> + * flag not set.
> + */
> + if (!(in->flags & CXL_FORCED_REMOVAL_MASK)) {
> + for (i = 0; i < in->ext_count; i++) {
> + CXLDCExtentRaw ext = in->extents[i];
> + /*
> + * Check requested extents don't overlap with pending
> + * extents.
> + */
> + if (cxl_extent_groups_overlaps_dpa_range(
> + &ct3d->dc.extents_pending,
> + ext.start_dpa,
> + ext.len)) {
> + return CXL_MBOX_INVALID_PA;
> + }
> + }
> + }
> +
> + rc = cxl_dc_extent_release_dry_run(ct3d,
> + list,
> + &updated_list,
> + &updated_list_size);
> + if (rc) {
> + return rc;
> + }
> + cxl_create_dc_event_records_for_extents(ct3d,
> + DC_EVENT_RELEASE_CAPACITY,
> + in->extents,
> + in->ext_count);
> + return CXL_MBOX_SUCCESS;
> + }
> + default: {
> + qemu_log_mask(LOG_UNIMP,
> + "CXL extent removal policy not supported.\n");
> + return CXL_MBOX_INVALID_INPUT;
> + }
> + }
> +}
> +
> static const struct cxl_cmd cxl_cmd_set[256][256] = {
> [INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
> cmd_infostat_bg_op_abort, 0, 0 },
> @@ -3778,6 +3859,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
> CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> + [FMAPI_DCD_MGMT][INITIATE_DC_RELEASE] = { "INIT_DC_RELEASE",
> + cmd_fm_initiate_dc_release, ~0,
> + (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
> + CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
> + CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
> + CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
> };
>
> /*
> --
> 2.48.1
>
--
Fan Ni (From gmail)
^ permalink raw reply [flat|nested] 24+ messages in thread