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From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>
Subject: [PATCH v1 12/21] hw/arm/ast27x0: Add DRAM alias for TSP SDRAM remap and update realization order
Date: Thu, 17 Jul 2025 11:40:40 +0800	[thread overview]
Message-ID: <20250717034054.1903991-13-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250717034054.1903991-1-jamin_lin@aspeedtech.com>

This commit adds a MemoryRegion alias to support PSP access to
TSP SDRAM through shared memory remapping, as defined by the default SCU
configuration.

The TSP coprocessor exposes one DRAM alias:
  - remap maps PSP DRAM at 0x42e000000 (32MB) to TSP SDRAM offset 0x0

This region corresponds to the default SCU register value, which controls
the mapping between PSP and coprocessor memory windows.

To ensure correctness, the alias is initialized early in
aspeed_soc_ast2700_realize(), before SCU and coprocessor realization.
This allows TSP to reference the alias region during its SDRAM setup.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 include/hw/arm/aspeed_soc.h | 1 +
 hw/arm/aspeed_ast27x0-tsp.c | 2 ++
 hw/arm/aspeed_ast27x0.c     | 9 +++++++++
 3 files changed, 12 insertions(+)

diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index d628a189c1..83e07582d2 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -153,6 +153,7 @@ struct Aspeed27x0TSPSoCState {
     MemoryRegion memory;
     MemoryRegion sram_mr_alias;
     MemoryRegion scu_mr_alias;
+    MemoryRegion sdram_remap_alias;
 
     ARMv7MState armv7m;
 };
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index 6b035e2612..4c3b18695e 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -187,6 +187,8 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
                                 AST2700_TSP_SDRAM_SIZE, errp)) {
         return;
     }
+    /* SDRAM remap alias used by PSP to access TSP SDRAM */
+    memory_region_add_subregion(&s->dram_container, 0, &a->sdram_remap_alias);
     memory_region_add_subregion(s->memory,
                                 sc->memmap[ASPEED_DEV_SDRAM],
                                 &s->dram_container);
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index be130db5e2..0f988eaa4d 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -812,6 +812,12 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
      *   - remap2 maps PSP DRAM at 0x42c000000 (size: 32MB) to SSP SDRAM
      *     offset 0x0
      *
+     * The TSP coprocessor uses one memory alias (remap) to access a shared
+     * region in the PSP DRAM:
+     *
+     *   - remap maps PSP DRAM at 0x42e000000 (size: 32MB) to TSP SDRAM
+     *     offset 0x0
+     *
      * These mappings correspond to the default values of the SCU registers:
      *
      * This configuration enables shared memory communication between the PSP
@@ -824,6 +830,9 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)
         memory_region_init_alias(&a->ssp.sdram_remap2_alias, OBJECT(a),
                                  "ssp.sdram.remap2", s->memory,
                                  0x42c000000ULL, 32 * MiB);
+        memory_region_init_alias(&a->tsp.sdram_remap_alias, OBJECT(a),
+                                 "tsp.sdram.remap", s->memory,
+                                 0x42e000000, 32 * MiB);
     }
     if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
         return;
-- 
2.43.0



  parent reply	other threads:[~2025-07-17  3:50 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-17  3:40 [PATCH v1 00/21] Control coprocessor reset for AST2700 Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 01/21] hw/arm/aspeed_ast27x0-fc: Support VBootRom Jamin Lin via
2025-09-02  6:01   ` [SPAM] " Cédric Le Goater
2025-09-02  8:28     ` Jamin Lin
2025-09-02 13:23       ` Cédric Le Goater
2025-09-03  5:19         ` Jamin Lin
2025-09-03  8:48           ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 02/21] hw/arm/ast27x0: Move SSP coprocessor initialization from machine to SoC leve Jamin Lin via
2025-09-02  6:20   ` [SPAM] " Cédric Le Goater
2025-09-02  7:27     ` Markus Armbruster
2025-09-02  8:49       ` Jamin Lin
2025-09-02  9:39         ` Markus Armbruster
2025-09-02  8:41     ` Jamin Lin
2025-09-02 13:24       ` Cédric Le Goater
2025-07-17  3:40 ` [PATCH v1 03/21] hw/arm/ast27x0: Move TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 04/21] hw/arm/aspeed_ast27x0-ssp: Switch SSP memory to SDRAM and use dram_container for remap support Jamin Lin via
2025-09-02  7:36   ` [SPAM] " Cédric Le Goater
2025-09-03  1:45     ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 05/21] hw/arm/aspeed_ast27x0-tsp: Switch TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 06/21] hw/arm/ast27x0: Add SRAM alias for SSP and ensure correct device realization order Jamin Lin via
2025-09-02  7:47   ` [SPAM] " Cédric Le Goater
2025-09-03  1:48     ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 07/21] hw/arm/ast27x0: Add SRAM alias for TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 08/21] hw/arm/ast27x0: Add SCU alias for SSP " Jamin Lin via
2025-09-02  8:09   ` [SPAM] " Cédric Le Goater
2025-09-23  8:31     ` Jamin Lin
2025-09-23 11:33       ` Cédric Le Goater
2025-09-24  6:03         ` Jamin Lin
2025-09-24 11:13           ` Cédric Le Goater
2025-09-25  2:32             ` Jamin Lin
2025-09-26  3:13               ` Jamin Lin
2025-09-26  7:44                 ` Cédric Le Goater
2025-07-17  3:40 ` [PATCH v1 09/21] hw/arm/ast27x0: Add SCU alias for TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 10/21] hw/arm/ast27x0: Move DRAM and SDMC initialization earlier to support memory aliasing Jamin Lin via
2025-09-02  7:51   ` [SPAM] " Cédric Le Goater
2025-09-03  1:50     ` Jamin Lin
2025-07-17  3:40 ` [PATCH v1 11/21] hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap and update realization order Jamin Lin via
2025-07-17  3:40 ` Jamin Lin via [this message]
2025-07-17  3:40 ` [PATCH v1 13/21] hw/arm/ast27x0: Start SSP in powered-off state to match hardware behavior Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 14/21] hw/arm/ast27x0: Start TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 15/21] hw/misc/aspeed_scu: Add SCU support for SSP SDRAM remap Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 16/21] hw/misc/aspeed_scu: Add SCU support for TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 17/21] hw/misc/aspeed_scu: Implement SSP reset and power-on control via SCU registers Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 18/21] hw/misc/aspeed_scu: Implement TSP " Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 19/21] pc-bios: Update AST27x0 vBootrom with SSP/TSP SCU initialization support Jamin Lin via
2025-07-22 15:21   ` [SPAM] " Cédric Le Goater
2025-07-23  2:42     ` Jamin Lin
2025-07-27 19:51   ` Michael Tokarev
2025-07-28  6:49     ` Cédric Le Goater
2025-07-28  7:02       ` Jamin Lin via
2025-07-28  7:11         ` Cédric Le Goater
2025-07-28  7:11         ` Michael Tokarev
2025-07-28  7:41           ` Jamin Lin via
2025-07-29  9:12             ` Cédric Le Goater
2025-07-30  1:47               ` Jamin Lin via
2025-07-30  4:59                 ` Cédric Le Goater
2025-07-28  8:32       ` Michael Tokarev
2025-07-28  8:40         ` Cédric Le Goater
2025-07-17  3:40 ` [PATCH v1 20/21] tests/function/aspeed: Replace manual loader with vbootrom for ast2700fc test Jamin Lin via
2025-07-17  3:40 ` [PATCH v1 21/21] docs: Add support vbootrom for ast2700fc Jamin Lin via
2025-07-17  5:22 ` [PATCH v1 00/21] Control coprocessor reset for AST2700 Jamin Lin

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