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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-458648f5ed9sm35552075e9.2.2025.07.23.06.52.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 23 Jul 2025 06:52:08 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, Mohamed Mediouni , Phil Dennis-Jordan , Roman Bolshakov , Peter Maydell , Paolo Bonzini , Alexander Graf , Mads Ynddal , Cameron Esfahani , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.1 v4 2/4] accel/hvf: Add hvf_arch_cpu_realize() stubs Date: Wed, 23 Jul 2025 15:51:54 +0200 Message-ID: <20250723135156.85426-3-philmd@linaro.org> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250723135156.85426-1-philmd@linaro.org> References: <20250723135156.85426-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Implement HVF AccelOpsClass::cpu_target_realize() hook as empty stubs. Target implementations will come separately. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/system/hvf_int.h | 2 ++ accel/hvf/hvf-accel-ops.c | 2 ++ target/arm/hvf/hvf.c | 5 +++++ target/i386/hvf/hvf.c | 5 +++++ 4 files changed, 14 insertions(+) diff --git a/include/system/hvf_int.h b/include/system/hvf_int.h index a3b06a3e75b..cbd59525e87 100644 --- a/include/system/hvf_int.h +++ b/include/system/hvf_int.h @@ -111,4 +111,6 @@ void hvf_arch_update_guest_debug(CPUState *cpu); */ bool hvf_arch_supports_guest_debug(void); +bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp); + #endif diff --git a/accel/hvf/hvf-accel-ops.c b/accel/hvf/hvf-accel-ops.c index d488d6afbac..6c9369388b8 100644 --- a/accel/hvf/hvf-accel-ops.c +++ b/accel/hvf/hvf-accel-ops.c @@ -373,6 +373,8 @@ static void hvf_accel_ops_class_init(ObjectClass *oc, const void *data) { AccelOpsClass *ops = ACCEL_OPS_CLASS(oc); + ops->cpu_target_realize = hvf_arch_cpu_realize; + ops->create_vcpu_thread = hvf_start_vcpu_thread; ops->kick_vcpu_thread = hvf_kick_vcpu_thread; ops->handle_interrupt = generic_handle_interrupt; diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c index bd6b5d11de8..7de770da4f3 100644 --- a/target/arm/hvf/hvf.c +++ b/target/arm/hvf/hvf.c @@ -1081,6 +1081,11 @@ int hvf_arch_init_vcpu(CPUState *cpu) return 0; } +bool hvf_arch_cpu_realize(CPUState *cs, Error **errp) +{ + return true; +} + void hvf_kick_vcpu_thread(CPUState *cpu) { cpus_kick_thread(cpu); diff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c index 818b50419f4..a24786c8c35 100644 --- a/target/i386/hvf/hvf.c +++ b/target/i386/hvf/hvf.c @@ -367,6 +367,11 @@ int hvf_arch_init_vcpu(CPUState *cpu) return 0; } +bool hvf_arch_cpu_realize(CPUState *cs, Error **errp) +{ + return true; +} + static void hvf_store_events(CPUState *cpu, uint32_t ins_len, uint64_t idtvec_info) { X86CPU *x86_cpu = X86_CPU(cpu); -- 2.49.0