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From: Mohamed Mediouni <mohamed@unpredictable.fr>
To: qemu-devel@nongnu.org
Cc: Mads Ynddal <mads@ynddal.dk>,
	qemu-arm@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	Ani Sinha <anisinha@redhat.com>,
	Igor Mammedov <imammedo@redhat.com>,
	Cameron Esfahani <dirty@apple.com>,
	Phil Dennis-Jordan <phil@philjordan.eu>,
	Peter Maydell <peter.maydell@linaro.org>,
	Alexander Graf <agraf@csgraf.de>,
	Shannon Zhao <shannon.zhaosl@gmail.com>,
	Roman Bolshakov <rbolshakov@ddn.com>,
	Mohamed Mediouni <mohamed@unpredictable.fr>
Subject: [PATCH v2 8/9] hw/arm: virt: add GICv2m for the case when ITS is not available
Date: Fri, 25 Jul 2025 10:55:44 +0200	[thread overview]
Message-ID: <20250725085545.93619-9-mohamed@unpredictable.fr> (raw)
In-Reply-To: <20250725085545.93619-1-mohamed@unpredictable.fr>

On Hypervisor.framework for macOS and WHPX for Windows, the provided environment is a GICv3 without ITS.

As such, support a GICv3 w/ GICv2m for that scenario.

Signed-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>
---
 hw/arm/virt-acpi-build.c | 4 +++-
 hw/arm/virt.c            | 8 ++++++++
 include/hw/arm/virt.h    | 2 ++
 3 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index b01fc4f8ef..969fa3f686 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -848,7 +848,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
             build_append_int_noprefix(table_data, memmap[VIRT_GIC_ITS].base, 8);
             build_append_int_noprefix(table_data, 0, 4);    /* Reserved */
         }
-    } else {
+    }
+
+    if (!vms->its && !vms->no_gicv3_with_gicv2m) {
         const uint16_t spi_base = vms->irqmap[VIRT_GIC_V2M] + ARM_SPI_BASE;
 
         /* 5.2.12.16 GIC MSI Frame Structure */
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index ab27547707..2d23e7f46f 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -952,6 +952,8 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem)
 
     if (vms->gic_version != VIRT_GIC_VERSION_2 && vms->its) {
         create_its(vms);
+    } else if (vms->gic_version != VIRT_GIC_VERSION_2 && !vms->no_gicv3_with_gicv2m) {
+        create_v2m(vms);
     } else if (vms->gic_version == VIRT_GIC_VERSION_2) {
         create_v2m(vms);
     }
@@ -2407,6 +2409,8 @@ static void machvirt_init(MachineState *machine)
     vms->ns_el2_virt_timer_irq = ns_el2_virt_timer_present() &&
         !vmc->no_ns_el2_virt_timer_irq;
 
+    vms->no_gicv3_with_gicv2m = vmc->no_gicv3_with_gicv2m;
+
     fdt_add_timer_nodes(vms);
     fdt_add_cpu_nodes(vms);
 
@@ -3418,6 +3422,7 @@ static void virt_instance_init(Object *obj)
     vms->its = true;
     /* Allow ITS emulation if the machine version supports it */
     vms->tcg_its = !vmc->no_tcg_its;
+    vms->no_gicv3_with_gicv2m = false;
 
     /* Default disallows iommu instantiation */
     vms->iommu = VIRT_IOMMU_NONE;
@@ -3470,8 +3475,11 @@ DEFINE_VIRT_MACHINE_AS_LATEST(10, 1)
 
 static void virt_machine_10_0_options(MachineClass *mc)
 {
+    VirtMachineClass *vmc = VIRT_MACHINE_CLASS(OBJECT_CLASS(mc));
+
     virt_machine_10_1_options(mc);
     compat_props_add(mc->compat_props, hw_compat_10_0, hw_compat_10_0_len);
+    vmc->no_gicv3_with_gicv2m = true;
 }
 DEFINE_VIRT_MACHINE(10, 0)
 
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 365a28b082..725ec18fd2 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -131,6 +131,7 @@ struct VirtMachineClass {
     bool no_cpu_topology;
     bool no_tcg_lpa2;
     bool no_ns_el2_virt_timer_irq;
+    bool no_gicv3_with_gicv2m;
     bool no_nested_smmu;
 };
 
@@ -178,6 +179,7 @@ struct VirtMachineState {
     char *oem_id;
     char *oem_table_id;
     bool ns_el2_virt_timer_irq;
+    bool no_gicv3_with_gicv2m;
     CXLState cxl_devices_state;
 };
 
-- 
2.39.5 (Apple Git-154)



  parent reply	other threads:[~2025-07-25  8:56 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-07-25  8:55 [PATCH v2 0/9] HVF: Add support for platform vGIC and nested virtualisation Mohamed Mediouni
2025-07-25  8:55 ` [PATCH v2 1/9] target/arm: hvf: stubbing writes to LORC_EL1 Mohamed Mediouni
2025-07-25  8:55 ` [PATCH v2 2/9] accel, hw/arm, include/system/hvf: plumbing changes for HVF vGIC Mohamed Mediouni
2025-07-25  8:55 ` [PATCH v2 3/9] target/arm: hvf: instantiate GIC early Mohamed Mediouni
2025-07-25  8:55 ` [PATCH v2 4/9] target/arm: add asserts for code paths not leveraged when using the vGIC Mohamed Mediouni
2025-07-25  8:55 ` [PATCH v2 5/9] hw/intc: Add hvf vGIC interrupt controller support Mohamed Mediouni
2025-07-25  8:55 ` [PATCH v2 6/9] hw/arm, target/arm: nested virtualisation on HVF Mohamed Mediouni
2025-07-25  8:55 ` [PATCH v2 7/9] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1 Mohamed Mediouni
2025-07-25  8:55 ` Mohamed Mediouni [this message]
2025-07-25  8:55 ` [PATCH v2 9/9] target/arm: hvf: use LOG_UNIMP for CNTP_CVAL_EL0/SYSREG_CNTP_CTL_EL0 Mohamed Mediouni
2025-07-25  9:27 ` [PATCH v2 0/9] HVF: Add support for platform vGIC and nested virtualisation Mads Ynddal

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