From: Igor Mammedov <imammedo@redhat.com>
To: qemu-devel@nongnu.org
Cc: mst@redhat.com, pbonzini@redhat.com, peterx@redhat.com,
david@redhat.com, philmd@linaro.org, mtosatti@redhat.com
Subject: [PATCH v3 06/10] introduce cpu_test_interrupt() that will replace open coded checks
Date: Fri, 8 Aug 2025 14:01:33 +0200 [thread overview]
Message-ID: <20250808120137.2208800-7-imammedo@redhat.com> (raw)
In-Reply-To: <20250808120137.2208800-1-imammedo@redhat.com>
the helper forms load-acquire/store-release pair with
tcg_handle_interrupt/generic_handle_interrupt and can be used
for checking interrupts outside of BQL
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
---
include/hw/core/cpu.h | 12 ++++++++++++
accel/tcg/tcg-accel-ops.c | 3 ++-
system/cpus.c | 3 ++-
3 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 5eaf41a566..d0460c01cf 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -942,6 +942,18 @@ CPUState *cpu_by_arch_id(int64_t id);
void cpu_interrupt(CPUState *cpu, int mask);
+/**
+ * cpu_test_interrupt:
+ * @cpu: The CPU to check interrupt(s) on.
+ * @mask: The interrupts to check.
+ *
+ * Checks if any of interrupts in @mask are pending on @cpu.
+ */
+static inline bool cpu_test_interrupt(CPUState *cpu, int mask)
+{
+ return qatomic_load_acquire(&cpu->interrupt_request) & mask;
+}
+
/**
* cpu_set_pc:
* @cpu: The CPU to set the program counter for.
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index 3b0d7d298e..02c7600bb7 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -97,7 +97,8 @@ static void tcg_cpu_reset_hold(CPUState *cpu)
/* mask must never be zero, except for A20 change call */
void tcg_handle_interrupt(CPUState *cpu, int mask)
{
- cpu->interrupt_request |= mask;
+ qatomic_store_release(&cpu->interrupt_request,
+ cpu->interrupt_request | mask);
/*
* If called from iothread context, wake the target cpu in
diff --git a/system/cpus.c b/system/cpus.c
index 256723558d..8e543488c3 100644
--- a/system/cpus.c
+++ b/system/cpus.c
@@ -256,7 +256,8 @@ int64_t cpus_get_elapsed_ticks(void)
void generic_handle_interrupt(CPUState *cpu, int mask)
{
- cpu->interrupt_request |= mask;
+ qatomic_store_release(&cpu->interrupt_request,
+ cpu->interrupt_request | mask);
if (!qemu_cpu_is_self(cpu)) {
qemu_cpu_kick(cpu);
--
2.47.1
next prev parent reply other threads:[~2025-08-08 12:03 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-08 12:01 [PATCH v3 00/10] Reinvent BQL-free PIO/MMIO Igor Mammedov
2025-08-08 12:01 ` [PATCH v3 01/10] memory: reintroduce BQL-free fine-grained PIO/MMIO Igor Mammedov
2025-08-08 12:12 ` David Hildenbrand
2025-08-08 14:36 ` Igor Mammedov
2025-08-08 15:24 ` David Hildenbrand
2025-08-11 12:08 ` Igor Mammedov
2025-08-11 15:54 ` Peter Xu
2025-08-08 12:01 ` [PATCH v3 02/10] acpi: mark PMTIMER as unlocked Igor Mammedov
2025-08-11 15:55 ` Peter Xu
2025-08-08 12:01 ` [PATCH v3 03/10] hpet: switch to fain-grained device locking Igor Mammedov
2025-08-11 15:56 ` Peter Xu
2025-08-08 12:01 ` [PATCH v3 04/10] hpet: move out main counter read into a separate block Igor Mammedov
2025-08-11 15:56 ` Peter Xu
2025-08-08 12:01 ` [PATCH v3 05/10] hpet: make main counter read lock-less Igor Mammedov
2025-08-11 15:58 ` Peter Xu
2025-08-08 12:01 ` Igor Mammedov [this message]
2025-08-11 16:31 ` [PATCH v3 06/10] introduce cpu_test_interrupt() that will replace open coded checks Peter Xu
2025-08-12 15:00 ` Igor Mammedov
2025-08-12 16:10 ` Peter Xu
2025-08-08 12:01 ` [PATCH v3 07/10] x86: kvm: use cpu_test_interrupt() instead of oppen coding checks Igor Mammedov
2025-08-08 12:01 ` [PATCH v3 08/10] kvm: i386: irqchip: take BQL only if there is an interrupt Igor Mammedov
2025-08-11 16:22 ` Peter Xu
2025-08-08 12:01 ` [PATCH v3 09/10] use cpu_test_interrupt() instead of oppen coding checks tree wide Igor Mammedov
2025-08-08 12:01 ` [PATCH v3 10/10] tcg: move interrupt caching and single step masking closer to user Igor Mammedov
2025-08-11 5:36 ` [PATCH v3 00/10] Reinvent BQL-free PIO/MMIO Michael S. Tsirkin
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