From: Kane Chen via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Jamin Lin" <jamin_lin@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <troy_lee@aspeedtech.com>, Kane-Chen-AS <kane_chen@aspeedtech.com>
Subject: [PATCH v5 10/10] docs/system/arm/aspeed: Document OTP memory options
Date: Tue, 12 Aug 2025 17:40:07 +0800 [thread overview]
Message-ID: <20250812094011.2617526-11-kane_chen@aspeedtech.com> (raw)
In-Reply-To: <20250812094011.2617526-1-kane_chen@aspeedtech.com>
From: Kane-Chen-AS <kane_chen@aspeedtech.com>
Add documentation for the OTP memory module used by AST2600 and AST1030
SoCs, and describe options for using a pre-generated image or an
internal buffer. Include example commands for configuration and image
generation.
Signed-off-by: Kane-Chen-AS <kane_chen@aspeedtech.com>
---
docs/system/arm/aspeed.rst | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst
index bf18c56347..6317c0e910 100644
--- a/docs/system/arm/aspeed.rst
+++ b/docs/system/arm/aspeed.rst
@@ -243,6 +243,37 @@ under Linux), use :
-M ast2500-evb,bmc-console=uart3
+OTP Option
+^^^^^^^^^^
+
+Both the AST2600 and AST1030 chips use the same One Time Programmable
+(OTP) memory module, which is utilized for configuration, key storage,
+and storing user-programmable data. This OTP memory module is managed
+by the Secure Boot Controller (SBC). The following options can be
+specified or omitted based on your needs.
+
+ * When the options are specified, the pre-generated configuration
+ file will be used as the OTP memory storage.
+
+ * When the options are omitted, an internal memory buffer will be
+ used to store the OTP memory data.
+
+.. code-block:: bash
+
+ -blockdev driver=file,filename=otpmem.img,node-name=otp \
+ -global aspeed-otp.drive=otp \
+
+The following bash command can be used to generate a default
+configuration file for OTP memory:
+
+.. code-block:: bash
+
+ if [ ! -f otpmem.img ]; then
+ for i in $(seq 1 2048); do
+ printf '\x00\x00\x00\x00\xff\xff\xff\xff'
+ done > otpmem.img
+ fi
+
Aspeed 2700 family boards (``ast2700-evb``)
==================================================================
--
2.43.0
next prev parent reply other threads:[~2025-08-12 9:42 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-12 9:39 [PATCH v5 00/10] aspeed: OTP model, SBC integration, tests, and docs Kane Chen via
2025-08-12 9:39 ` [PATCH v5 01/10] hw/nvram/aspeed_otp: Add ASPEED OTP memory device model Kane Chen via
2025-08-12 9:39 ` [PATCH v5 02/10] hw/misc/aspeed_sbc: Connect ASPEED OTP memory device to SBC Kane Chen via
2025-08-12 9:40 ` [PATCH v5 03/10] hw/arm: Integrate ASPEED OTP memory support into AST2600 SoCs Kane Chen via
2025-08-12 9:40 ` [PATCH v5 04/10] hw/nvram/aspeed_otp: Add 'drive' property to support block backend Kane Chen via
2025-08-12 9:40 ` [PATCH v5 05/10] hw/nvram/aspeed_otp: Add OTP programming semantics and tracing Kane Chen via
2025-09-02 5:32 ` [SPAM] " Cédric Le Goater
2025-08-12 9:40 ` [PATCH v5 06/10] hw/arm: Integrate ASPEED OTP memory support into AST1030 SoCs Kane Chen via
2025-09-02 5:32 ` [SPAM] " Cédric Le Goater
2025-08-12 9:40 ` [PATCH v5 07/10] hw/misc/aspeed_sbc: Add CAMP2 support for OTP data reads Kane Chen via
2025-09-02 5:32 ` [SPAM] " Cédric Le Goater
2025-08-12 9:40 ` [PATCH v5 08/10] hw/misc/aspeed_sbc: Handle OTP write command for voltage mode registers Kane Chen via
2025-09-02 5:32 ` [SPAM] " Cédric Le Goater
2025-08-12 9:40 ` [PATCH v5 09/10] tests/function/aspeed: Add OTP functional test Kane Chen via
2025-09-02 5:41 ` [SPAM] " Cédric Le Goater
2025-09-02 5:48 ` Kane Chen
2025-08-12 9:40 ` Kane Chen via [this message]
2025-09-02 5:41 ` [SPAM] [PATCH v5 10/10] docs/system/arm/aspeed: Document OTP memory options Cédric Le Goater
2025-09-02 5:44 ` [SPAM] [PATCH v5 00/10] aspeed: OTP model, SBC integration, tests, and docs Cédric Le Goater
2025-09-02 6:05 ` Kane Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250812094011.2617526-11-kane_chen@aspeedtech.com \
--to=qemu-devel@nongnu.org \
--cc=andrew@codeconstruct.com.au \
--cc=clg@kaod.org \
--cc=jamin_lin@aspeedtech.com \
--cc=joel@jms.id.au \
--cc=kane_chen@aspeedtech.com \
--cc=leetroy@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=steven_lee@aspeedtech.com \
--cc=troy_lee@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).