From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH 07/61] target/arm/hvf: Replace hvf_sreg_match with hvf_sreg_list
Date: Wed, 27 Aug 2025 11:03:57 +1000 [thread overview]
Message-ID: <20250827010453.4059782-11-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250827010453.4059782-1-richard.henderson@linaro.org>
Change hvf_get_registers and hvf_put_registers to iterate over
cpregs_indexes instead of hvf_sreg_match.
This lets us drop the cp_idx member of hvf_sreg_match, which leaves
only one member in the struct. Replace the struct with a const array.
Instead of int, use the proper enum type: hv_sys_reg_t.
Rename from hvf_sreg_match to hvf_sreg_list because there is no
longer any matching going on.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/hvf/hvf.c | 45 +++++++++++++++-----------------------------
1 file changed, 15 insertions(+), 30 deletions(-)
diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c
index 5fcfa9a999..37d8f795eb 100644
--- a/target/arm/hvf/hvf.c
+++ b/target/arm/hvf/hvf.c
@@ -394,11 +394,6 @@ static const struct hvf_reg_match hvf_fpreg_match[] = {
{ HV_SIMD_FP_REG_Q31, offsetof(CPUARMState, vfp.zregs[31]) },
};
-struct hvf_sreg_match {
- int reg;
- uint32_t cp_idx;
-};
-
/*
* QEMU uses KVM system register ids in the migration format.
* Conveniently, HVF uses the same encoding of the op* and cr* parameters
@@ -419,9 +414,9 @@ struct hvf_sreg_match {
#undef DEF_SYSREG
-#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) { HVF_ID },
+#define DEF_SYSREG(HVF_ID, op0, op1, crn, crm, op2) HVF_ID,
-static struct hvf_sreg_match hvf_sreg_match[] = {
+static const hv_sys_reg_t hvf_sreg_list[] = {
#include "sysreg.c.inc"
};
@@ -434,7 +429,7 @@ int hvf_get_registers(CPUState *cpu)
hv_return_t ret;
uint64_t val;
hv_simd_fp_uchar16_t fpval;
- int i;
+ int i, n;
for (i = 0; i < ARRAY_SIZE(hvf_reg_match); i++) {
ret = hv_vcpu_get_reg(cpu->accel->fd, hvf_reg_match[i].reg, &val);
@@ -463,13 +458,9 @@ int hvf_get_registers(CPUState *cpu)
assert_hvf_ok(ret);
pstate_write(env, val);
- for (i = 0; i < ARRAY_SIZE(hvf_sreg_match); i++) {
- int hvf_id = hvf_sreg_match[i].reg;
- uint64_t kvm_id = HVF_TO_KVMID(hvf_id);
-
- if (hvf_sreg_match[i].cp_idx == -1) {
- continue;
- }
+ for (i = 0, n = arm_cpu->cpreg_array_len; i < n; i++) {
+ uint64_t kvm_id = arm_cpu->cpreg_indexes[i];
+ int hvf_id = KVMID_TO_HVF(kvm_id);
if (cpu->accel->guest_debug_enabled) {
/* Handle debug registers */
@@ -553,7 +544,7 @@ int hvf_get_registers(CPUState *cpu)
val = read_raw_cp_reg(env, ri);
- arm_cpu->cpreg_values[hvf_sreg_match[i].cp_idx] = val;
+ arm_cpu->cpreg_values[i] = val;
continue;
}
}
@@ -562,7 +553,7 @@ int hvf_get_registers(CPUState *cpu)
ret = hv_vcpu_get_sys_reg(cpu->accel->fd, hvf_id, &val);
assert_hvf_ok(ret);
- arm_cpu->cpreg_values[hvf_sreg_match[i].cp_idx] = val;
+ arm_cpu->cpreg_values[i] = val;
}
assert(write_list_to_cpustate(arm_cpu));
@@ -578,7 +569,7 @@ int hvf_put_registers(CPUState *cpu)
hv_return_t ret;
uint64_t val;
hv_simd_fp_uchar16_t fpval;
- int i;
+ int i, n;
for (i = 0; i < ARRAY_SIZE(hvf_reg_match); i++) {
val = *(uint64_t *)((void *)env + hvf_reg_match[i].offset);
@@ -605,12 +596,9 @@ int hvf_put_registers(CPUState *cpu)
aarch64_save_sp(env, arm_current_el(env));
assert(write_cpustate_to_list(arm_cpu, false));
- for (i = 0; i < ARRAY_SIZE(hvf_sreg_match); i++) {
- int hvf_id = hvf_sreg_match[i].reg;
-
- if (hvf_sreg_match[i].cp_idx == -1) {
- continue;
- }
+ for (i = 0, n = arm_cpu->cpreg_array_len; i < n; i++) {
+ uint64_t kvm_id = arm_cpu->cpreg_indexes[i];
+ int hvf_id = KVMID_TO_HVF(kvm_id);
if (cpu->accel->guest_debug_enabled) {
/* Handle debug registers */
@@ -688,7 +676,7 @@ int hvf_put_registers(CPUState *cpu)
}
}
- val = arm_cpu->cpreg_values[hvf_sreg_match[i].cp_idx];
+ val = arm_cpu->cpreg_values[i];
ret = hv_vcpu_set_sys_reg(cpu->accel->fd, hvf_id, val);
assert_hvf_ok(ret);
}
@@ -899,7 +887,7 @@ int hvf_arch_init_vcpu(CPUState *cpu)
{
ARMCPU *arm_cpu = ARM_CPU(cpu);
CPUARMState *env = &arm_cpu->env;
- uint32_t sregs_match_len = ARRAY_SIZE(hvf_sreg_match);
+ uint32_t sregs_match_len = ARRAY_SIZE(hvf_sreg_list);
uint32_t sregs_cnt = 0;
uint64_t pfr;
hv_return_t ret;
@@ -924,17 +912,14 @@ int hvf_arch_init_vcpu(CPUState *cpu)
/* Populate cp list for all known sysregs */
for (i = 0; i < sregs_match_len; i++) {
- int hvf_id = hvf_sreg_match[i].reg;
+ hv_sys_reg_t hvf_id = hvf_sreg_list[i];
uint64_t kvm_id = HVF_TO_KVMID(hvf_id);
uint32_t key = kvm_to_cpreg_id(kvm_id);
const ARMCPRegInfo *ri = get_arm_cp_reginfo(arm_cpu->cp_regs, key);
if (ri) {
assert(!(ri->type & ARM_CP_NO_RAW));
- hvf_sreg_match[i].cp_idx = sregs_cnt;
arm_cpu->cpreg_indexes[sregs_cnt++] = kvm_id;
- } else {
- hvf_sreg_match[i].cp_idx = -1;
}
}
arm_cpu->cpreg_array_len = sregs_cnt;
--
2.43.0
next prev parent reply other threads:[~2025-08-27 1:09 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-27 1:03 [RFC PATCH 00/61] target/arm: Implement FEAT_SYSREG128 Richard Henderson
2025-08-27 1:03 ` [PATCH 01/61] target/arm: Introduce KVMID_AA64_SYS_REG64 Richard Henderson
2025-08-27 1:03 ` [PATCH 02/61] target/arm: Move compare_u64 to helper.c Richard Henderson
2025-08-28 12:19 ` Manos Pitsidianakis
2025-08-27 1:03 ` [PATCH 03/61] target/arm/hvf: Split out sysreg.c.inc Richard Henderson
2025-08-29 6:58 ` Manos Pitsidianakis
2025-08-27 1:03 ` [PATCH 4/7] target/arm/hvf: Add KVMID_TO_HVF, HVF_TO_KVMID Richard Henderson
2025-08-28 12:22 ` Manos Pitsidianakis
2025-08-27 1:03 ` [PATCH 04/61] target/arm/hvf: Reorder DEF_SYSREG arguments Richard Henderson
2025-08-28 12:17 ` Manos Pitsidianakis
2025-08-27 1:03 ` [PATCH 05/61] target/arm/hvf: Add KVMID_TO_HVF, HVF_TO_KVMID Richard Henderson
2025-08-29 6:59 ` Manos Pitsidianakis
2025-08-27 1:03 ` [PATCH 5/7] target/arm/hvf: Remove hvf_sreg_match.key Richard Henderson
2025-08-27 1:03 ` [PATCH 06/61] " Richard Henderson
2025-08-29 7:00 ` Manos Pitsidianakis
2025-08-27 1:03 ` [PATCH 6/7] target/arm/hvf: Replace hvf_sreg_match with hvf_sreg_list Richard Henderson
2025-08-27 1:03 ` Richard Henderson [this message]
2025-08-27 1:03 ` [PATCH 7/7] target/arm/hvf: Sort the cpreg_indexes array Richard Henderson
2025-08-27 1:03 ` [PATCH 08/61] " Richard Henderson
2025-08-27 1:04 ` [PATCH 09/61] target/arm/hvf: Use raw_read, raw_write to access Richard Henderson
2025-08-27 1:04 ` [PATCH 10/61] target/arm: Use raw_write in cp_reg_reset Richard Henderson
2025-08-29 7:05 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 11/61] target/arm: Rename all ARMCPRegInfo from opaque to ri Richard Henderson
2025-08-28 12:41 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 12/61] target/arm: Drop define_one_arm_cp_reg_with_opaque Richard Henderson
2025-08-29 7:06 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 13/61] target/arm: Restrict the scope of CPREG_FIELD32, CPREG_FIELD64 Richard Henderson
2025-08-29 7:09 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 14/61] target/arm: Replace cpreg_field_is_64bit with cpreg_field_type Richard Henderson
2025-08-29 7:13 ` Manos Pitsidianakis
2025-09-03 4:48 ` Richard Henderson
2025-08-27 1:04 ` [PATCH 15/61] target/arm: Add CP_REG_AA32_64BIT_{SHIFT,MASK} Richard Henderson
2025-08-29 7:27 ` Manos Pitsidianakis
2025-08-29 13:55 ` Richard Henderson
2025-08-27 1:04 ` [PATCH 16/61] target/arm: Rename CP_REG_AA32_NS_{SHIFT,MASK} Richard Henderson
2025-08-29 7:30 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 17/61] target/arm: Convert init_cpreg_list to g_hash_table_foreach Richard Henderson
2025-08-27 1:04 ` [PATCH 18/61] target/arm: Remove cp argument to ENCODE_AA64_CP_REG Richard Henderson
2025-08-29 7:36 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 19/61] target/arm: Reorder ENCODE_AA64_CP_REG arguments Richard Henderson
2025-08-29 7:40 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 20/61] target/arm: Split out add_cpreg_to_hashtable_aa{32,64} Richard Henderson
2025-08-27 1:04 ` [PATCH 21/61] target/arm: Improve asserts in define_one_arm_cp_reg Richard Henderson
2025-08-27 1:04 ` [PATCH 22/61] target/arm: Move cp processing to define_one_arm_cp_reg Richard Henderson
2025-08-27 1:04 ` [PATCH 23/61] target/arm: Move cpreg elimination " Richard Henderson
2025-08-27 1:04 ` [PATCH 24/61] target/arm: Add key parameter to add_cpreg_to_hashtable Richard Henderson
2025-08-27 1:04 ` [PATCH 25/61] target/arm: Split out alloc_cpreg Richard Henderson
2025-08-27 1:04 ` [PATCH 26/61] target/arm: Hoist the allocation of ARMCPRegInfo Richard Henderson
2025-08-27 1:04 ` [PATCH 27/61] target/arm: Remove name argument to alloc_cpreg Richard Henderson
2025-08-27 1:04 ` [PATCH 28/61] target/arm: Move alias setting for wildcards Richard Henderson
2025-08-27 1:04 ` [PATCH 29/61] target/arm: Move writeback of CP_ANY fields Richard Henderson
2025-08-27 1:04 ` [PATCH 30/61] target/arm: Move endianness fixup for 32-bit registers Richard Henderson
2025-08-27 1:04 ` [PATCH 31/61] target/arm: Rename TBFLAG_A64_NV2_MEM_E20 with *_E2H Richard Henderson
2025-08-27 1:04 ` [PATCH 32/61] target/arm: Split out redirect_cpreg Richard Henderson
2025-08-27 1:04 ` [PATCH 33/61] target/arm: Redirect VHE FOO_EL1 -> FOO_EL2 during translation Richard Henderson
2025-08-28 12:39 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 34/61] target/arm: Redirect VHE FOO_EL12 to FOO_EL1 " Richard Henderson
2025-08-27 1:04 ` [PATCH 35/61] target/arm: Rename some cpreg to their aarch64 names Richard Henderson
2025-09-01 6:53 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 36/61] target/arm: Remove define_arm_vh_e2h_redirects_aliases Richard Henderson
2025-08-27 1:04 ` [PATCH 37/61] target/arm: Implement isar tests for FEAT_SYSREG128, FEAT_SYSINSTR128 Richard Henderson
2025-09-01 6:55 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 38/61] target/arm: Define CP_REG_SIZE_U128 Richard Henderson
2025-09-01 6:55 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 39/61] target/arm: Update ARMCPRegInfo for 128-bit sysregs Richard Henderson
2025-09-01 6:56 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 40/61] target/arm: Assert ARM_CP_128BIT only with ARM_CP_STATE_AA64 Richard Henderson
2025-09-01 6:58 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 41/61] target/arm: Split add_cpreg_to_hashtable_aa64 Richard Henderson
2025-08-27 1:04 ` [PATCH 42/61] target/arm: Add raw_read128, raw_write128 Richard Henderson
2025-09-01 7:02 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 43/61] target/arm: Add read_raw_cp_reg128, write_raw_cp_reg128 Richard Henderson
2025-09-01 7:05 ` Manos Pitsidianakis
2025-08-27 1:04 ` [PATCH 44/61] target/arm: Put 128-bit sysregs into a separate list Richard Henderson
2025-08-27 1:04 ` [PATCH 45/61] target/arm/kvm: Assert no 128-bit sysregs in kvm_arm_init_cpreg_list Richard Henderson
2025-08-27 1:04 ` [PATCH 46/61] target/arm/hvf: Assert no 128-bit sysregs in hvf_arch_init_vcpu Richard Henderson
2025-08-27 1:04 ` [PATCH 47/61] migration: Add vmstate_info_int128 Richard Henderson
2025-08-27 1:04 ` [PATCH 48/61] target/arm: Migrate cpreg128 registers Richard Henderson
2025-08-27 1:04 ` [PATCH 49/61] target/arm: Add syn_aa64_sysreg128trap Richard Henderson
2025-08-27 1:04 ` [PATCH 50/61] target/arm: Introduce helper_{get,set}_cp_reg128 Richard Henderson
2025-08-27 1:04 ` [PATCH 51/61] target/arm: Implement MRRS, MSRR, SYSP Richard Henderson
2025-08-27 1:04 ` [PATCH 52/61] include/qemu/compiler: Introduce HOST_ENDIAN_FIELDS Richard Henderson
2025-08-27 1:04 ` [PATCH 53/61] include/hw/core/cpu: Use HOST_ENDIAN_FIELDS in IcountDecr Richard Henderson
2025-08-27 1:04 ` [PATCH 54/61] include/qemu/host-utils: Use HOST_ENDIAN_FIELDS in muldiv64_rounding Richard Henderson
2025-08-27 1:04 ` [PATCH 55/61] target/arm: Use HOST_ENDIAN_FIELDS in CPUARMState Richard Henderson
2025-08-27 1:04 ` [PATCH 56/61] target/arm: Consolidate definitions of PAR Richard Henderson
2025-08-27 1:04 ` [PATCH 57/61] target/arm: Extend PAR_EL1 to 128-bit Richard Henderson
2025-08-27 1:04 ` [PATCH 58/61] target/arm: Consolidate definitions of TTBR[01] Richard Henderson
2025-08-27 1:04 ` [PATCH 59/61] target/arm: Split out flush_if_asid_change Richard Henderson
2025-08-27 1:04 ` [PATCH 60/61] target/arm: Use flush_if_asid_change in vmsa_ttbr_write Richard Henderson
2025-08-27 1:04 ` [PATCH 61/61] target/arm: Extend TTBR system registers to 128-bit Richard Henderson
2025-08-27 2:36 ` [RFC PATCH 00/61] target/arm: Implement FEAT_SYSREG128 Richard Henderson
2025-09-16 12:14 ` Peter Maydell
2025-09-16 12:29 ` Richard Henderson
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