From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Mark Cave-Ayland" <mark.caveayland@nutanix.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Xiaoyao Li" <xiaoyao.li@intel.com>
Subject: [PULL 06/28] hw/i386/pc_piix.c: remove pcmc->pci_enabled dependent initialisation from pc_init_isa()
Date: Fri, 29 Aug 2025 14:59:13 +0200 [thread overview]
Message-ID: <20250829125935.1526984-7-pbonzini@redhat.com> (raw)
In-Reply-To: <20250829125935.1526984-1-pbonzini@redhat.com>
From: Mark Cave-Ayland <mark.caveayland@nutanix.com>
PCI code will never be used for an isapc machine.
Signed-off-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Link: https://lore.kernel.org/r/20250828111057.468712-7-mark.caveayland@nutanix.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i386/pc_piix.c | 120 ++++++----------------------------------------
1 file changed, 15 insertions(+), 105 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 60bf18c680b..f1b4468d0a1 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -435,19 +435,17 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp)
#ifdef CONFIG_ISAPC
static void pc_init_isa(MachineState *machine)
{
- const char *pci_type = NULL;
PCMachineState *pcms = PC_MACHINE(machine);
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
X86MachineState *x86ms = X86_MACHINE(machine);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *system_io = get_system_io();
- Object *phb = NULL;
ISABus *isa_bus;
Object *piix4_pm = NULL;
qemu_irq smi_irq;
+ uint32_t irq;
GSIState *gsi_state;
MemoryRegion *ram_memory;
- MemoryRegion *pci_memory = NULL;
MemoryRegion *rom_memory = system_memory;
ram_addr_t lowmem;
uint64_t hole64_size = 0;
@@ -552,39 +550,6 @@ static void pc_init_isa(MachineState *machine)
kvmclock_create(pcmc->kvmclock_create_always);
}
- if (pcmc->pci_enabled) {
- pci_memory = g_new(MemoryRegion, 1);
- memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
- rom_memory = pci_memory;
-
- phb = OBJECT(qdev_new(TYPE_I440FX_PCI_HOST_BRIDGE));
- object_property_add_child(OBJECT(machine), "i440fx", phb);
- object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
- OBJECT(ram_memory), &error_fatal);
- object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM,
- OBJECT(pci_memory), &error_fatal);
- object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM,
- OBJECT(system_memory), &error_fatal);
- object_property_set_link(phb, PCI_HOST_PROP_IO_MEM,
- OBJECT(system_io), &error_fatal);
- object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE,
- x86ms->below_4g_mem_size, &error_fatal);
- object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
- x86ms->above_4g_mem_size, &error_fatal);
- object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type,
- &error_fatal);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
-
- pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
- pci_bus_map_irqs(pcms->pcibus,
- xen_enabled() ? xen_pci_slot_get_pirq
- : pc_pci_slot_get_pirq);
-
- hole64_size = object_property_get_uint(phb,
- PCI_HOST_PROP_PCI_HOLE64_SIZE,
- &error_abort);
- }
-
/* allocate ram and load rom/bios */
if (!xen_enabled()) {
pc_memory_init(pcms, system_memory, rom_memory, hole64_size);
@@ -599,92 +564,37 @@ static void pc_init_isa(MachineState *machine)
}
}
- gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
+ gsi_state = pc_gsi_create(&x86ms->gsi, false);
- if (pcmc->pci_enabled) {
- PCIDevice *pci_dev;
- DeviceState *dev;
- size_t i;
+ isa_bus = isa_bus_new(NULL, system_memory, system_io,
+ &error_abort);
+ isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
- pci_dev = pci_new_multifunction(-1, pcms->south_bridge);
- object_property_set_bool(OBJECT(pci_dev), "has-usb",
- machine_usb(machine), &error_abort);
- object_property_set_bool(OBJECT(pci_dev), "has-acpi",
- x86_machine_is_acpi_enabled(x86ms),
- &error_abort);
- object_property_set_bool(OBJECT(pci_dev), "has-pic", false,
- &error_abort);
- object_property_set_bool(OBJECT(pci_dev), "has-pit", false,
- &error_abort);
- qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
- object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
- x86_machine_is_smm_enabled(x86ms),
- &error_abort);
- dev = DEVICE(pci_dev);
- for (i = 0; i < ISA_NUM_IRQS; i++) {
- qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]);
- }
- pci_realize_and_unref(pci_dev, pcms->pcibus, &error_fatal);
+ x86ms->rtc = isa_new(TYPE_MC146818_RTC);
+ qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000);
+ isa_realize_and_unref(x86ms->rtc, isa_bus, &error_fatal);
+ irq = object_property_get_uint(OBJECT(x86ms->rtc), "irq",
+ &error_fatal);
+ isa_connect_gpio_out(ISA_DEVICE(x86ms->rtc), 0, irq);
- if (xen_enabled()) {
- pci_device_set_intx_routing_notifier(
- pci_dev, piix_intx_routing_notifier_xen);
-
- /*
- * Xen supports additional interrupt routes from the PCI devices to
- * the IOAPIC: the four pins of each PCI device on the bus are also
- * connected to the IOAPIC directly.
- * These additional routes can be discovered through ACPI.
- */
- pci_bus_irqs(pcms->pcibus, xen_intx_set_irq, pci_dev,
- XEN_IOAPIC_NUM_PIRQS);
- }
-
- isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
- x86ms->rtc = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
- "rtc"));
- piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
- dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
- pci_ide_create_devs(PCI_DEVICE(dev));
- pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0");
- pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1");
- } else {
- uint32_t irq;
-
- isa_bus = isa_bus_new(NULL, system_memory, system_io,
- &error_abort);
- isa_bus_register_input_irqs(isa_bus, x86ms->gsi);
-
- x86ms->rtc = isa_new(TYPE_MC146818_RTC);
- qdev_prop_set_int32(DEVICE(x86ms->rtc), "base_year", 2000);
- isa_realize_and_unref(x86ms->rtc, isa_bus, &error_fatal);
- irq = object_property_get_uint(OBJECT(x86ms->rtc), "irq",
- &error_fatal);
- isa_connect_gpio_out(ISA_DEVICE(x86ms->rtc), 0, irq);
-
- i8257_dma_init(OBJECT(machine), isa_bus, 0);
- pcms->hpet_enabled = false;
- }
+ i8257_dma_init(OBJECT(machine), isa_bus, 0);
+ pcms->hpet_enabled = false;
if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
pc_i8259_create(isa_bus, gsi_state->i8259_irq);
}
- if (phb) {
- ioapic_init_gsi(gsi_state, phb);
- }
-
if (tcg_enabled()) {
x86_register_ferr_irq(x86ms->gsi[13]);
}
- pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->pcibus : NULL);
+ pc_vga_init(isa_bus, NULL);
/* init basic PC hardware */
pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc,
!MACHINE_CLASS(pcmc)->no_floppy, 0x4);
- pc_nic_init(pcmc, isa_bus, pcms->pcibus);
+ pc_nic_init(pcmc, isa_bus, NULL);
#ifdef CONFIG_IDE_ISA
if (!pcmc->pci_enabled) {
--
2.51.0
next prev parent reply other threads:[~2025-08-30 15:44 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-29 12:59 [PULL 00/28] i386, accel, memory patches for 2025-08-29 Paolo Bonzini
2025-08-29 12:59 ` [PULL 01/28] hw/i386/pc_piix.c: restrict isapc machine to 32-bit CPUs Paolo Bonzini
2025-08-29 12:59 ` [PULL 02/28] hw/i386/pc_piix.c: restrict isapc machine to 3.5G memory Paolo Bonzini
2025-08-29 12:59 ` [PULL 03/28] hw/i386/pc_piix.c: remove include for loader.h Paolo Bonzini
2025-08-29 12:59 ` [PULL 04/28] hw/i386/pc_piix.c: inline pc_xen_hvm_init_pci() into pc_xen_hvm_init() Paolo Bonzini
2025-08-29 12:59 ` [PULL 05/28] hw/i386/pc_piix.c: duplicate pc_init1() into pc_isa_init() Paolo Bonzini
2025-08-29 12:59 ` Paolo Bonzini [this message]
2025-08-29 12:59 ` [PULL 07/28] hw/i386/pc_piix.c: remove igvm initialisation from pc_init_isa() Paolo Bonzini
2025-08-29 12:59 ` [PULL 08/28] hw/i386/pc_piix.c: remove SMI and piix4_pm " Paolo Bonzini
2025-08-29 12:59 ` [PULL 09/28] hw/i386/pc_piix.c: remove SGX " Paolo Bonzini
2025-08-29 12:59 ` [PULL 10/28] hw/i386/pc_piix.c: remove nvdimm " Paolo Bonzini
2025-08-29 12:59 ` [PULL 11/28] hw/i386/pc_piix.c: simplify RAM size logic in pc_init_isa() Paolo Bonzini
2025-08-29 12:59 ` [PULL 12/28] hw/i386/pc_piix.c: hardcode hole64_size to 0 " Paolo Bonzini
2025-08-29 12:59 ` [PULL 13/28] hw/i386/pc_piix.c: remove pc_system_flash_cleanup_unused() from pc_init_isa() Paolo Bonzini
2025-08-29 12:59 ` [PULL 14/28] hw/i386/pc_piix.c: always initialise ISA IDE drives in pc_init_isa() Paolo Bonzini
2025-08-29 12:59 ` [PULL 15/28] hw/i386/pc_piix.c: assume pcmc->pci_enabled is always true in pc_init1() Paolo Bonzini
2025-09-01 10:43 ` Peter Maydell
2025-09-01 13:27 ` Mark Cave-Ayland
2025-08-29 12:59 ` [PULL 16/28] hw/i386: move isapc machine to separate isapc.c file Paolo Bonzini
2025-08-29 12:59 ` [PULL 17/28] hw/i386/pc_piix.c: remove unused headers after isapc machine split Paolo Bonzini
2025-08-29 12:59 ` [PULL 18/28] hw/i386/pc_piix.c: replace rom_memory with pci_memory Paolo Bonzini
2025-08-29 12:59 ` [PULL 19/28] hw/i386/isapc.c: replace rom_memory with system_memory Paolo Bonzini
2025-08-29 12:59 ` [PULL 20/28] user-exec: ensure interrupt_request is not used Paolo Bonzini
2025-08-29 12:59 ` [PULL 21/28] add cpu_test_interrupt()/cpu_set_interrupt() helpers and use them tree wide Paolo Bonzini
2025-10-27 14:38 ` Thomas Huth
2025-08-29 12:59 ` [PULL 22/28] memory: reintroduce BQL-free fine-grained PIO/MMIO Paolo Bonzini
2025-08-29 12:59 ` [PULL 23/28] acpi: mark PMTIMER as unlocked Paolo Bonzini
2025-08-29 12:59 ` [PULL 24/28] hpet: switch to fine-grained device locking Paolo Bonzini
2025-09-08 14:30 ` Daniel P. Berrangé
2025-09-10 11:16 ` Igor Mammedov
2025-09-10 11:23 ` Paolo Bonzini
2025-09-10 12:56 ` Igor Mammedov
2025-09-15 13:26 ` Peter Maydell
2025-09-10 14:25 ` [PATCH] hpet: guard IRQ handling with BQL Igor Mammedov
2025-09-11 13:40 ` Paolo Bonzini
2025-08-29 12:59 ` [PULL 25/28] hpet: move out main counter read into a separate block Paolo Bonzini
2025-08-29 12:59 ` [PULL 26/28] hpet: make main counter read lock-less Paolo Bonzini
2025-08-29 12:59 ` [PULL 27/28] kvm: i386: irqchip: take BQL only if there is an interrupt Paolo Bonzini
2025-08-29 12:59 ` [PULL 28/28] tcg: move interrupt caching and single step masking closer to user Paolo Bonzini
2025-08-31 7:28 ` [PULL 00/28] i386, accel, memory patches for 2025-08-29 Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250829125935.1526984-7-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=mark.caveayland@nutanix.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=xiaoyao.li@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).