From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v2 1/5] cpuinfo/i386: Detect GFNI as an AVX extension
Date: Sat, 30 Aug 2025 13:39:22 +1000 [thread overview]
Message-ID: <20250830033926.372955-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20250830033926.372955-1-richard.henderson@linaro.org>
We won't use the SSE GFNI instructions, so delay
detection until we know AVX is present.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
host/include/i386/host/cpuinfo.h | 1 +
include/qemu/cpuid.h | 3 +++
util/cpuinfo-i386.c | 1 +
3 files changed, 5 insertions(+)
diff --git a/host/include/i386/host/cpuinfo.h b/host/include/i386/host/cpuinfo.h
index 9541a64da6..93d029d499 100644
--- a/host/include/i386/host/cpuinfo.h
+++ b/host/include/i386/host/cpuinfo.h
@@ -27,6 +27,7 @@
#define CPUINFO_ATOMIC_VMOVDQU (1u << 17)
#define CPUINFO_AES (1u << 18)
#define CPUINFO_PCLMUL (1u << 19)
+#define CPUINFO_GFNI (1u << 20)
/* Initialized with a constructor. */
extern unsigned cpuinfo;
diff --git a/include/qemu/cpuid.h b/include/qemu/cpuid.h
index b11161555b..de7a900509 100644
--- a/include/qemu/cpuid.h
+++ b/include/qemu/cpuid.h
@@ -68,6 +68,9 @@
#ifndef bit_AVX512VBMI2
#define bit_AVX512VBMI2 (1 << 6)
#endif
+#ifndef bit_GFNI
+#define bit_GFNI (1 << 8)
+#endif
/* Leaf 0x80000001, %ecx */
#ifndef bit_LZCNT
diff --git a/util/cpuinfo-i386.c b/util/cpuinfo-i386.c
index c8c8a1b370..f4c5b6ff40 100644
--- a/util/cpuinfo-i386.c
+++ b/util/cpuinfo-i386.c
@@ -50,6 +50,7 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
if ((bv & 6) == 6) {
info |= CPUINFO_AVX1;
info |= (b7 & bit_AVX2 ? CPUINFO_AVX2 : 0);
+ info |= (c7 & bit_GFNI ? CPUINFO_GFNI : 0);
if ((bv & 0xe0) == 0xe0) {
info |= (b7 & bit_AVX512F ? CPUINFO_AVX512F : 0);
--
2.43.0
next prev parent reply other threads:[~2025-08-30 17:14 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-30 3:39 [PATCH v2 0/5] tcg/i386: Improve vector shifts Richard Henderson
2025-08-30 3:39 ` Richard Henderson [this message]
2025-08-30 3:39 ` [PATCH v2 2/5] tcg/i386: Expand sari of bits-1 as pcmpgt Richard Henderson
2025-08-30 3:39 ` [PATCH v2 3/5] tcg/i386: Use canonical operand ordering in expand_vec_sari Richard Henderson
2025-09-01 6:44 ` Philippe Mathieu-Daudé
2025-09-02 13:28 ` Richard Henderson
2025-08-30 3:39 ` [PATCH v2 4/5] tcg/i386: Add INDEX_op_x86_vgf2p8affineqb_vec Richard Henderson
2025-08-30 3:39 ` [PATCH v2 5/5] tcg/i386: Use vgf2p8affineqb for MO_8 vector shifts Richard Henderson
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