From: Yubin Zou <yubinz@google.com>
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Tyrone Ting <kfting@nuvoton.com>, Hao Wu <wuhaotsh@google.com>,
qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
Yubin Zou <yubinz@google.com>,
Titus Rwantare <titusr@google.com>
Subject: [PATCH 3/7] hw/arm: attach PCIe root complex to npmcm8xx
Date: Tue, 09 Sep 2025 22:10:58 +0000 [thread overview]
Message-ID: <20250909-pcie-root-upstream-v1-3-d85883b2688d@google.com> (raw)
In-Reply-To: <20250909-pcie-root-upstream-v1-0-d85883b2688d@google.com>
From: Titus Rwantare <titusr@google.com>
Signed-off-by: Titus Rwantare <titusr@google.com>
---
hw/arm/Kconfig | 3 ++-
hw/arm/npcm8xx.c | 10 +++++++++-
include/hw/arm/npcm8xx.h | 2 ++
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index 2aa4b5d77864ff01e69650711e7d914f351e9966..6ac38d083e4a01e09fc00e63df66046c7c17b356 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -499,7 +499,8 @@ config NPCM8XX
select SERIAL
select SSI
select UNIMP
-
+ select CMIS
+ select NPCM_PCIERC
config FSL_IMX25
bool
diff --git a/hw/arm/npcm8xx.c b/hw/arm/npcm8xx.c
index a276fea6985715cf82ea0ac7bb5aae78d2003ccf..9b3e648e3fc3ca4352d5c8d310a19ea462e62cc7 100644
--- a/hw/arm/npcm8xx.c
+++ b/hw/arm/npcm8xx.c
@@ -50,6 +50,7 @@
#define NPCM8XX_CLK_BA 0xf0801000
#define NPCM8XX_MC_BA 0xf0824000
#define NPCM8XX_RNG_BA 0xf000b000
+#define NPCM8XX_PCIERC_BA 0xe1000000
/* ADC Module */
#define NPCM8XX_ADC_BA 0xf000c000
@@ -136,6 +137,7 @@ enum NPCM8xxInterrupt {
NPCM8XX_GPIO5_IRQ,
NPCM8XX_GPIO6_IRQ,
NPCM8XX_GPIO7_IRQ,
+ NPCM8XX_PCIE_RC_IRQ = 127,
NPCM8XX_SMBUS0_IRQ = 128,
NPCM8XX_SMBUS1_IRQ,
NPCM8XX_SMBUS2_IRQ,
@@ -467,6 +469,7 @@ static void npcm8xx_init(Object *obj)
object_initialize_child(obj, "mmc", &s->mmc, TYPE_NPCM7XX_SDHCI);
object_initialize_child(obj, "pspi", &s->pspi, TYPE_NPCM_PSPI);
+ object_initialize_child(obj, "pcierc", &s->pcierc, TYPE_NPCM_PCIERC);
}
static void npcm8xx_realize(DeviceState *dev, Error **errp)
@@ -766,10 +769,15 @@ static void npcm8xx_realize(DeviceState *dev, Error **errp)
sysbus_connect_irq(SYS_BUS_DEVICE(&s->pspi), 0,
npcm8xx_irq(s, NPCM8XX_PSPI_IRQ));
+ /* PCIe RC */
+ sysbus_realize(SYS_BUS_DEVICE(&s->pcierc), &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcierc), 0, NPCM8XX_PCIERC_BA);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcierc), 0,
+ npcm8xx_irq(s, NPCM8XX_PCIE_RC_IRQ));
+
create_unimplemented_device("npcm8xx.shm", 0xc0001000, 4 * KiB);
create_unimplemented_device("npcm8xx.gicextra", 0xdfffa000, 24 * KiB);
create_unimplemented_device("npcm8xx.vdmx", 0xe0800000, 4 * KiB);
- create_unimplemented_device("npcm8xx.pcierc", 0xe1000000, 64 * KiB);
create_unimplemented_device("npcm8xx.rootc", 0xe8000000, 128 * MiB);
create_unimplemented_device("npcm8xx.kcs", 0xf0007000, 4 * KiB);
create_unimplemented_device("npcm8xx.gfxi", 0xf000e000, 4 * KiB);
diff --git a/include/hw/arm/npcm8xx.h b/include/hw/arm/npcm8xx.h
index a8377db490586636ca4c2e491c91f40de0f17d87..fa968e9c0881adac6a27fb5f2117e2fce163be47 100644
--- a/include/hw/arm/npcm8xx.h
+++ b/include/hw/arm/npcm8xx.h
@@ -31,6 +31,7 @@
#include "hw/net/npcm_gmac.h"
#include "hw/net/npcm_pcs.h"
#include "hw/nvram/npcm7xx_otp.h"
+#include "hw/pci-host/npcm_pcierc.h"
#include "hw/sd/npcm7xx_sdhci.h"
#include "hw/timer/npcm7xx_timer.h"
#include "hw/ssi/npcm7xx_fiu.h"
@@ -104,6 +105,7 @@ struct NPCM8xxState {
NPCMPCSState pcs;
NPCM7xxSDHCIState mmc;
NPCMPSPIState pspi;
+ NPCMPCIERCState pcierc;
};
struct NPCM8xxClass {
--
2.51.0.384.g4c02a37b29-goog
next prev parent reply other threads:[~2025-09-09 22:14 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-09 22:10 [PATCH 0/7] Introduce PCIE Root Complex on Nuvoton npcm8xx and npcm7xx Yubin Zou
2025-09-09 22:10 ` [PATCH 1/7] hw/pci-host: implement Nuvoton PCIE Root Complex stub Yubin Zou
2025-09-30 1:33 ` KFTING
2025-09-09 22:10 ` [PATCH 2/7] hw/pci-host: add basic Nuvoton PCIe window support Yubin Zou
2025-09-25 16:38 ` Peter Maydell
2025-09-25 19:39 ` Titus Rwantare
2025-09-26 9:07 ` Peter Maydell
2025-09-30 1:34 ` KFTING
2025-09-09 22:10 ` Yubin Zou [this message]
2025-09-30 1:35 ` [PATCH 3/7] hw/arm: attach PCIe root complex to npmcm8xx KFTING
2025-09-09 22:10 ` [PATCH 4/7] hw/pci-host: add Nuvoton PCIe root port Yubin Zou
2025-09-25 16:42 ` Peter Maydell
2025-09-30 1:34 ` KFTING
2025-09-09 22:11 ` [PATCH 5/7] hw/pci-host: enable MSI on npcm PCIe root complex Yubin Zou
2025-09-30 1:36 ` KFTING
2025-09-09 22:11 ` [PATCH 6/7] hw/pci-host: rework Nuvoton PCIe windowing and memory regions Yubin Zou
2025-09-25 16:40 ` Peter Maydell
2025-09-30 1:34 ` KFTING
2025-09-09 22:11 ` [PATCH 7/7] hw/arm: Add PCIERC to NPCM7xx SoC Yubin Zou
2025-09-30 1:36 ` KFTING
2025-09-25 16:43 ` [PATCH 0/7] Introduce PCIE Root Complex on Nuvoton npcm8xx and npcm7xx Peter Maydell
2025-09-30 1:32 ` KFTING
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