From: TANG Tiancheng <lyndra@linux.alibaba.com>
To: qemu-devel@nongnu.org
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
qemu-riscv@nongnu.org, Peter Xu <peterx@redhat.com>,
Fabiano Rosas <farosas@suse.de>,
TANG Tiancheng <lyndra@linux.alibaba.com>
Subject: [PATCH v2 0/4] Fix RISC-V timer migration issues
Date: Wed, 10 Sep 2025 23:04:24 +0800 [thread overview]
Message-ID: <20250910-timers-v2-0-31359f1f6ee8@linux.alibaba.com> (raw)
This patch set fixes several timer-related migration issues in QEMU's
RISC-V implementation that cause timer events to be lost or behave
incorrectly after snapshot save/restore or live migration.
The problems addressed are:
1. ACLINT mtimer time_delta not migrated: The time_delta field in
RISCVAclintMTimerState was missing from vmstate, causing incorrect
mtime values after snapshot restore. This resulted in guest time
appearing "frozen" until enough virtual time elapsed to compensate
for the offset error.
2. ACLINT mtimer timers array not migrated: Active timer events
scheduled via riscv_aclint_mtimer_write_timecmp() were not being
migrated, causing pending timer interrupts to be lost after restore.
3. CPU stimer/vstimer not migrated: The S-mode and VS-mode timer
pointers in CPURISCVState were missing from vmstate_riscv_cpu,
causing supervisor-level timer events to be lost.
The patch set introduces a new VMSTATE_TIMER_PTR_VARRAY macro to handle
migration of variable-length timer pointer arrays, and adds the missing
timer fields to the appropriate vmstate structures.
Signed-off-by: TANG Tiancheng <lyndra@linux.alibaba.com>
---
Changes in v2:
- Split VMSTATE_VARRAY_OF_POINTER_UINT32() into a separate patch,
and define VMSTATE_TIMER_PTR_VARRAY() in riscv_aclint.h.
- Added Reviewed-by from Daniel Henrique Barboza.
- Link to v1: https://lore.kernel.org/qemu-devel/20250909-timers-v1-0-7ee18a9d8f4b@linux.alibaba.com
---
TANG Tiancheng (4):
hw/intc: Save time_delta in RISC-V mtimer VMState
include/migration: Add support for a variable-length array of UINT32 pointers
hw/intc: Save timers array in RISC-V mtimer VMState
target/riscv: Save stimer and vstimer in CPU vmstate
hw/intc/riscv_aclint.c | 7 +++++--
include/hw/intc/riscv_aclint.h | 4 ++++
include/migration/vmstate.h | 10 ++++++++++
target/riscv/machine.c | 25 +++++++++++++++++++++++++
4 files changed, 44 insertions(+), 2 deletions(-)
---
base-commit: 6a9fa5ef3230a7d51e0d953a59ee9ef10af705b8
change-id: 20250909-timers-18c2c67b1a2a
Best regards,
--
TANG Tiancheng <lyndra@linux.alibaba.com>
next reply other threads:[~2025-09-10 15:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-10 15:04 TANG Tiancheng [this message]
2025-09-10 15:04 ` [PATCH v2 1/4] hw/intc: Save time_delta in RISC-V mtimer VMState TANG Tiancheng
2025-09-10 15:04 ` [PATCH v2 2/4] include/migration: Add support for a variable-length array of UINT32 pointers TANG Tiancheng
2025-09-10 15:37 ` Peter Xu
2025-09-10 15:04 ` [PATCH v2 3/4] hw/intc: Save timers array in RISC-V mtimer VMState TANG Tiancheng
2025-09-10 15:04 ` [PATCH v2 4/4] target/riscv: Save stimer and vstimer in CPU vmstate TANG Tiancheng
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