From: Andrew Jones <ajones@ventanamicro.com>
To: Xie Bo <xb@ultrarisc.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, mjt@tls.msk.ru,
pbonzini@redhat.com, anup@brainfault.org,
alistair.francis@wdc.com, rkrcmar@ventanamicro.com,
palmer@dabbelt.com, xiamy@ultrarisc.com
Subject: Re: [PATCH v7 for v10.0.0 0/2] target/riscv:Fix riscv64 kvm migration
Date: Thu, 11 Sep 2025 07:44:02 -0500 [thread overview]
Message-ID: <20250911-d0793572c80e87bd6614afe0@orel> (raw)
In-Reply-To: <20250911083617.1173094-1-xb@ultrarisc.com>
On Thu, Sep 11, 2025 at 04:36:14PM +0800, Xie Bo wrote:
> This series(v7) replaces the earlier series patch"[PATCH v6 for v10.0.0 0/2]
> target/riscv: Fix riscv64 kvm migration".
>
> Changes since v6:
> - Patch 1: allow boot CPU to be randomly selected on each reset
> - Patch 2: unchanged; keep Reviewed-by from Andrew Jones <ajones@ventanamicro.com>
Except my r-b isn't on the patch...
>
> Xie Bo (2):
> Set KVM initial privilege mode and mp_state
> Fix VM resume after QEMU+KVM migration
>
> target/riscv/cpu.c | 17 +++++++++-
> target/riscv/cpu.h | 2 ++
> target/riscv/kvm/kvm-cpu.c | 60 ++++++++++++++++++++++++++++--------
> target/riscv/kvm/kvm_riscv.h | 3 +-
> target/riscv/machine.c | 5 +--
> 5 files changed, 70 insertions(+), 17 deletions(-)
>
> --
> 2.43.0
>
prev parent reply other threads:[~2025-09-11 12:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 8:36 [PATCH v7 for v10.0.0 0/2] target/riscv:Fix riscv64 kvm migration Xie Bo
2025-09-11 8:36 ` [PATCH v7 for v10.0.0 1/2] Set KVM initial privilege mode and mp_state Xie Bo
2025-09-11 12:46 ` Andrew Jones
2025-09-11 8:36 ` [PATCH v7 for v10.0.0 2/2] Fix VM resume after QEMU+KVM migration Xie Bo
2025-09-11 12:44 ` Andrew Jones [this message]
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