From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<nabihestefan@google.com>, <wuhaotsh@google.com>,
<titusr@google.com>
Subject: [PATCH v2 14/14] tests/functional/aarch64/aspeed_ast2700: add PCIe enumeration test
Date: Thu, 11 Sep 2025 15:24:38 +0800 [thread overview]
Message-ID: <20250911072452.314553-15-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250911072452.314553-1-jamin_lin@aspeedtech.com>
Add PCIe enumeration checks for AST2700 and AST2700fc functional tests.
This patch introduces a helper "do_ast2700_pcie_test()" that runs
"lspci -s 0002:00:00.0" on the emulated system and verifies the
expected PCIe device is present:
- 0002:00:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI
Bridge
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
tests/functional/aarch64/test_aspeed_ast2700.py | 7 +++++++
tests/functional/aarch64/test_aspeed_ast2700fc.py | 6 ++++++
2 files changed, 13 insertions(+)
diff --git a/tests/functional/aarch64/test_aspeed_ast2700.py b/tests/functional/aarch64/test_aspeed_ast2700.py
index a3db267294..de3ef7d83b 100755
--- a/tests/functional/aarch64/test_aspeed_ast2700.py
+++ b/tests/functional/aarch64/test_aspeed_ast2700.py
@@ -69,6 +69,11 @@ def do_ast2700_i2c_test(self):
exec_command_and_wait_for_pattern(self,
'cat /sys/bus/i2c/devices/1-004d/hwmon/hwmon*/temp1_input', '18000')
+ def do_ast2700_pcie_test(self):
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 0002:00:00.0',
+ '0002:00:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
+
def start_ast2700_test(self, name):
num_cpu = 4
uboot_size = os.path.getsize(self.scratch_file(name,
@@ -130,6 +135,7 @@ def test_aarch64_ast2700a1_evb_sdk_v09_06(self):
self.start_ast2700_test('ast2700-default')
self.verify_openbmc_boot_and_login('ast2700-default')
self.do_ast2700_i2c_test()
+ self.do_ast2700_pcie_test()
def test_aarch64_ast2700a1_evb_sdk_vbootrom_v09_07(self):
self.set_machine('ast2700a1-evb')
@@ -139,6 +145,7 @@ def test_aarch64_ast2700a1_evb_sdk_vbootrom_v09_07(self):
self.verify_vbootrom_firmware_flow()
self.verify_openbmc_boot_and_login('ast2700-default')
self.do_ast2700_i2c_test()
+ self.do_ast2700_pcie_test()
if __name__ == '__main__':
QemuSystemTest.main()
diff --git a/tests/functional/aarch64/test_aspeed_ast2700fc.py b/tests/functional/aarch64/test_aspeed_ast2700fc.py
index b85370e182..8ba2ddab0d 100755
--- a/tests/functional/aarch64/test_aspeed_ast2700fc.py
+++ b/tests/functional/aarch64/test_aspeed_ast2700fc.py
@@ -49,6 +49,11 @@ def do_ast2700_i2c_test(self):
exec_command_and_wait_for_pattern(self,
'cat /sys/bus/i2c/devices/1-004d/hwmon/hwmon*/temp1_input', '18000')
+ def do_ast2700_pcie_test(self):
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 0002:00:00.0',
+ '0002:00:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
+
def do_ast2700fc_ssp_test(self):
self.vm.shutdown()
self.vm.set_console(console_index=1)
@@ -128,6 +133,7 @@ def test_aarch64_ast2700fc_sdk_v09_06(self):
self.start_ast2700fc_test('ast2700-default')
self.verify_openbmc_boot_and_login('ast2700-default')
self.do_ast2700_i2c_test()
+ self.do_ast2700_pcie_test()
self.do_ast2700fc_ssp_test()
self.do_ast2700fc_tsp_test()
--
2.43.0
prev parent reply other threads:[~2025-09-11 7:34 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-11 7:24 [PATCH v2 00/14] Support PCIe RC to AST2600 and AST2700 Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 01/14] hw/pci/pci_ids Add PCI vendor ID for ASPEED Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model Jamin Lin via
2025-09-15 9:20 ` [SPAM] " Cédric Le Goater
2025-09-16 5:32 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge Jamin Lin via
2025-09-15 16:51 ` [SPAM] " Cédric Le Goater
2025-09-17 1:45 ` Jamin Lin
2025-09-17 9:05 ` Jamin Lin
2025-09-17 10:21 ` Cédric Le Goater
2025-09-11 7:24 ` [PATCH v2 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support Jamin Lin via
2025-09-15 16:53 ` [SPAM] " Cédric Le Goater
2025-09-16 2:42 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable Jamin Lin via
2025-09-15 16:54 ` [SPAM] " Cédric Le Goater
2025-09-16 2:51 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model Jamin Lin via
2025-09-15 17:14 ` [SPAM] " Cédric Le Goater
2025-09-11 7:24 ` [PATCH v2 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only) Jamin Lin via
2025-09-15 17:19 ` [SPAM] " Cédric Le Goater
2025-09-16 3:41 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks Jamin Lin via
2025-09-15 17:23 ` [SPAM] " Cédric Le Goater
2025-09-17 1:48 ` Jamin Lin
2025-09-11 7:24 ` [PATCH v2 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700 Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700 Jamin Lin via
2025-09-11 7:24 ` [PATCH v2 13/14] tests/functional/arm/test_aspeed_ast2600: add PCIe enumeration test Jamin Lin via
2025-09-15 17:21 ` [SPAM] " Cédric Le Goater
2025-09-16 7:30 ` Jamin Lin
2025-09-16 7:41 ` Cédric Le Goater
2025-09-16 7:44 ` Jamin Lin
2025-09-11 7:24 ` Jamin Lin via [this message]
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