From: Jonathan Cameron via <qemu-devel@nongnu.org>
To: wangyuquan <wangyuquan1236@phytium.com.cn>
Cc: <rad@semihalf.com>, <peter.maydell@linaro.org>,
<leif.lindholm@oss.qualcomm.com>, <chenbaozi@phytium.com.cn>,
<qemu-devel@nongnu.org>, <linux-cxl@vger.kernel.org>,
<qemu-arm@nongnu.org>
Subject: Re: [RFC QEMU PATCH v7] hw/arm/sbsa-ref: Support CXL Host Bridge & CFMW
Date: Wed, 17 Sep 2025 17:39:14 +0100 [thread overview]
Message-ID: <20250917173914.0000331e@huawei.com> (raw)
In-Reply-To: <20250807111037.241118-1-wangyuquan1236@phytium.com.cn>
On Thu, 7 Aug 2025 19:10:37 +0800
wangyuquan <wangyuquan1236@phytium.com.cn> wrote:
> From: Yuquan Wang <wangyuquan1236@phytium.com.cn>
>
> This creates a specific CXL host bridge (0001:00) with four cxl
> root ports on sbsa-ref. And the memory layout provides separate
> space windows for the cxl host bridge in the sbsa-ref memmap:
>
> - 64K CXL Host Bridge Component Registers (CHBCR)
> - 64K CXL_PIO
> - 128M CXL_MMIO
> - 256M CXL_ECAM
> - 4G CXL_MMIO_HIGH
>
> To provide CFMWs on sbsa-ref, this extends 1TB space from the
> hole above RAM Memory [SBSA_MEM] for CXL Fixed Memory Window:
>
> - 1T CXL_FIXED_WINDOW
>
> Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn>
This looks pretty standard to me so FWIW as someone who hasn't used
the SBSA model.
Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
next prev parent reply other threads:[~2025-09-17 16:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-07 11:10 [RFC QEMU PATCH v7] hw/arm/sbsa-ref: Support CXL Host Bridge & CFMW wangyuquan
2025-09-17 16:39 ` Jonathan Cameron via [this message]
2025-09-18 3:10 ` Yuquan Wang
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