From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 751E4CAC59F for ; Thu, 18 Sep 2025 09:00:36 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uzAUH-0001JA-TC; Thu, 18 Sep 2025 04:59:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uzAU4-0001DE-Oc for qemu-devel@nongnu.org; Thu, 18 Sep 2025 04:59:22 -0400 Received: from mgamail.intel.com ([192.198.163.8]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uzAU1-0004kz-Ug for qemu-devel@nongnu.org; Thu, 18 Sep 2025 04:59:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1758185958; x=1789721958; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2PvmskHophFjbn8eBqcZk0VTV4e4kRaI3iZVHHG9JsY=; b=TL5JRz/mr5yOEzw7DbZ3mC9KuU1X+1e9hH2/e9K/au/ByFp5CC4i+my3 2dKchPHc/5yNyWHv55WrszH9kd2IZYFw19lFgbBzFXDyFdNIG9RkGWvRj LrXBW9yvT2160MQXvOpVlmBWlIYZlZVAXRQr97Efx6+pHA1NJXcAF3O1Z 0EYLrR+Ve/S2qyAyHzfwWOdq258KlUK9wKolH3tEewo835XJQ4q6VXsFQ jvAHT93AdjtYZotqR1HMNBazYXHU9i9GEO2Ak904Q5zeu61L+SeSMPRkV cEt8UYvr/TF69bI280tRGxcawzrLp4boL2tAqzZk3P+3xnRKhq8+SEdbk Q==; X-CSE-ConnectionGUID: INM49y0+SvqTimgCS5KlZQ== X-CSE-MsgGUID: hpOJ1qfuQsS1iVcpF+ADyg== X-IronPort-AV: E=McAfee;i="6800,10657,11556"; a="78109516" X-IronPort-AV: E=Sophos;i="6.18,274,1751266800"; d="scan'208";a="78109516" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2025 01:59:15 -0700 X-CSE-ConnectionGUID: NJcRnZQuQU+fArgn/260aA== X-CSE-MsgGUID: BR1RQNbSTBCfIaRWFaK+DA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,274,1751266800"; d="scan'208";a="175930384" Received: from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2025 01:59:12 -0700 From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, skolothumtho@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, Zhenzhong Duan Subject: [PATCH v6 11/22] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on Date: Thu, 18 Sep 2025 04:57:50 -0400 Message-ID: <20250918085803.796942-12-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250918085803.796942-1-zhenzhong.duan@intel.com> References: <20250918085803.796942-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=192.198.163.8; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Currently we don't support nested translation for passthrough device with emulated device under same PCI bridge, because they require different address space when x-flts=on. In theory, we do support if devices under same PCI bridge are all passthrough devices. But emulated device can be hotplugged under same bridge. To simplify, just forbid passthrough device under PCI bridge no matter if there is, or will be emulated devices under same bridge. This is acceptable because PCIE bridge is more popular than PCI bridge now. Suggested-by: Yi Liu Signed-off-by: Zhenzhong Duan Reviewed-by: Eric Auger Reviewed-by: Yi Liu --- hw/i386/intel_iommu.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index bcfbc5dd46..d37d47115a 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -4361,9 +4361,10 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, PCIBus *bus, return vtd_dev_as; } -static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, +static bool vtd_check_hiod(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod, Error **errp) { + HostIOMMUDevice *hiod = vtd_hiod->hiod; HostIOMMUDeviceClass *hiodc = HOST_IOMMU_DEVICE_GET_CLASS(hiod); int ret; @@ -4390,6 +4391,8 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, #ifdef CONFIG_IOMMUFD struct HostIOMMUDeviceCaps *caps = &hiod->caps; struct iommu_hw_info_vtd *vtd = &caps->vendor_caps.vtd; + PCIBus *bus = vtd_hiod->bus; + PCIDevice *pdev = bus->devices[vtd_hiod->devfn]; /* Remaining checks are all first stage translation specific */ if (!object_dynamic_cast(OBJECT(hiod), TYPE_HOST_IOMMU_DEVICE_IOMMUFD)) { @@ -4408,6 +4411,12 @@ static bool vtd_check_hiod(IntelIOMMUState *s, HostIOMMUDevice *hiod, "First stage 1GB large page is unsupported by host IOMMU"); return false; } + + if (pci_device_get_iommu_bus_devfn(pdev, &bus, NULL, NULL)) { + error_setg(errp, "Host device under PCI bridge is unsupported " + "when x-flts=on"); + return false; + } #endif error_setg(errp, @@ -4442,7 +4451,7 @@ static bool vtd_dev_set_iommu_device(PCIBus *bus, void *opaque, int devfn, vtd_hiod->iommu_state = s; vtd_hiod->hiod = hiod; - if (!vtd_check_hiod(s, hiod, errp)) { + if (!vtd_check_hiod(s, vtd_hiod, errp)) { g_free(vtd_hiod); vtd_iommu_unlock(s); return false; -- 2.47.1