From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: <jamin_lin@aspeedtech.com>, <troy_lee@aspeedtech.com>,
<nabihestefan@google.com>, <wuhaotsh@google.com>,
<titusr@google.com>
Subject: [PATCH v5 00/14] Support PCIe RC to AST2600 and AST2700
Date: Fri, 19 Sep 2025 17:29:59 +0800 [thread overview]
Message-ID: <20250919093017.338309-1-jamin_lin@aspeedtech.com> (raw)
v1:
1. Add PCIe PHY, CFG, and MMIO window support for AST2600.
Note: Only supports RC_H.
2. Add PCIe PHY, CFG, and MMIO window support for AST2700.
Note: Supports 3 RCs.
v2:
1. Introduce a new root port device.
2. For AST2600 RC_H, add the root device at 80:00.0 and a root port at 80.08.0
to match the real hardware topology, allowing users to attach PCIe devices
at the root port.
3. For AST2700, add a root port at 00.00.0 for each PCIe root complex to match
the real hardware topology, allowing users to attach PCIe devices at the
root port.
v3:
1. Fix review issues.
2. update functional test for the e1000e network card.
3. update license header
4. Adding "Based on previous work from Cedric Le Goater, with Jamin's summary
implementation.
v4:
1. Initialize pointers to NULL when declaring them.
2. Use distinct variable names to resolve memory leak issues.
3. Update functional tests to verify assigned IP addresses from
Intel NIC Ethernet interfaces.
4. Introduce pcie_mmio_alias in AspeedSoCState instead of dynamically
allocating memory.
v5:
1. fix memory leak issue. Replace g_autofree with array.
Dependencies
Based on https://github.com/legoater/qemu at the aspeed-next branch.
Testing the PCIe Root Complex model with the e1000e PCIe device
AST2600 test environment
Test image: ASPEED SDK v09.07
Download
https://github.com/AspeedTech-BMC/openbmc/releases/download/v09.07/ast2600-default-obmc.tar.gz
When booted, lspci should show one root device at 80:00.0 and a root
port at 80:08.0, matching the expected hardware topology:
```
root@ast2600-default:~# lspci
80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
```
The e1000e driver is included in this image. Attach the e1000e device on
bus pcie.0 with the following command line:
```
-device e1000e,netdev=net0,bus=pcie.0 \
-netdev user,id=net0,hostfwd=:127.0.0.1:3222-:22,hostname=qemu0 \
```
After boot, lspci should show the e1000e device enumerated at 81:00.0:
```
root@ast2600-default:~# lspci
80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
81:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network Connection
```
The e1000e driver should probe successfully, and a new Ethernet interface
should appear:
```
root@ast2600-default:~# ifconfig
eth4 Link encap:Ethernet HWaddr 52:54:00:12:34:5A
inet addr:10.0.2.15 Bcast:10.0.2.255 Mask:255.255.255.0
inet6 addr: fe80::5054:ff:fe12:345a/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:25 errors:0 dropped:0 overruns:0 frame:0
TX packets:57 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:5524 (5.3 KiB) TX bytes:8488 (8.2 KiB)
Interrupt:81 Memory:70040000-70060000
```
AST2700 test environment
Test image: ASPEED SDK v09.07
Download
https://github.com/AspeedTech-BMC/openbmc/releases/download/v09.07/ast2700-default-obmc.tar.gz
By default, the ASPEED SDK only enables PCIe root complex 2 (RC2). If you
want to test all three PCIe root complexes, please use the customized
image provided here:
https://github.com/jamin-aspeed/openbmc/releases/download/qemu-test-0907/ast2700-default-pcie-qemu.tar.xz
When booted, lspci should show one root port at 00:00.0 on the
pcie.2 bus. The domain for PCIe RC2 is 0002, which matches the
expected hardware topology:
```
root@ast2700-default:~# lspci
0002:00:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
```
The e1000e driver is included in this image. Attach the e1000e device to
bus pcie.2 using the following command line:
```
-device e1000e,netdev=net0,bus=pcie.2 \
-netdev user,id=net0,hostfwd=:127.0.0.1:3222-:22,hostname=qemu0 \
```
After boot, lspci should show the e1000e device enumerated at
0002:01:00.0:
```
root@ast2700-default:~# lspci
0002:00:00.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
0002:01:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network Connection
```
The e1000e driver should probe successfully, and a new Ethernet interface
should appear:
```
root@ast2700-default:~# ifconfig
eth2 Link encap:Ethernet HWaddr 52:54:00:12:34:56
inet addr:10.0.2.15 Bcast:10.0.2.255 Mask:255.255.255.0
inet6 addr: fe80::5054:ff:fe12:3456/64 Scope:Link
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:21 errors:0 dropped:0 overruns:0 frame:0
TX packets:48 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:5388 (5.2 KiB) TX bytes:8244 (8.0 KiB)
Interrupt:42 Memory:a0040000-a0060000
```
Jamin Lin (14):
hw/pci/pci_ids: Add PCI vendor ID for ASPEED
hw/pci-host/aspeed: Add AST2600 PCIe PHY model
hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge
hw/pci-host/aspeed: Add AST2600 PCIe Root Device support
hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address
configurable
hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space
hw/arm/aspeed: Wire up PCIe devices in SoC model
hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only)
hw/pci-host/aspeed: Add AST2700 PCIe PHY
hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks
hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0
to AST2700
hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700
tests/functional/arm/test_aspeed_ast2600: Add PCIe and network test
tests/functional/aarch64/aspeed_ast2700: Add PCIe and network tests
include/hw/arm/aspeed_soc.h | 15 +
include/hw/pci-host/aspeed_pcie.h | 137 +++
include/hw/pci/pci_ids.h | 2 +
hw/arm/aspeed_ast2600.c | 74 ++
hw/arm/aspeed_ast27x0.c | 74 ++
hw/pci-host/aspeed_pcie.c | 1015 +++++++++++++++++
hw/arm/Kconfig | 3 +
hw/pci-host/Kconfig | 4 +
hw/pci-host/meson.build | 1 +
hw/pci-host/trace-events | 11 +
.../functional/aarch64/test_aspeed_ast2700.py | 21 +
.../aarch64/test_aspeed_ast2700fc.py | 13 +
tests/functional/arm/test_aspeed_ast2600.py | 21 +
13 files changed, 1391 insertions(+)
create mode 100644 include/hw/pci-host/aspeed_pcie.h
create mode 100644 hw/pci-host/aspeed_pcie.c
--
2.43.0
next reply other threads:[~2025-09-19 9:31 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-19 9:29 Jamin Lin via [this message]
2025-09-19 9:30 ` [PATCH v5 01/14] hw/pci/pci_ids: Add PCI vendor ID for ASPEED Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only) Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700 Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700 Jamin Lin via
2025-09-19 9:49 ` [SPAM] " Cédric Le Goater
2025-09-19 9:30 ` [PATCH v5 13/14] tests/functional/arm/test_aspeed_ast2600: Add PCIe and network test Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 14/14] tests/functional/aarch64/aspeed_ast2700: Add PCIe and network tests Jamin Lin via
2025-10-01 6:04 ` [SPAM] " Cédric Le Goater
2025-09-19 9:52 ` [SPAM] [PATCH v5 00/14] Support PCIe RC to AST2600 and AST2700 Cédric Le Goater
2025-10-01 2:20 ` Jamin Lin
2025-10-01 6:01 ` Cédric Le Goater
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