From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Cédric Le Goater" <clg@kaod.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"open list:ARM TCG CPUs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
nabihestefan@google.com, wuhaotsh@google.com, titusr@google.com,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v5 13/14] tests/functional/arm/test_aspeed_ast2600: Add PCIe and network test
Date: Fri, 19 Sep 2025 17:30:12 +0800 [thread overview]
Message-ID: <20250919093017.338309-14-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250919093017.338309-1-jamin_lin@aspeedtech.com>
Extend the AST2600 functional tests with PCIe and network checks.
This patch introduces a new helper "do_ast2600_pcie_test()" that runs "lspci"
on the emulated system and verifies the presence of the expected PCIe devices:
- 80:00.0 Host bridge: ASPEED Technology, Inc. Device 2600
- 80:08.0 PCI bridge: ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge
- 81:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network Connection
To exercise the PCIe network device, the test adds:
-device e1000e,netdev=net1,bus=pcie.0
-netdev user,id=net1
and assigns an IP address to the interface, verifying it with `ip addr`.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
tests/functional/arm/test_aspeed_ast2600.py | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/tests/functional/arm/test_aspeed_ast2600.py b/tests/functional/arm/test_aspeed_ast2600.py
index 87e3595584..49ffe89d91 100755
--- a/tests/functional/arm/test_aspeed_ast2600.py
+++ b/tests/functional/arm/test_aspeed_ast2600.py
@@ -101,8 +101,26 @@ def test_arm_ast2600_evb_buildroot_tpm(self):
'https://github.com/AspeedTech-BMC/openbmc/releases/download/v09.07/ast2600-default-obmc.tar.gz',
'cb6c08595bcbba1672ce716b068ba4e48eda1ed9abe78a07b30392ba2278feba')
+ def do_ast2600_pcie_test(self):
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 80:00.0',
+ '80:00.0 Host bridge: '
+ 'ASPEED Technology, Inc. Device 2600')
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 80:08.0',
+ '80:08.0 PCI bridge: '
+ 'ASPEED Technology, Inc. AST1150 PCI-to-PCI Bridge')
+ exec_command_and_wait_for_pattern(self,
+ 'lspci -s 81:00.0',
+ '81:00.0 Ethernet controller: '
+ 'Intel Corporation 82574L Gigabit Network Connection')
+ exec_command_and_wait_for_pattern(self,
+ 'ip addr show dev eth4',
+ 'inet 10.0.2.15/24')
+
def test_arm_ast2600_evb_sdk(self):
self.set_machine('ast2600-evb')
+ self.require_netdev('user')
self.archive_extract(self.ASSET_SDK_V907_AST2600)
@@ -110,6 +128,8 @@ def test_arm_ast2600_evb_sdk(self):
'tmp105,bus=aspeed.i2c.bus.5,address=0x4d,id=tmp-test')
self.vm.add_args('-device',
'ds1338,bus=aspeed.i2c.bus.5,address=0x32')
+ self.vm.add_args('-device', 'e1000e,netdev=net1,bus=pcie.0')
+ self.vm.add_args('-netdev', 'user,id=net1')
self.do_test_arm_aspeed_sdk_start(
self.scratch_file("ast2600-default", "image-bmc"))
@@ -135,6 +155,7 @@ def test_arm_ast2600_evb_sdk(self):
year = time.strftime("%Y")
exec_command_and_wait_for_pattern(self,
'/sbin/hwclock -f /dev/rtc1', year)
+ self.do_ast2600_pcie_test()
def test_arm_ast2600_otp_blockdev_device(self):
self.vm.set_machine("ast2600-evb")
--
2.43.0
next prev parent reply other threads:[~2025-09-19 9:36 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-19 9:29 [PATCH v5 00/14] Support PCIe RC to AST2600 and AST2700 Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 01/14] hw/pci/pci_ids: Add PCI vendor ID for ASPEED Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 02/14] hw/pci-host/aspeed: Add AST2600 PCIe PHY model Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 03/14] hw/pci-host/aspeed: Add AST2600 PCIe config space and host bridge Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 04/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Device support Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 05/14] hw/pci-host/aspeed: Add AST2600 PCIe Root Port and make address configurable Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 06/14] hw/pci-host/aspeed: Add MSI support and per-RC IOMMU address space Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 07/14] hw/arm/aspeed: Wire up PCIe devices in SoC model Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 08/14] hw/arm/aspeed_ast2600: Add PCIe RC support (RC_H only) Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 09/14] hw/pci-host/aspeed: Add AST2700 PCIe PHY Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 10/14] hw/pci-host/aspeed: Add AST2700 PCIe config with dedicated H2X blocks Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 11/14] hw/pci-host/aspeed: Disable Root Device and place Root Port at 00:00.0 to AST2700 Jamin Lin via
2025-09-19 9:30 ` [PATCH v5 12/14] hw/arm/aspeed_ast27x0: Introduce 3 PCIe RCs for AST2700 Jamin Lin via
2025-09-19 9:49 ` [SPAM] " Cédric Le Goater
2025-09-19 9:30 ` Jamin Lin via [this message]
2025-09-19 9:30 ` [PATCH v5 14/14] tests/functional/aarch64/aspeed_ast2700: Add PCIe and network tests Jamin Lin via
2025-10-01 6:04 ` [SPAM] " Cédric Le Goater
2025-09-19 9:52 ` [SPAM] [PATCH v5 00/14] Support PCIe RC to AST2600 and AST2700 Cédric Le Goater
2025-10-01 2:20 ` Jamin Lin
2025-10-01 6:01 ` Cédric Le Goater
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