From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Darren Kenny" <darren.kenny@oracle.com>,
"Michael Rolnik" <mrolnik@gmail.com>,
"Alexander Bulekov" <alxndr@bu.edu>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH] target/avr: Mark I/O space mapped cpu regs as reentrancy-safe
Date: Wed, 24 Sep 2025 18:43:29 +0200 [thread overview]
Message-ID: <20250924164329.51644-1-philmd@linaro.org> (raw)
The test_avr_mega2560.py functional test hangs displaying:
qemu-system-avr: warning: Blocked re-entrant IO on MemoryRegion: avr-cpu-reg2 at addr: 0x5
Mark the I/O space mapped cpu regs as reentrancy-safe to avoid that.
Process 71455 stopped
* thread #4, stop reason = breakpoint 1.1
frame #0: 0x1000a2d30 access_with_adjusted_size(addr=5, value=0x16ff9e4f0, size=1, access_size_min=<unavailable>, access_size_max=4, access_fn=(memory_region_read_accessor at memory.c:435), mr=0x12101bce0, attrs=MemTxAttrs @ x7) at memory.c:547:13
544 if (mr->dev && !mr->disable_reentrancy_guard &&
545 !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
546 if (mr->dev->mem_reentrancy_guard.engaged_in_io) {
-> 547 warn_report_once("Blocked re-entrant IO on MemoryRegion: "
548 "%s at addr: 0x%" HWADDR_PRIX,
549 memory_region_name(mr), addr);
550 return MEMTX_ACCESS_ERROR;
Target 0: (qemu-system-avr) stopped.
(lldb) bt
* thread #4, stop reason = breakpoint 1.1
* frame #0: 0x1000a2d30 access_with_adjusted_size(addr=5, value=0x16ff9e4f0, size=1, access_size_min=<unavailable>, access_size_max=4, access_fn=(memory_region_read_accessor at memory.c:435), mr=0x12101bce0, attrs=MemTxAttrs @ x7) at memory.c:547:13
frame #1: 0x1000a27a4 memory_region_dispatch_read [inlined] memory_region_dispatch_read1(mr=0x12101bce0, addr=5, pval=0x16ff9e4f0, size=1, attrs=MemTxAttrs @ x21) at memory.c:0
frame #2: 0x1000a2768 memory_region_dispatch_read(mr=0x12101bce0, addr=5, pval=<unavailable>, op=<unavailable>, attrs=<unavailable>) at memory.c:1484:9
frame #3: 0x1000af89c flatview_read_continue_step(attrs=MemTxAttrs @ x24, buf="", len=<unavailable>, mr_addr=5, l=0x16ff9e568, mr=0x12101bce0) at physmem.c:3061:18
frame #4: 0x1000afb4c flatview_read [inlined] flatview_read_continue(fv=0x0000600003993b40, addr=8388701, attrs=MemTxAttrs @ x21, ptr=0x16ff9e5c0, len=1, mr_addr=5, l=1, mr=<unavailable>) at physmem.c:3102:19
frame #5: 0x1000afb3c flatview_read(fv=0x0000600003993b40, addr=8388701, attrs=MemTxAttrs @ x21, buf=0x16ff9e5c0, len=1) at physmem.c:3132:12
frame #6: 0x1000b50bc subpage_read(opaque=<unavailable>, addr=<unavailable>, data=0x16ff9e630, len=1, attrs=<unavailable>) at physmem.c:2615:11
frame #7: 0x1000a9150 memory_region_read_with_attrs_accessor(mr=0x104096400, addr=93, value=0x16ff9e790, size=1, shift=0, mask=255, attrs=<unavailable>) at memory.c:461:9
frame #8: 0x1000a2c9c access_with_adjusted_size(addr=93, value=<unavailable>, size=<unavailable>, access_size_min=<unavailable>, access_size_max=<unavailable>, access_fn=<unavailable>, mr=<unavailable>, attrs=<unavailable>) at memory.c:566:18
frame #9: 0x1000a27a4 memory_region_dispatch_read [inlined] memory_region_dispatch_read1(mr=0x104096400, addr=93, pval=0x16ff9e790, size=1, attrs=MemTxAttrs @ x21) at memory.c:0
frame #10: 0x1000a2768 memory_region_dispatch_read(mr=0x104096400, addr=93, pval=<unavailable>, op=<unavailable>, attrs=<unavailable>) at memory.c:1484:9
frame #11: 0x100163034 do_ld_mmio_beN [inlined] int_ld_mmio_beN(cpu=<unavailable>, full=<unavailable>, ret_be=0, addr=93, size=1, mmu_idx=<unavailable>, type=<unavailable>, ra=<unavailable>, mr=<unavailable>, mr_offset=93) at cputlb.c:1963:13
frame #12: 0x100163004 do_ld_mmio_beN(cpu=0x121018ec0, full=0x121027400, ret_be=<unavailable>, addr=<unavailable>, size=<unavailable>, mmu_idx=1, type=MMU_DATA_LOAD, ra=12884916912) at cputlb.c:1997:12
frame #13: 0x1001536f0 helper_ldub_mmu [inlined] do_ld_1(cpu=<unavailable>, p=0x16ff9e800, mmu_idx=<unavailable>, type=MMU_DATA_LOAD, ra=12884916912) at cputlb.c:2262:16
frame #14: 0x1001536dc helper_ldub_mmu [inlined] do_ld1_mmu(cpu=<unavailable>, addr=<unavailable>, oi=<unavailable>, ra=<unavailable>, access_type=MMU_DATA_LOAD) at cputlb.c:2338:12
frame #15: 0x1001536dc helper_ldub_mmu(env=0x12101baf0, addr=<unavailable>, oi=<unavailable>, retaddr=12884916912) at ldst_common.c.inc:19:12
frame #16: 0x300003ae4
frame #17: 0x10013c6dc cpu_tb_exec(cpu=<unavailable>, itb=<unavailable>, tb_exit=<unavailable>) at cpu-exec.c:439:11
frame #18: 0x10013d418 cpu_exec_loop [inlined] cpu_loop_exec_tb(cpu=0x121018ec0, tb=<unavailable>, pc=<unavailable>, last_tb=<unavailable>, tb_exit=0x16ff9ee0c) at cpu-exec.c:878:10
frame #19: 0x10013d400 cpu_exec_loop(cpu=0x121018ec0, sc=0x16ff9eed0) at cpu-exec.c:991:13
frame #20: 0x10013cc00 cpu_exec_setjmp(cpu=0x121018ec0, sc=0x16ff9eed0) at cpu-exec.c:1011:12
frame #21: 0x10013cb24 cpu_exec(cpu=0x121018ec0) at cpu-exec.c:1037:11
frame #22: 0x100165830 tcg_cpu_exec(cpu=0x121018ec0) at tcg-accel-ops.c:98:11
frame #23: 0x10016607c mttcg_cpu_thread_routine [inlined] mttcg_cpu_exec(cpu=0x121018ec0) at tcg-accel-ops-mttcg.c:154:11
frame #24: 0x100166070 mttcg_cpu_thread_routine(arg=0x121018ec0) at tcg-accel-ops-mttcg.c:113:21
frame #25: 0x100334218 qemu_thread_start(args=<unavailable>) at qemu-thread-posix.c:393:9
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/avr/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index a6df71d0205..306c3590f23 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -151,6 +151,7 @@ static void avr_cpu_realizefn(DeviceState *dev, Error **errp)
memory_region_init_io(&cpu->cpu_reg2, OBJECT(cpu), &avr_cpu_reg2, env,
"avr-cpu-reg2", 8);
+ cpu->cpu_reg2.disable_reentrancy_guard = true;
memory_region_add_subregion(get_system_memory(),
OFFSET_DATA + 0x58, &cpu->cpu_reg2);
}
--
2.51.0
next reply other threads:[~2025-09-24 16:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-24 16:43 Philippe Mathieu-Daudé [this message]
2025-10-06 4:13 ` [PATCH] target/avr: Mark I/O space mapped cpu regs as reentrancy-safe Philippe Mathieu-Daudé
2025-10-09 6:53 ` Philippe Mathieu-Daudé
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