From: Jamin Lin via <qemu-devel@nongnu.org>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: jamin_lin@aspeedtech.com, troy_lee@aspeedtech.com,
"Cédric Le Goater" <clg@redhat.com>
Subject: [PATCH v3 3/8] hw/arm/aspeed: Move aspeed_install_boot_rom to common SoC code
Date: Thu, 25 Sep 2025 13:05:29 +0800 [thread overview]
Message-ID: <20250925050535.2657256-4-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20250925050535.2657256-1-jamin_lin@aspeedtech.com>
Move the boot ROM install helper into common SoC code so it can be reused
by all ASPEED boards, and decouple the API from AspeedMachineState.
Specifically:
- Move aspeed_install_boot_rom() to hw/arm/aspeed_soc_common.c and
declare it in include/hw/arm/aspeed_soc.h.
- Change the helper’s signature to take AspeedSoCState * and a
MemoryRegion * provided by the caller, instead of AspeedMachineState *.
- Update aspeed_machine_init() call sites accordingly.
No functional change.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed_soc.h | 2 ++
hw/arm/aspeed.c | 23 +++--------------------
hw/arm/aspeed_soc_common.c | 17 +++++++++++++++++
3 files changed, 22 insertions(+), 20 deletions(-)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 5567bdcb69..aea210a8e2 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -314,6 +314,8 @@ void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
unsigned int count, int unit0);
void aspeed_write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size,
Error **errp);
+void aspeed_install_boot_rom(AspeedSoCState *soc, BlockBackend *blk,
+ MemoryRegion *boot_rom, uint64_t rom_size);
static inline int aspeed_uart_index(int uart_dev)
{
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 4d0d935836..429f4c6d77 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -263,24 +263,6 @@ static void aspeed_reset_secondary(ARMCPU *cpu,
cpu_set_pc(cs, info->smp_loader_start);
}
-/*
- * Create a ROM and copy the flash contents at the expected address
- * (0x0). Boots faster than execute-in-place.
- */
-static void aspeed_install_boot_rom(AspeedMachineState *bmc, BlockBackend *blk,
- uint64_t rom_size)
-{
- AspeedSoCState *soc = bmc->soc;
- AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(soc);
-
- memory_region_init_rom(&bmc->boot_rom, NULL, "aspeed.boot_rom", rom_size,
- &error_abort);
- memory_region_add_subregion_overlap(&soc->spi_boot_container, 0,
- &bmc->boot_rom, 1);
- aspeed_write_boot_rom(blk, sc->memmap[ASPEED_DEV_SPI_BOOT], rom_size,
- &error_abort);
-}
-
#define VBOOTROM_FILE_NAME "ast27x0_bootrom.bin"
/*
@@ -460,9 +442,10 @@ static void aspeed_machine_init(MachineState *machine)
if (fmc0 && !boot_emmc) {
uint64_t rom_size = memory_region_size(&bmc->soc->spi_boot);
- aspeed_install_boot_rom(bmc, fmc0, rom_size);
+ aspeed_install_boot_rom(bmc->soc, fmc0, &bmc->boot_rom, rom_size);
} else if (emmc0) {
- aspeed_install_boot_rom(bmc, blk_by_legacy_dinfo(emmc0), 64 * KiB);
+ aspeed_install_boot_rom(bmc->soc, blk_by_legacy_dinfo(emmc0),
+ &bmc->boot_rom, 64 * KiB);
}
}
diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c
index d0a400725f..7f104f8de5 100644
--- a/hw/arm/aspeed_soc_common.c
+++ b/hw/arm/aspeed_soc_common.c
@@ -178,6 +178,23 @@ void aspeed_write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size,
rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
}
+/*
+ * Create a ROM and copy the flash contents at the expected address
+ * (0x0). Boots faster than execute-in-place.
+ */
+void aspeed_install_boot_rom(AspeedSoCState *soc, BlockBackend *blk,
+ MemoryRegion *boot_rom, uint64_t rom_size)
+{
+ AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(soc);
+
+ memory_region_init_rom(boot_rom, NULL, "aspeed.boot_rom", rom_size,
+ &error_abort);
+ memory_region_add_subregion_overlap(&soc->spi_boot_container, 0,
+ boot_rom, 1);
+ aspeed_write_boot_rom(blk, sc->memmap[ASPEED_DEV_SPI_BOOT], rom_size,
+ &error_abort);
+}
+
static void aspeed_soc_realize(DeviceState *dev, Error **errp)
{
AspeedSoCState *s = ASPEED_SOC(dev);
--
2.43.0
next prev parent reply other threads:[~2025-09-25 5:08 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 5:05 [PATCH v3 0/8] Support VBOOTROM to ast2700fc machine Jamin Lin via
2025-09-25 5:05 ` [PATCH v3 1/8] hw/arm/aspeed: Move aspeed_board_init_flashes() to common SoC code Jamin Lin via
2025-09-25 5:05 ` [PATCH v3 2/8] hw/arm/aspeed: Move write_boot_rom " Jamin Lin via
2025-09-25 5:05 ` Jamin Lin via [this message]
2025-09-25 5:05 ` [PATCH v3 4/8] hw/arm/aspeed: Move aspeed_load_vbootrom " Jamin Lin via
2025-09-25 5:05 ` [PATCH v3 5/8] hw/arm/aspeed_ast27x0-fc: Drop dead return checks Jamin Lin via
2025-09-25 16:10 ` Cédric Le Goater
2025-09-25 5:05 ` [PATCH v3 6/8] hw/arm/aspeed_ast27x0-fc: Make sub-init functions return bool with errp Jamin Lin via
2025-09-25 16:10 ` Cédric Le Goater
2025-09-25 5:05 ` [PATCH v3 7/8] hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM Jamin Lin via
2025-09-25 16:16 ` Cédric Le Goater
2025-09-25 5:05 ` [PATCH v3 8/8] hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support Jamin Lin via
2025-09-29 5:41 ` [PATCH v3 0/8] Support VBOOTROM to ast2700fc machine Cédric Le Goater
2025-10-01 2:26 ` Jamin Lin
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