From: Luc Michel <luc.michel@amd.com>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>
Cc: "Luc Michel" <luc.michel@amd.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Francisco Iglesias" <francisco.iglesias@amd.com>,
"Edgar E . Iglesias" <edgar.iglesias@amd.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Alistair Francis" <alistair@alistair23.me>,
"Frederic Konrad" <frederic.konrad@amd.com>,
"Sai Pavan Boddu" <sai.pavan.boddu@amd.com>
Subject: [PATCH v6 21/47] hw/arm/xlnx-versal: add the mp_affinity property to the CPU mapping
Date: Fri, 26 Sep 2025 09:07:39 +0200 [thread overview]
Message-ID: <20250926070806.292065-22-luc.michel@amd.com> (raw)
In-Reply-To: <20250926070806.292065-1-luc.michel@amd.com>
Add a way to configure the MP affinity value of the CPUs given their
core and cluster IDs. For the Versal APU CPUs, the MP affinity value is
given by the core ID in Aff0.
Signed-off-by: Luc Michel <luc.michel@amd.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
---
hw/arm/xlnx-versal.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index b4cad856dc2..ccb78fadd7f 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -88,10 +88,16 @@ typedef struct VersalCpuClusterMap {
size_t num_core;
size_t num_cluster;
uint32_t qemu_cluster_id;
bool dtb_expose;
+ struct {
+ uint64_t base;
+ uint64_t core_shift;
+ uint64_t cluster_shift;
+ } mp_affinity;
+
enum StartPoweredOffMode start_powered_off;
} VersalCpuClusterMap;
typedef struct VersalMap {
VersalCpuClusterMap apu;
@@ -196,10 +202,14 @@ static const VersalMap VERSAL_MAP = {
.name = "apu",
.cpu_model = ARM_CPU_TYPE_NAME("cortex-a72"),
.num_cluster = 1,
.num_core = 2,
.qemu_cluster_id = 0,
+ .mp_affinity = {
+ .core_shift = ARM_AFF0_SHIFT,
+ .cluster_shift = ARM_AFF1_SHIFT,
+ },
.start_powered_off = SPO_SECONDARIES,
.dtb_expose = true,
.gic = {
.version = 3,
.dist = 0xf9000000,
@@ -565,23 +575,29 @@ static DeviceState *versal_create_cpu(Versal *s,
size_t core_idx)
{
DeviceState *cpu = qdev_new(map->cpu_model);
ARMCPU *arm_cpu = ARM_CPU(cpu);
Object *obj = OBJECT(cpu);
+ uint64_t affinity;
bool start_off;
size_t idx = cluster_idx * map->num_core + core_idx;
g_autofree char *name;
g_autofree char *node = NULL;
+ affinity = map->mp_affinity.base;
+ affinity |= (cluster_idx & 0xff) << map->mp_affinity.cluster_shift;
+ affinity |= (core_idx & 0xff) << map->mp_affinity.core_shift;
+
start_off = map->start_powered_off == SPO_ALL
|| ((map->start_powered_off == SPO_SECONDARIES)
&& (cluster_idx || core_idx));
name = g_strdup_printf("%s[*]", map->name);
object_property_add_child(OBJECT(qemu_cluster), name, obj);
object_property_set_bool(obj, "start-powered-off", start_off,
&error_abort);
+ qdev_prop_set_uint64(cpu, "mp-affinity", affinity);
qdev_prop_set_int32(cpu, "core-count", map->num_core);
object_property_set_link(obj, "memory", OBJECT(cpu_mr), &error_abort);
qdev_realize_and_unref(cpu, NULL, &error_fatal);
if (!map->dtb_expose) {
--
2.51.0
next prev parent reply other threads:[~2025-09-26 7:11 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-26 7:07 [PATCH v6 00/47] AMD Versal Gen 2 support Luc Michel
2025-09-26 7:07 ` [PATCH v6 01/47] hw/arm/xlnx-versal: split the xlnx-versal type Luc Michel
2025-09-26 7:07 ` [PATCH v6 02/47] hw/arm/xlnx-versal: prepare for FDT creation Luc Michel
2025-09-26 7:07 ` [PATCH v6 03/47] hw/arm/xlnx-versal: uart: refactor creation Luc Michel
2025-09-26 7:07 ` [PATCH v6 04/47] hw/arm/xlnx-versal: canfd: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 05/47] hw/arm/xlnx-versal: sdhci: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 06/47] hw/arm/xlnx-versal: gem: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 07/47] hw/arm/xlnx-versal: adma: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 08/47] hw/arm/xlnx-versal: xram: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 09/47] hw/arm/xlnx-versal: usb: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 10/47] hw/arm/xlnx-versal: efuse: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 11/47] hw/arm/xlnx-versal: ospi: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 12/47] hw/arm/xlnx-versal: VersalMap: add support for OR'ed IRQs Luc Michel
2025-09-26 7:07 ` [PATCH v6 13/47] hw/arm/xlnx-versal: PMC IOU SCLR: refactor creation Luc Michel
2025-09-26 7:07 ` [PATCH v6 14/47] hw/arm/xlnx-versal: bbram: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 15/47] hw/arm/xlnx-versal: trng: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 16/47] hw/arm/xlnx-versal: rtc: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 17/47] hw/arm/xlnx-versal: cfu: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 18/47] hw/arm/xlnx-versal: crl: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 19/47] hw/arm/xlnx-versal-virt: virtio: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 20/47] hw/arm/xlnx-versal: refactor CPU cluster creation Luc Michel
2025-09-26 7:07 ` Luc Michel [this message]
2025-09-26 7:07 ` [PATCH v6 22/47] hw/arm/xlnx-versal: instantiate the GIC ITS in the APU Luc Michel
2025-09-26 7:07 ` [PATCH v6 23/47] hw/intc/arm_gicv3: Introduce a 'first-cpu-index' property Luc Michel
2025-09-29 10:29 ` Philippe Mathieu-Daudé
2025-09-26 7:07 ` [PATCH v6 24/47] hw/arm/xlnx-versal: add support for multiple GICs Luc Michel
2025-09-26 7:07 ` [PATCH v6 25/47] hw/arm/xlnx-versal: add support for GICv2 Luc Michel
2025-09-26 7:07 ` [PATCH v6 26/47] hw/arm/xlnx-versal: rpu: refactor creation Luc Michel
2025-09-26 7:07 ` [PATCH v6 27/47] hw/arm/xlnx-versal: ocm: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 28/47] hw/arm/xlnx-versal: ddr: " Luc Michel
2025-09-26 7:07 ` [PATCH v6 29/47] hw/arm/xlnx-versal: add the versal_get_num_cpu accessor Luc Michel
2025-09-26 7:07 ` [PATCH v6 30/47] hw/misc/xlnx-versal-crl: remove unnecessary include directives Luc Michel
2025-09-26 7:07 ` [PATCH v6 31/47] hw/misc/xlnx-versal-crl: split into base/concrete classes Luc Michel
2025-09-26 7:07 ` [PATCH v6 32/47] hw/misc/xlnx-versal-crl: refactor device reset logic Luc Michel
2025-09-26 7:07 ` [PATCH v6 33/47] hw/arm/xlnx-versal: reconnect the CRL to the other devices Luc Michel
2025-09-26 7:07 ` [PATCH v6 34/47] hw/arm/xlnx-versal: use hw/arm/bsa.h for timer IRQ indices Luc Michel
2025-09-26 7:07 ` [PATCH v6 35/47] hw/arm/xlnx-versal: tidy up Luc Michel
2025-09-26 7:07 ` [PATCH v6 36/47] hw/misc/xlnx-versal-crl: add the versal2 version Luc Michel
2025-09-26 7:07 ` [PATCH v6 37/47] hw/arm/xlnx-versal: add a per_cluster_gic switch to VersalCpuClusterMap Luc Michel
2025-09-26 7:07 ` [PATCH v6 38/47] hw/arm/xlnx-versal: add the target field in IRQ descriptor Luc Michel
2025-09-29 10:34 ` Philippe Mathieu-Daudé
2025-09-30 6:37 ` Luc Michel
2025-09-30 7:30 ` Philippe Mathieu-Daudé
2025-09-26 7:07 ` [PATCH v6 39/47] target/arm/tcg/cpu64: add the cortex-a78ae CPU Luc Michel
2025-09-26 7:07 ` [PATCH v6 40/47] hw/arm/xlnx-versal: add versal2 SoC Luc Michel
2025-09-29 10:37 ` Philippe Mathieu-Daudé
2025-09-26 7:07 ` [PATCH v6 41/47] hw/arm/xlnx-versal-virt: rename the machine to amd-versal-virt Luc Michel
2025-09-26 7:08 ` [PATCH v6 42/47] hw/arm/xlnx-versal-virt: split into base/concrete classes Luc Michel
2025-09-29 10:37 ` Philippe Mathieu-Daudé
2025-09-26 7:08 ` [PATCH v6 43/47] hw/arm/xlnx-versal-virt: tidy up Luc Michel
2025-09-26 7:08 ` [PATCH v6 44/47] docs/system/arm/xlnx-versal-virt: update supported devices Luc Michel
2025-09-26 7:08 ` [PATCH v6 45/47] docs/system/arm/xlnx-versal-virt: add a note about dumpdtb Luc Michel
2025-09-26 7:08 ` [PATCH v6 46/47] hw/arm/xlnx-versal-virt: add the xlnx-versal2-virt machine Luc Michel
2025-09-29 10:38 ` Philippe Mathieu-Daudé
2025-09-26 7:08 ` [PATCH v6 47/47] tests/functional/test_aarch64_xlnx_versal: test the versal2 machine Luc Michel
2025-09-29 10:39 ` Philippe Mathieu-Daudé
2025-09-29 10:26 ` [PATCH v6 00/47] AMD Versal Gen 2 support Philippe Mathieu-Daudé
2025-10-07 9:48 ` Peter Maydell
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