From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: "Aditya Gupta" <adityag@linux.ibm.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Anushree Mathur" <anushree.mathur@linux.ibm.com>
Subject: [PULL 25/27] target/ppc: Introduce macro for deprecating PowerPC CPUs
Date: Mon, 29 Sep 2025 00:56:27 +0530 [thread overview]
Message-ID: <20250928192629.139822-26-harshpb@linux.ibm.com> (raw)
In-Reply-To: <20250928192629.139822-1-harshpb@linux.ibm.com>
From: Aditya Gupta <adityag@linux.ibm.com>
QEMU has a way to deprecate CPUs by setting the 'deprecation_note' in
CPUClass.
Currently PowerPC CPUs don't use this deprecation process.
Introduce 'POWERPC_DEPRECATED_CPU' macro to deprecate particular PowerPC
CPUs in future.
With the change, QEMU will print a warning like below when the
deprecated CPU/Chips are used (example output if power8nvl is deprecated):
$ ./build/qemu-system-ppc64 -M powernv8 --cpu power8nvl -nographic
qemu-system-ppc64: warning: CPU model power8nvl_v1.0-powerpc64-cpu is deprecated -- CPU is unmaintained.
...
Also, print '(deprecated)' for deprecated CPUs in 'qemu-system-ppc64
--cpu ?' (example output if power8nvl is deprecated):
$ ./build/qemu-system-ppc64 --cpu help
...
power8e (alias for power8e_v2.1)
power8nvl_v1.0 PVR 004c0100 (deprecated)
power8nvl (alias for power8nvl_v1.0)
power8_v2.0 PVR 004d0200
...
Suggested-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Tested-by: Anushree Mathur <anushree.mathur@linux.ibm.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Link: https://lore.kernel.org/r/20250607110412.2342511-2-adityag@linux.ibm.com
Message-ID: <20250607110412.2342511-2-adityag@linux.ibm.com>
---
target/ppc/cpu-models.c | 12 +++++++++++-
target/ppc/cpu_init.c | 7 ++++++-
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c
index 09f73e23a8..334b1d2ff3 100644
--- a/target/ppc/cpu-models.c
+++ b/target/ppc/cpu-models.c
@@ -32,17 +32,20 @@
/* PowerPC CPU definitions */
#define POWERPC_DEF_PREFIX(pvr, svr, type) \
glue(glue(glue(glue(pvr, _), svr), _), type)
-#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type) \
+#define POWERPC_DEF_SVR_DEPR(_name, _desc, _pvr, _svr, _type, _deprecation_note) \
static void \
glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_class_init) \
(ObjectClass *oc, const void *data) \
{ \
DeviceClass *dc = DEVICE_CLASS(oc); \
+ CPUClass *cc = CPU_CLASS(oc); \
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); \
\
pcc->pvr = _pvr; \
pcc->svr = _svr; \
dc->desc = _desc; \
+ \
+ cc->deprecation_note = _deprecation_note; \
} \
\
static const TypeInfo \
@@ -63,6 +66,13 @@
type_init( \
glue(POWERPC_DEF_PREFIX(_pvr, _svr, _type), _cpu_register_types))
+#define POWERPC_DEF_SVR(_name, _desc, _pvr, _svr, _type) \
+ POWERPC_DEF_SVR_DEPR(_name, _desc, _pvr, _svr, _type, NULL)
+
+#define POWERPC_DEPRECATED_CPU(_name, _pvr, _type, _desc, _deprecation_note)\
+ POWERPC_DEF_SVR_DEPR(_name, _desc, _pvr, POWERPC_SVR_NONE, _type, \
+ _deprecation_note)
+
#define POWERPC_DEF(_name, _pvr, _type, _desc) \
POWERPC_DEF_SVR(_name, _desc, _pvr, POWERPC_SVR_NONE, _type)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 9e4ea8fd13..3aa3aefc13 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7298,6 +7298,7 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data)
{
ObjectClass *oc = data;
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
+ CPUClass *cc = CPU_CLASS(oc);
DeviceClass *family = DEVICE_CLASS(ppc_cpu_get_family_class(pcc));
const char *typename = object_class_get_name(oc);
char *name;
@@ -7308,7 +7309,11 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data)
}
name = cpu_model_from_type(typename);
- qemu_printf(" %-16s PVR %08x\n", name, pcc->pvr);
+ if (cc->deprecation_note) {
+ qemu_printf(" %-16s PVR %08x (deprecated)\n", name, pcc->pvr);
+ } else {
+ qemu_printf(" %-16s PVR %08x\n", name, pcc->pvr);
+ }
for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) {
PowerPCCPUAlias *alias = &ppc_cpu_aliases[i];
ObjectClass *alias_oc = ppc_cpu_class_by_name(alias->model);
--
2.43.5
next prev parent reply other threads:[~2025-09-28 19:37 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-28 19:26 [PULL 00/27] ppc-for-20250928 queue Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 01/27] ppc/pnv: Introduce Pnv11Chip Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 02/27] ppc/pnv: Introduce Power11 PowerNV machine Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 03/27] ppc/pnv: Add PnvChipClass handler to get reference to interrupt controller Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 04/27] ppc/pnv: Add XIVE2 controller to Power11 Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 05/27] ppc/pnv: Add PHB5 PCIe Host bridge " Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 06/27] ppc/pnv: Add ChipTOD model for Power11 Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 07/27] tests/powernv: Switch to buildroot images instead of op-build Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 08/27] tests/powernv: Add PowerNV test for Power11 Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 09/27] target/ppc: IBM PPE42 general regs and flags Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 10/27] target/ppc: Add IBM PPE42 family of processors Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 11/27] target/ppc: IBM PPE42 exception flags and regs Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 12/27] target/ppc: Add IBM PPE42 exception model Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 13/27] target/ppc: Support for IBM PPE42 MMU Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 14/27] target/ppc: Add IBM PPE42 special instructions Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 15/27] hw/ppc: Support for an IBM PPE42 CPU decrementer Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 16/27] hw/ppc: Add a test machine for the IBM PPE42 CPU Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 17/27] tests/functional: Add test for IBM PPE42 instructions Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 18/27] hw/intc/xics: Add missing call to register vmstate_icp_server Harsh Prateek Bora
2025-09-29 19:32 ` Michael Tokarev
2025-09-30 4:15 ` Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 19/27] ppc/spapr: init lrdr-capapcity phys with ram size if maxmem not provided Harsh Prateek Bora
2025-09-29 19:36 ` Michael Tokarev
2025-09-30 4:18 ` Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 20/27] ppc/xive2: Fix integer overflow warning in xive2_redistribute() Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 21/27] target/ppc: Move floating-point rounding and conversion instructions to decodetree Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 22/27] target/ppc: Move floating-point compare " Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 23/27] target/ppc: Move floating-point move " Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 24/27] target/ppc: Move remaining " Harsh Prateek Bora
2025-09-28 19:26 ` Harsh Prateek Bora [this message]
2025-09-28 19:26 ` [PULL 26/27] target/ppc: Deprecate Power8E and Power8NVL Harsh Prateek Bora
2025-09-28 19:26 ` [PULL 27/27] target/ppc: use MAKE_64BIT_MASK for mcrfs exception clear mask Harsh Prateek Bora
2025-09-29 16:50 ` [PULL 00/27] ppc-for-20250928 queue Richard Henderson
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