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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	qemu-riscv@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	qemu-ppc@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Peter Xu" <peterx@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Zhao Liu" <zhao1.liu@intel.com>
Subject: [PATCH 13/22] target/i386: Get cpu first addr space with cpu_get_address_space()
Date: Wed,  1 Oct 2025 17:05:18 +0200	[thread overview]
Message-ID: <20251001150529.14122-14-philmd@linaro.org> (raw)
In-Reply-To: <20251001150529.14122-1-philmd@linaro.org>

In order to remove the convenient CPUState::as field, access
the vcpu first address space using the cpu_get_address_space()
helper.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/i386/arch_memory_mapping.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/target/i386/arch_memory_mapping.c b/target/i386/arch_memory_mapping.c
index 560f4689abc..809c4cb0298 100644
--- a/target/i386/arch_memory_mapping.c
+++ b/target/i386/arch_memory_mapping.c
@@ -273,12 +273,14 @@ bool x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list,
     X86CPU *cpu = X86_CPU(cs);
     CPUX86State *env = &cpu->env;
     int32_t a20_mask;
+    AddressSpace *as;
 
     if (!cpu_paging_enabled(cs)) {
         /* paging is disabled */
         return true;
     }
 
+    as = cpu_get_address_space(cs, 0);
     a20_mask = x86_get_a20_mask(env);
     if (env->cr[4] & CR4_PAE_MASK) {
 #ifdef TARGET_X86_64
@@ -287,12 +289,12 @@ bool x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list,
                 hwaddr pml5e_addr;
 
                 pml5e_addr = (env->cr[3] & PLM4_ADDR_MASK) & a20_mask;
-                walk_pml5e(list, cs->as, pml5e_addr, a20_mask);
+                walk_pml5e(list, as, pml5e_addr, a20_mask);
             } else {
                 hwaddr pml4e_addr;
 
                 pml4e_addr = (env->cr[3] & PLM4_ADDR_MASK) & a20_mask;
-                walk_pml4e(list, cs->as, pml4e_addr, a20_mask,
+                walk_pml4e(list, as, pml4e_addr, a20_mask,
                         0xffffULL << 48);
             }
         } else
@@ -301,7 +303,7 @@ bool x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list,
             hwaddr pdpe_addr;
 
             pdpe_addr = (env->cr[3] & ~0x1f) & a20_mask;
-            walk_pdpe2(list, cs->as, pdpe_addr, a20_mask);
+            walk_pdpe2(list, as, pdpe_addr, a20_mask);
         }
     } else {
         hwaddr pde_addr;
@@ -309,7 +311,7 @@ bool x86_cpu_get_memory_mapping(CPUState *cs, MemoryMappingList *list,
 
         pde_addr = (env->cr[3] & ~0xfff) & a20_mask;
         pse = !!(env->cr[4] & CR4_PSE_MASK);
-        walk_pde2(list, cs->as, pde_addr, a20_mask, pse);
+        walk_pde2(list, as, pde_addr, a20_mask, pse);
     }
 
     return true;
-- 
2.51.0



  parent reply	other threads:[~2025-10-01 15:22 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-01 15:05 [PATCH 00/22] hw/core/cpu: Remove @CPUState::as field Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 01/22] system/qtest: Use &address_space_memory for first vCPU address space Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 02/22] disas/disas-mon: Get cpu first addr space with cpu_get_address_space() Philippe Mathieu-Daudé
2025-10-01 15:34   ` BALATON Zoltan
2025-10-01 15:05 ` [PATCH 03/22] monitor/hmp-cmds: " Philippe Mathieu-Daudé
2025-10-01 15:35   ` BALATON Zoltan
2025-10-01 16:23     ` Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 04/22] hw/core/loader: " Philippe Mathieu-Daudé
2025-10-01 15:08   ` Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 05/22] hw/ppc: " Philippe Mathieu-Daudé
2025-10-01 15:23   ` Miles Glenn
2025-10-01 15:05 ` [PATCH 06/22] hw/m86k: " Philippe Mathieu-Daudé
2025-10-18  5:52   ` Thomas Huth
2025-10-01 15:05 ` [PATCH 07/22] target/xtensa: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 08/22] target/riscv: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 09/22] semihosting: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 10/22] target/alpha: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 11/22] target/arm: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 12/22] target/hppa: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` Philippe Mathieu-Daudé [this message]
2025-10-01 15:05 ` [PATCH 14/22] target/loongarch: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 15/22] target/m68k: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 16/22] target/microblaze: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 17/22] target/ppc: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 18/22] target/s390x: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 19/22] target/sparc: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 20/22] hw/core/cpu: Remove @CPUState::as field Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 21/22] exec/cpu: Declare cpu_memory_rw_debug() in 'hw/core/cpu.h' and document Philippe Mathieu-Daudé
2025-10-06 19:08   ` Philippe Mathieu-Daudé
2025-10-08 16:25   ` Zhao Liu
2025-10-01 15:05 ` [PATCH 22/22] target/sparc: Reduce inclusions of 'exec/cpu-common.h' Philippe Mathieu-Daudé
2025-10-01 15:39 ` [PATCH 00/22] hw/core/cpu: Remove @CPUState::as field BALATON Zoltan
2025-10-01 16:08 ` Peter Maydell
2025-10-01 16:35   ` Richard Henderson
2025-10-01 16:42     ` Philippe Mathieu-Daudé
2025-10-01 18:38       ` Philippe Mathieu-Daudé

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