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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, qemu-s390x@nongnu.org,
	"Richard Henderson" <richard.henderson@linaro.org>,
	qemu-riscv@nongnu.org, "Peter Maydell" <peter.maydell@linaro.org>,
	qemu-ppc@nongnu.org, "Paolo Bonzini" <pbonzini@redhat.com>,
	"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Peter Xu" <peterx@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Fabiano Rosas" <farosas@suse.de>,
	"Laurent Vivier" <lvivier@redhat.com>
Subject: [PATCH 01/22] system/qtest: Use &address_space_memory for first vCPU address space
Date: Wed,  1 Oct 2025 17:05:06 +0200	[thread overview]
Message-ID: <20251001150529.14122-2-philmd@linaro.org> (raw)
In-Reply-To: <20251001150529.14122-1-philmd@linaro.org>

The QTest framework implementation of the read/write[bwlq]
commands doesn't care about which address space is used.
Historically it accessed the default address space of the
first vCPU (although this is dubious since there is no vCPU
within QTest).

On all targets the first address space is &address_space_memory:

* Only ARM and X86 call cpu_address_space_init() to set an AS,
  and the index #0 is &address_space_memory:

    target/arm/cpu.h:2505:    ARMASIdx_NS = 0,
    target/arm/cpu.c:2162:    cpu_address_space_init(cs, ARMASIdx_NS, "cpu-memory", cs->memory);

    target/i386/cpu.h:2578:    X86ASIdx_MEM = 0,
    target/i386/kvm/kvm-cpu.c:102:    cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-memory", cs->memory);
    target/i386/tcg/system/tcg-cpu.c:77:    cpu_address_space_init(cs, X86ASIdx_MEM, "cpu-memory", cs->memory);

* Other targets don't call cpu_address_space_init() so default
  to &address_space_memory.

Directly use '&address_space_memory' instead of first_cpu->as.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 system/qtest.c | 27 ++++++++++++++-------------
 1 file changed, 14 insertions(+), 13 deletions(-)

diff --git a/system/qtest.c b/system/qtest.c
index fa42c9f9215..62bb9120dc7 100644
--- a/system/qtest.c
+++ b/system/qtest.c
@@ -16,6 +16,7 @@
 #include "system/qtest.h"
 #include "system/runstate.h"
 #include "chardev/char-fe.h"
+#include "system/address-spaces.h"
 #include "system/ioport.h"
 #include "system/memory.h"
 #include "exec/tswap.h"
@@ -512,22 +513,22 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
 
         if (words[0][5] == 'b') {
             uint8_t data = value;
-            address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                 &data, 1);
         } else if (words[0][5] == 'w') {
             uint16_t data = value;
             tswap16s(&data);
-            address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                 &data, 2);
         } else if (words[0][5] == 'l') {
             uint32_t data = value;
             tswap32s(&data);
-            address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                 &data, 4);
         } else if (words[0][5] == 'q') {
             uint64_t data = value;
             tswap64s(&data);
-            address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                 &data, 8);
         }
         qtest_send(chr, "OK\n");
@@ -545,21 +546,21 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
 
         if (words[0][4] == 'b') {
             uint8_t data;
-            address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                &data, 1);
             value = data;
         } else if (words[0][4] == 'w') {
             uint16_t data;
-            address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                &data, 2);
             value = tswap16(data);
         } else if (words[0][4] == 'l') {
             uint32_t data;
-            address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                &data, 4);
             value = tswap32(data);
         } else if (words[0][4] == 'q') {
-            address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                &value, 8);
             tswap64s(&value);
         }
@@ -579,7 +580,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
         g_assert(len);
 
         data = g_malloc(len);
-        address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+        address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, data,
                            len);
 
         enc = qemu_hexdump_line(NULL, data, len, 0, 0);
@@ -600,7 +601,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
         g_assert(ret == 0);
 
         data = g_malloc(len);
-        address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+        address_space_read(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, data,
                            len);
         b64_data = g_base64_encode(data, len);
         qtest_sendf(chr, "OK %s\n", b64_data);
@@ -634,7 +635,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
                 data[i] = 0;
             }
         }
-        address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+        address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, data,
                             len);
         g_free(data);
 
@@ -656,7 +657,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
         if (len) {
             data = g_malloc(len);
             memset(data, pattern, len);
-            address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
+            address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED,
                                 data, len);
             g_free(data);
         }
@@ -689,7 +690,7 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
             out_len = MIN(out_len, len);
         }
 
-        address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, data,
+        address_space_write(&address_space_memory, addr, MEMTXATTRS_UNSPECIFIED, data,
                             len);
 
         qtest_send(chr, "OK\n");
-- 
2.51.0



  reply	other threads:[~2025-10-01 15:08 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-01 15:05 [PATCH 00/22] hw/core/cpu: Remove @CPUState::as field Philippe Mathieu-Daudé
2025-10-01 15:05 ` Philippe Mathieu-Daudé [this message]
2025-10-01 15:05 ` [PATCH 02/22] disas/disas-mon: Get cpu first addr space with cpu_get_address_space() Philippe Mathieu-Daudé
2025-10-01 15:34   ` BALATON Zoltan
2025-10-01 15:05 ` [PATCH 03/22] monitor/hmp-cmds: " Philippe Mathieu-Daudé
2025-10-01 15:35   ` BALATON Zoltan
2025-10-01 16:23     ` Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 04/22] hw/core/loader: " Philippe Mathieu-Daudé
2025-10-01 15:08   ` Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 05/22] hw/ppc: " Philippe Mathieu-Daudé
2025-10-01 15:23   ` Miles Glenn
2025-10-01 15:05 ` [PATCH 06/22] hw/m86k: " Philippe Mathieu-Daudé
2025-10-18  5:52   ` Thomas Huth
2025-10-01 15:05 ` [PATCH 07/22] target/xtensa: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 08/22] target/riscv: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 09/22] semihosting: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 10/22] target/alpha: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 11/22] target/arm: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 12/22] target/hppa: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 13/22] target/i386: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 14/22] target/loongarch: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 15/22] target/m68k: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 16/22] target/microblaze: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 17/22] target/ppc: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 18/22] target/s390x: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 19/22] target/sparc: " Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 20/22] hw/core/cpu: Remove @CPUState::as field Philippe Mathieu-Daudé
2025-10-01 15:05 ` [PATCH 21/22] exec/cpu: Declare cpu_memory_rw_debug() in 'hw/core/cpu.h' and document Philippe Mathieu-Daudé
2025-10-06 19:08   ` Philippe Mathieu-Daudé
2025-10-08 16:25   ` Zhao Liu
2025-10-01 15:05 ` [PATCH 22/22] target/sparc: Reduce inclusions of 'exec/cpu-common.h' Philippe Mathieu-Daudé
2025-10-01 15:39 ` [PATCH 00/22] hw/core/cpu: Remove @CPUState::as field BALATON Zoltan
2025-10-01 16:08 ` Peter Maydell
2025-10-01 16:35   ` Richard Henderson
2025-10-01 16:42     ` Philippe Mathieu-Daudé
2025-10-01 18:38       ` Philippe Mathieu-Daudé

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