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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Alistair Francis" <alistair.francis@wdc.com>,
	qemu-riscv@nongnu.org, "Max Filippov" <jcmvbkbc@gmail.com>,
	"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
	"Weiwei Li" <liwei1518@gmail.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Artyom Tarasenko" <atar4qemu@gmail.com>,
	"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 3/6] target/riscv/kvm: Replace legacy cpu_physical_memory_read/write() calls
Date: Thu,  2 Oct 2025 16:57:38 +0200	[thread overview]
Message-ID: <20251002145742.75624-4-philmd@linaro.org> (raw)
In-Reply-To: <20251002145742.75624-1-philmd@linaro.org>

Commit b7ecba0f6f6 ("docs/devel/loads-stores.rst: Document our
various load and store APIs") mentioned cpu_physical_memory_*()
methods are legacy, the replacement being address_space_*().

Since the SBI DBCN is handled within a vCPU context, use its
default address space. Replace using the address space API.
As with the previous implementation, ignore whether the memory
accesses succeeded or failed.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/riscv/kvm/kvm-cpu.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
index 5c19062c19b..0c2f21fd1a1 100644
--- a/target/riscv/kvm/kvm-cpu.c
+++ b/target/riscv/kvm/kvm-cpu.c
@@ -36,6 +36,7 @@
 #include "hw/pci/pci.h"
 #include "exec/memattrs.h"
 #include "system/address-spaces.h"
+#include "system/memory.h"
 #include "hw/boards.h"
 #include "hw/irq.h"
 #include "hw/intc/riscv_imsic.h"
@@ -1564,6 +1565,7 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 
 static void kvm_riscv_handle_sbi_dbcn(CPUState *cs, struct kvm_run *run)
 {
+    const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED;
     g_autofree uint8_t *buf = NULL;
     RISCVCPU *cpu = RISCV_CPU(cs);
     target_ulong num_bytes;
@@ -1602,9 +1604,9 @@ static void kvm_riscv_handle_sbi_dbcn(CPUState *cs, struct kvm_run *run)
                 exit(1);
             }
 
-            cpu_physical_memory_write(addr, buf, ret);
+            address_space_write(cs->as, addr, attrs, buf, ret);
         } else {
-            cpu_physical_memory_read(addr, buf, num_bytes);
+            address_space_read(cs->as, addr, attrs, buf, num_bytes);
 
             ret = qemu_chr_fe_write_all(serial_hd(0)->be, buf, num_bytes);
             if (ret < 0) {
-- 
2.51.0



  parent reply	other threads:[~2025-10-02 15:00 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-02 14:57 [PATCH 0/6] target: Remove remnant legacy cpu_physical_memory_*() calls Philippe Mathieu-Daudé
2025-10-02 14:57 ` [PATCH 1/6] target/i386/monitor: Propagate CPU address space to 'info mem' handlers Philippe Mathieu-Daudé
2025-10-08 14:04   ` Manos Pitsidianakis
2025-10-02 14:57 ` [PATCH 2/6] target/i386/monitor: Replace legacy cpu_physical_memory_read() calls Philippe Mathieu-Daudé
2025-10-08 14:03   ` Manos Pitsidianakis
2025-10-02 14:57 ` Philippe Mathieu-Daudé [this message]
2025-10-08 14:01   ` [PATCH 3/6] target/riscv/kvm: Replace legacy cpu_physical_memory_read/write() calls Manos Pitsidianakis
2025-10-02 14:57 ` [PATCH 4/6] target/riscv/monitor: Replace legacy cpu_physical_memory_read() call Philippe Mathieu-Daudé
2025-10-08 14:00   ` Manos Pitsidianakis
2025-10-02 14:57 ` [PATCH 5/6] target/xtensa: Replace legacy cpu_physical_memory_[un]map() calls Philippe Mathieu-Daudé
2025-10-08 13:57   ` Manos Pitsidianakis
2025-10-02 14:57 ` [PATCH 6/6] target/sparc: Reduce inclusions of 'exec/cpu-common.h' Philippe Mathieu-Daudé
2025-10-08 13:58   ` Manos Pitsidianakis
2025-10-16 15:08 ` [PATCH 0/6] target: Remove remnant legacy cpu_physical_memory_*() calls Philippe Mathieu-Daudé

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