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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e619c396esm85237665e9.8.2025.10.02.07.58.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 02 Oct 2025 07:58:07 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Alistair Francis , qemu-riscv@nongnu.org, Max Filippov , Liu Zhiwei , Weiwei Li , Zhao Liu , Paolo Bonzini , Artyom Tarasenko , Daniel Henrique Barboza , Palmer Dabbelt , Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 5/6] target/xtensa: Replace legacy cpu_physical_memory_[un]map() calls Date: Thu, 2 Oct 2025 16:57:40 +0200 Message-ID: <20251002145742.75624-6-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251002145742.75624-1-philmd@linaro.org> References: <20251002145742.75624-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Commit b7ecba0f6f6 ("docs/devel/loads-stores.rst: Document our various load and store APIs") mentioned cpu_physical_memory_*() methods are legacy, the replacement being address_space_*(). Replace the *_map() / *_unmap() methods in the SIMCALL helper, using the vCPU default address space. No behavioral change expected. Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/xtensa-semi.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c index 636f421da2b..431c263dc57 100644 --- a/target/xtensa/xtensa-semi.c +++ b/target/xtensa/xtensa-semi.c @@ -32,6 +32,7 @@ #include "exec/target_page.h" #include "semihosting/semihost.h" #include "semihosting/uaccess.h" +#include "system/memory.h" #include "qapi/error.h" #include "qemu/log.h" @@ -192,7 +193,9 @@ void xtensa_sim_open_console(Chardev *chr) void HELPER(simcall)(CPUXtensaState *env) { + const MemTxAttrs attrs = MEMTXATTRS_UNSPECIFIED; CPUState *cs = env_cpu(env); + AddressSpace *as = cs->as; uint32_t *regs = env->regs; switch (regs[2]) { @@ -215,7 +218,7 @@ void HELPER(simcall)(CPUXtensaState *env) TARGET_PAGE_SIZE - (vaddr & (TARGET_PAGE_SIZE - 1)); uint32_t io_sz = page_left < len ? page_left : len; hwaddr sz = io_sz; - void *buf = cpu_physical_memory_map(paddr, &sz, !is_write); + void *buf = address_space_map(as, paddr, &sz, !is_write, attrs); uint32_t io_done; bool error = false; @@ -261,7 +264,7 @@ void HELPER(simcall)(CPUXtensaState *env) error = true; io_done = 0; } - cpu_physical_memory_unmap(buf, sz, !is_write, io_done); + address_space_unmap(as, buf, sz, !is_write, io_done); } else { error = true; regs[3] = TARGET_EINVAL; @@ -408,11 +411,11 @@ void HELPER(simcall)(CPUXtensaState *env) while (sz) { hwaddr len = sz; - void *buf = cpu_physical_memory_map(base, &len, 1); + void *buf = address_space_map(as, base, &len, true, attrs); if (buf && len) { memset(buf, regs[4], len); - cpu_physical_memory_unmap(buf, len, 1, len); + address_space_unmap(as, buf, len, true, len); } else { len = 1; } -- 2.51.0