qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, Pierrick Bouvier <pierrick.bouvier@linaro.org>
Subject: [PATCH v6 05/73] target/arm: Force HPD for stage2 translations
Date: Fri,  3 Oct 2025 10:06:52 -0700	[thread overview]
Message-ID: <20251003170800.997167-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20251003170800.997167-1-richard.henderson@linaro.org>

Stage2 translations do not have hierarchial permissions.
Setting HPD means we can eliminate an extra check against
regime_is_stage2.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/helper.c |  7 +++++--
 target/arm/ptw.c    | 24 +++++++++++++-----------
 2 files changed, 18 insertions(+), 13 deletions(-)

diff --git a/target/arm/helper.c b/target/arm/helper.c
index c9a8012880..c19345dec8 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9391,8 +9391,11 @@ ARMVAParameters aa64_va_parameters(CPUARMState *env, uint64_t va,
         tsz = extract32(tcr, 0, 6);
         gran = tg0_to_gran_size(extract32(tcr, 14, 2));
         if (stage2) {
-            /* VTCR_EL2 */
-            hpd = false;
+            /*
+             * Stage2 does not have hierarchical permissions.
+             * Thus disabling them makes things easier during ptw.
+             */
+            hpd = true;
         } else {
             hpd = extract32(tcr, 24, 1);
         }
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 6344971fa6..ebb260d54d 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -1471,8 +1471,12 @@ static ARMVAParameters aa32_va_parameters(CPUARMState *env, uint32_t va,
         }
         tsz = sextract32(tcr, 0, 4) + 8;
         select = 0;
-        hpd = false;
         epd = false;
+        /*
+         * Stage2 does not have hierarchical permissions.
+         * Thus disabling them makes things easier during ptw.
+         */
+        hpd = true;
     } else if (el == 2) {
         /* HTCR */
         tsz = extract32(tcr, 0, 3);
@@ -1978,16 +1982,14 @@ static bool get_phys_addr_lpae(CPUARMState *env, S1Translate *ptw,
      * except NSTable (which we have already handled).
      */
     attrs = new_descriptor & (MAKE_64BIT_MASK(2, 10) | MAKE_64BIT_MASK(50, 14));
-    if (!regime_is_stage2(mmu_idx)) {
-        if (!param.hpd) {
-            attrs |= extract64(tableattrs, 0, 2) << 53;     /* XN, PXN */
-            /*
-             * The sense of AP[1] vs APTable[0] is reversed, as APTable[0] == 1
-             * means "force PL1 access only", which means forcing AP[1] to 0.
-             */
-            attrs &= ~(extract64(tableattrs, 2, 1) << 6); /* !APT[0] => AP[1] */
-            attrs |= extract32(tableattrs, 3, 1) << 7;    /* APT[1] => AP[2] */
-        }
+    if (!param.hpd) {
+        attrs |= extract64(tableattrs, 0, 2) << 53;     /* XN, PXN */
+        /*
+         * The sense of AP[1] vs APTable[0] is reversed, as APTable[0] == 1
+         * means "force PL1 access only", which means forcing AP[1] to 0.
+         */
+        attrs &= ~(extract64(tableattrs, 2, 1) << 6); /* !APT[0] => AP[1] */
+        attrs |= extract32(tableattrs, 3, 1) << 7;    /* APT[1] => AP[2] */
     }
 
     ap = extract32(attrs, 6, 2);
-- 
2.43.0



  parent reply	other threads:[~2025-10-03 17:24 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-03 17:06 [PATCH v6 00/73] target/arm: Implement FEAT_GCS Richard Henderson
2025-10-03 17:06 ` [PATCH v6 01/73] tests/functional: update tests using TF-A/TF-RMM to support FEAT_GCS Richard Henderson
2025-10-03 17:06 ` [PATCH v6 02/73] target/arm: Add isar feature test for FEAT_S1PIE, FEAT_S2PIE Richard Henderson
2025-10-03 17:06 ` [PATCH v6 03/73] target/arm: Enable TCR2_ELx.PIE Richard Henderson
2025-10-03 17:06 ` [PATCH v6 04/73] target/arm: Implement PIR_ELx, PIRE0_ELx, S2PIR_EL2 registers Richard Henderson
2025-10-03 17:06 ` Richard Henderson [this message]
2025-10-03 17:06 ` [PATCH v6 06/73] target/arm: Cache NV1 early in get_phys_addr_lpae Richard Henderson
2025-10-03 17:06 ` [PATCH v6 07/73] target/arm: Populate PIE in aa64_va_parameters Richard Henderson
2025-10-03 17:06 ` [PATCH v6 08/73] target/arm: Implement get_S1prot_indirect Richard Henderson
2025-10-03 17:06 ` [PATCH v6 09/73] target/arm: Implement get_S2prot_indirect Richard Henderson
2025-10-03 17:06 ` [PATCH v6 10/73] target/arm: Expand CPUARMState.exception.syndrome to 64 bits Richard Henderson
2025-10-03 17:06 ` [PATCH v6 11/73] target/arm: Expand syndrome parameter to raise_exception* Richard Henderson
2025-10-03 17:06 ` [PATCH v6 12/73] target/arm: Implement dirtybit check for PIE Richard Henderson
2025-10-03 17:07 ` [PATCH v6 13/73] target/arm: Enable FEAT_S1PIE and FEAT_S2PIE on -cpu max Richard Henderson
2025-10-03 17:07 ` [PATCH v6 14/73] include/exec/memopidx: Adjust for 32 mmu indexes Richard Henderson
2025-10-03 17:07 ` [PATCH v6 15/73] include/hw/core/cpu: Widen MMUIdxMap Richard Henderson
2025-10-03 17:07 ` [PATCH v6 16/73] target/arm: Split out mmuidx.h from cpu.h Richard Henderson
2025-10-03 17:07 ` [PATCH v6 17/73] target/arm: Convert arm_mmu_idx_to_el from switch to table Richard Henderson
2025-10-03 17:07 ` [PATCH v6 18/73] target/arm: Remove unused env argument from regime_el Richard Henderson
2025-10-03 17:07 ` [PATCH v6 19/73] target/arm: Convert regime_el from switch to table Richard Henderson
2025-10-03 17:07 ` [PATCH v6 20/73] target/arm: Convert regime_has_2_ranges " Richard Henderson
2025-10-03 17:07 ` [PATCH v6 21/73] target/arm: Remove unused env argument from regime_is_pan Richard Henderson
2025-10-03 17:07 ` [PATCH v6 22/73] target/arm: Convert regime_is_pan from switch to table Richard Henderson
2025-10-03 17:07 ` [PATCH v6 23/73] target/arm: Remove unused env argument from regime_is_user Richard Henderson
2025-10-03 17:07 ` [PATCH v6 24/73] target/arm: Convert regime_is_user from switch to table Richard Henderson
2025-10-03 17:07 ` [PATCH v6 25/73] target/arm: Convert arm_mmu_idx_is_stage1_of_2 " Richard Henderson
2025-10-03 17:07 ` [PATCH v6 26/73] target/arm: Convert regime_is_stage2 " Richard Henderson
2025-10-03 17:07 ` [PATCH v6 27/73] target/arm: Introduce mmu indexes for GCS Richard Henderson
2025-10-03 17:07 ` [PATCH v6 28/73] target/arm: Introduce regime_to_gcs Richard Henderson
2025-10-03 17:07 ` [PATCH v6 29/73] target/arm: Support page protections for GCS mmu indexes Richard Henderson
2025-10-03 17:07 ` [PATCH v6 30/73] target/arm: Implement gcs bit for data abort Richard Henderson
2025-10-03 17:07 ` [PATCH v6 31/73] target/arm: Add GCS cpregs Richard Henderson
2025-10-03 17:07 ` [PATCH v6 32/73] target/arm: Add GCS enable and trap levels to DisasContext Richard Henderson
2025-10-03 17:07 ` [PATCH v6 33/73] target/arm: Implement FEAT_CHK Richard Henderson
2025-10-03 17:07 ` [PATCH v6 34/73] target/arm: Make helper_exception_return system-only Richard Henderson
2025-10-07  9:54   ` Peter Maydell
2025-10-03 17:07 ` [PATCH v6 35/73] target/arm: Export cpsr_{read_for, write_from}_spsr_elx Richard Henderson
2025-10-07  9:56   ` Peter Maydell
2025-10-03 17:07 ` [PATCH v6 36/73] target/arm: Expand pstate to 64 bits Richard Henderson
2025-10-07  9:58   ` Peter Maydell
2025-10-03 17:07 ` [PATCH v6 37/73] target/arm: Add syndrome data for EC_GCS Richard Henderson
2025-10-03 17:07 ` [PATCH v6 38/73] target/arm: Add arm_hcr_el2_nvx_eff Richard Henderson
2025-10-07 10:13   ` Peter Maydell
2025-10-03 17:07 ` [PATCH v6 39/73] target/arm: Use arm_hcr_el2_nvx_eff in access_nv1 Richard Henderson
2025-10-07 10:13   ` Peter Maydell
2025-10-03 17:07 ` [PATCH v6 40/73] target/arm: Split out access_nv1_with_nvx Richard Henderson
2025-10-07 10:14   ` Peter Maydell
2025-10-03 17:07 ` [PATCH v6 41/73] target/arm: Implement EXLOCKException for ELR_ELx and SPSR_ELx Richard Henderson
2025-10-03 17:07 ` [PATCH v6 42/73] target/arm: Split {full,core}_a64_user_mem_index Richard Henderson
2025-10-03 17:07 ` [PATCH v6 43/73] target/arm: Introduce delay_exception{_el} Richard Henderson
2025-10-03 17:07 ` [PATCH v6 44/73] target/arm: Emit HSTR trap exception out of line Richard Henderson
2025-10-03 17:07 ` [PATCH v6 45/73] target/arm: Emit v7m LTPSIZE " Richard Henderson
2025-10-03 17:07 ` [PATCH v6 46/73] target/arm: Implement GCSSTR, GCSSTTR Richard Henderson
2025-10-03 17:07 ` [PATCH v6 47/73] target/arm: Implement GCSB Richard Henderson
2025-10-03 17:07 ` [PATCH v6 48/73] target/arm: Implement GCSPUSHM Richard Henderson
2025-10-07 10:17   ` Peter Maydell
2025-10-07 14:03     ` Richard Henderson
2025-10-03 17:07 ` [PATCH v6 49/73] target/arm: Implement GCSPOPM Richard Henderson
2025-10-03 17:07 ` [PATCH v6 50/73] target/arm: Implement GCSPUSHX Richard Henderson
2025-10-03 17:07 ` [PATCH v6 51/73] target/arm: Implement GCSPOPX Richard Henderson
2025-10-03 17:07 ` [PATCH v6 52/73] target/arm: Implement GCSPOPCX Richard Henderson
2025-10-03 17:07 ` [PATCH v6 53/73] target/arm: Implement GCSSS1 Richard Henderson
2025-10-03 17:07 ` [PATCH v6 54/73] target/arm: Implement GCSSS2 Richard Henderson
2025-10-03 17:07 ` [PATCH v6 55/73] target/arm: Add gcs record for BL Richard Henderson
2025-10-03 17:07 ` [PATCH v6 56/73] target/arm: Add gcs record for BLR Richard Henderson
2025-10-03 17:07 ` [PATCH v6 57/73] target/arm: Add gcs record for BLR with PAuth Richard Henderson
2025-10-03 17:07 ` [PATCH v6 58/73] target/arm: Load gcs record for RET Richard Henderson
2025-10-03 17:07 ` [PATCH v6 59/73] target/arm: Load gcs record for RET with PAuth Richard Henderson
2025-10-03 17:07 ` [PATCH v6 60/73] target/arm: Copy EXLOCKEn to EXLOCK on exception to the same EL Richard Henderson
2025-10-03 17:07 ` [PATCH v6 61/73] target/arm: Implement EXLOCK check during exception return Richard Henderson
2025-10-03 17:07 ` [PATCH v6 62/73] target/arm: Enable FEAT_GCS with -cpu max Richard Henderson
2025-10-03 17:07 ` [PATCH v6 63/73] linux-user/aarch64: Implement prctls for GCS Richard Henderson
2025-10-03 17:07 ` [PATCH v6 64/73] linux-user/aarch64: Allocate new gcs stack on clone Richard Henderson
2025-10-03 17:07 ` [PATCH v6 65/73] linux-user/aarch64: Release gcs stack on thread exit Richard Henderson
2025-10-03 17:07 ` [PATCH v6 66/73] linux-user/aarch64: Implement map_shadow_stack syscall Richard Henderson
2025-10-03 17:07 ` [PATCH v6 67/73] target/arm: Enable GCSPR_EL0 for read in user-mode Richard Henderson
2025-10-03 17:07 ` [PATCH v6 68/73] linux-user/aarch64: Inject SIGSEGV for GCS faults Richard Henderson
2025-10-03 17:07 ` [PATCH v6 69/73] linux-user/aarch64: Generate GCS signal records Richard Henderson
2025-10-03 17:07 ` [PATCH v6 70/73] linux-user/aarch64: Enable GCS in HWCAP Richard Henderson
2025-10-03 17:07 ` [PATCH v6 71/73] tests/tcg/aarch64: Add gcsstr Richard Henderson
2025-10-03 17:07 ` [PATCH v6 72/73] tests/tcg/aarch64: Add gcspushm Richard Henderson
2025-10-03 17:08 ` [PATCH v6 73/73] tests/tcg/aarch64: Add gcsss Richard Henderson
2025-10-07 14:26 ` [PATCH v6 00/73] target/arm: Implement FEAT_GCS Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20251003170800.997167-6-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=pierrick.bouvier@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).