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From: Guenter Roeck <linux@roeck-us.net>
To: "Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
	Alistair Francis <alistair@alistair23.me>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: Jason Wang <jasowang@redhat.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	qemu-arm@nongnu.org, qemu-devel@nongnu.org,
	qemu-riscv@nongnu.org, Guenter Roeck <linux@roeck-us.net>
Subject: [PATCH 4/4] microchip icicle: Enable PCS on Cadence Ethernet
Date: Sat,  4 Oct 2025 13:00:49 -0700	[thread overview]
Message-ID: <20251004200049.871646-5-linux@roeck-us.net> (raw)
In-Reply-To: <20251004200049.871646-1-linux@roeck-us.net>

PCS needs to be enabled for SGMII to be supported by the Linux kernel.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
---
 hw/riscv/microchip_pfsoc.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 6e2a6e721b..5d3007e8d3 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -415,6 +415,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
     object_property_set_int(OBJECT(&s->gem0), "revision", GEM_REVISION, errp);
     object_property_set_int(OBJECT(&s->gem0), "phy-addr", 8, errp);
     object_property_set_bool(OBJECT(&s->gem0), "phy-connected", false, errp);
+    object_property_set_bool(OBJECT(&s->gem0), "pcs-enabled", true, errp);
 
     sysbus_realize(SYS_BUS_DEVICE(&s->gem0), errp);
     sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem0), 0,
@@ -426,6 +427,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
     object_property_set_int(OBJECT(&s->gem1), "phy-addr", 9, errp);
     object_property_set_link(OBJECT(&s->gem1), "phy-consumer",
                              OBJECT(&s->gem0), errp);
+    object_property_set_bool(OBJECT(&s->gem1), "pcs-enabled", true, errp);
     sysbus_realize(SYS_BUS_DEVICE(&s->gem1), errp);
     sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem1), 0,
                     memmap[MICROCHIP_PFSOC_GEM1].base);
-- 
2.45.2



  parent reply	other threads:[~2025-10-04 20:02 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-04 20:00 [PATCH 0/4] Fix Ethernet interface support for microchip-icicle-kit Guenter Roeck
2025-10-04 20:00 ` [PATCH 1/4] hw/net/cadence_gem: Support two Ethernet interfaces connected to single MDIO bus Guenter Roeck
2025-10-15  2:18   ` Alistair Francis
2025-10-04 20:00 ` [PATCH 2/4] hw/riscv: microchip_pfsoc: Connect Ethernet PHY channels Guenter Roeck
2025-10-15  2:20   ` Alistair Francis
2025-10-04 20:00 ` [PATCH 3/4] hw/net/cadence_gem: Add pcs-enabled property Guenter Roeck
2025-10-15  2:23   ` Alistair Francis
2025-10-04 20:00 ` Guenter Roeck [this message]
2025-10-15  2:23   ` [PATCH 4/4] microchip icicle: Enable PCS on Cadence Ethernet Alistair Francis
2025-10-15  3:03 ` [PATCH 0/4] Fix Ethernet interface support for microchip-icicle-kit Alistair Francis
2025-10-15  9:04   ` Conor Dooley

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