From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DA82ACCA476 for ; Tue, 7 Oct 2025 14:24:55 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1v68Px-0005eG-4d; Tue, 07 Oct 2025 10:11:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1v68Pv-0005dV-FH for qemu-devel@nongnu.org; Tue, 07 Oct 2025 10:11:51 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1v68Pl-00027s-DV for qemu-devel@nongnu.org; Tue, 07 Oct 2025 10:11:50 -0400 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-46e4f2696bdso76063815e9.0 for ; Tue, 07 Oct 2025 07:11:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1759846295; x=1760451095; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=WzKtm5z1NdBKQnAeIvK0vpQjvPUt/rdIZw8KrD8qmxU=; b=GkP3FANh/IfqQ70aO+N5pVX5IWJwhWoc+RkU4ABRzp0fTXFC1gRr6psq4CvJ2k3JXJ FYswv6GTDwNByr4Axhkt93uF49ecmIVHja6OR7GTUhHTixvIzMBaKSoUaONe+Bnwh8q1 lpf/NhDHXV0i76KIiZ7EAGF5Hfp3gCZJhrHMZnAlEcKvLd0FXwH8RdUxBUwVzRJ+1bYo TnGgj6Jt9Qw7owj66DoBMlEHgqqArsZyfy4H5LmER9snMupHDAsS4weeb/PJf2d1M6XK c9E56TgNZgldtsOaHDwi2iJ9lxIeqlQylVy8NBiDg+q6bsz2N+xPIfC+mwHh6xDYmdWd BnuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1759846295; x=1760451095; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WzKtm5z1NdBKQnAeIvK0vpQjvPUt/rdIZw8KrD8qmxU=; b=gCUPIIFSla0da9GwoqtWldxyDJXP2CHrbVx13UZTuo73VD07d1YOS95SzgHL2Bo8TE 1rNBYJ8IfmC5sGyTOgKIeXsZ3ebZDlp9QjaAT1lmL0vgdW25ANRRVC0I1aYBczScnkjA F1SGU3+paxyi90LpVC+lLZgyKwrl1O5aHAHqTpT51pjHADi6QeRT1XpH/kNeA6X/M7zk dqPiDIUWJfd3u3cj2qq4FG1IQKkNqsYGF09SM6gp24yWrz+EiVT+XtI7rYdgNHePeuzw T7Asvq9zHzSeVrCn95j4bxS0f21B4UFFCzFIwieDTJpViROeY2AdqUBTWg6rAknaaHzZ dmMQ== X-Gm-Message-State: AOJu0YzEWxGf87RWSkd81kkVDsdB1B3Sc8eXYdNNwZb5joNefnSvlNvT OxnKP6xwDAvfL6K2TJv8CY1+EVScB8kNQKmfHpPLexP20WXSucTJQGCduzR64dmb+KRHwcuvP8u xysoO X-Gm-Gg: ASbGncuTsKsFRF3IbqBUGyaQ+MMNaNksO/ZSMCBcif+jyvzxHC8rj5YZ0I6+9cdM5iV ZsdGWDVqvGbQPabuh945v49SRET+GVTlZZMMz1RvFE4vccbB6l7cGdBZ7ln8m6k23IfC5swpubB OOd/wZLRQfdNxgLiSMR80ClqtnzcBVF9K63aZXK14YGHLzuZCVoa0CP6Z6VgXvar9WJvXplPgCo 35FB6bwm8PDJM9mPeE9doXKk2raO22x+DWDvv+VYaxD61c+xCwfh5UQF/KUqwR3WFWvZ/sIXwea 9fghGfJwtSJplg9PmX+mK4cVs5GIfAxhSJthnjnH09ovU3NgGz8nNwvvS6GYE9o4K57NJzCR1w2 5NYmm2211uIfiitFecGAs8mutufWG7t4oFtFLrpcpKrhTDw4W9NyKLRpi X-Google-Smtp-Source: AGHT+IEhylTqPRafFct95ZZMeDgOUyxLkty3aLAX4foiVFOFAGYfsoAYRtODE4ipa+NgYDZn6PgW1A== X-Received: by 2002:a05:600c:4510:b0:46d:cfc9:1d0f with SMTP id 5b1f17b1804b1-46e71142f48mr106124445e9.19.1759846295204; Tue, 07 Oct 2025 07:11:35 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46e78c5d290sm167037135e9.0.2025.10.07.07.11.34 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Oct 2025 07:11:34 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/62] hw/arm/xlnx-versal: xram: refactor creation Date: Tue, 7 Oct 2025 15:10:29 +0100 Message-ID: <20251007141123.3239867-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251007141123.3239867-1-peter.maydell@linaro.org> References: <20251007141123.3239867-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Luc Michel Refactor the XRAM devices creation using the VersalMap structure. Signed-off-by: Luc Michel Reviewed-by: Francisco Iglesias Reviewed-by: Edgar E. Iglesias Tested-by: Philippe Mathieu-Daudé Message-id: 20250926070806.292065-9-luc.michel@amd.com Signed-off-by: Peter Maydell --- include/hw/arm/xlnx-versal.h | 6 ---- hw/arm/xlnx-versal.c | 59 +++++++++++++++++++++--------------- 2 files changed, 35 insertions(+), 30 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index 4eeea98ff34..71c3314b8b4 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -20,7 +20,6 @@ #include "hw/rtc/xlnx-zynqmp-rtc.h" #include "qom/object.h" #include "hw/usb/xlnx-usb-subsystem.h" -#include "hw/misc/xlnx-versal-xramc.h" #include "hw/nvram/xlnx-bbram.h" #include "hw/nvram/xlnx-versal-efuse.h" #include "hw/ssi/xlnx-versal-ospi.h" @@ -88,11 +87,6 @@ struct Versal { ARMCPU cpu[XLNX_VERSAL_NR_RCPUS]; } rpu; - struct { - OrIRQState irq_orgate; - XlnxXramCtrl ctrl[XLNX_VERSAL_NR_XRAM]; - } xram; - XlnxVersalCRL crl; } lpd; diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 5c2bd4be1f7..295fca3d60d 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -31,6 +31,7 @@ #include "hw/sd/sdhci.h" #include "hw/net/cadence_gem.h" #include "hw/dma/xlnx-zdma.h" +#include "hw/misc/xlnx-versal-xramc.h" #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") @@ -71,6 +72,14 @@ typedef struct VersalMap { } zdma[2]; size_t num_zdma; + struct VersalXramMap { + uint64_t mem; + uint64_t mem_stride; + uint64_t ctrl; + uint64_t ctrl_stride; + int irq; + size_t num; + } xram; } VersalMap; static const VersalMap VERSAL_MAP = { @@ -92,6 +101,13 @@ static const VersalMap VERSAL_MAP = { .zdma[0] = { "adma", { 0xffa80000, 60 }, 8, 0x10000, 1 }, .num_zdma = 1, + + .xram = { + .num = 4, + .mem = 0xfe800000, .mem_stride = 1 * MiB, + .ctrl = 0xff8e0000, .ctrl_stride = 0x10000, + .irq = 79, + }, }; static const VersalMap *VERSION_TO_MAP[] = { @@ -641,37 +657,31 @@ static void versal_create_trng(Versal *s, qemu_irq *pic) sysbus_connect_irq(sbd, 0, pic[VERSAL_TRNG_IRQ]); } -static void versal_create_xrams(Versal *s, qemu_irq *pic) +static void versal_create_xrams(Versal *s, const struct VersalXramMap *map) { - int nr_xrams = ARRAY_SIZE(s->lpd.xram.ctrl); - DeviceState *orgate; - int i; + SysBusDevice *sbd; + MemoryRegion *mr; + DeviceState *or; + size_t i; - /* XRAM IRQs get ORed into a single line. */ - object_initialize_child(OBJECT(s), "xram-irq-orgate", - &s->lpd.xram.irq_orgate, TYPE_OR_IRQ); - orgate = DEVICE(&s->lpd.xram.irq_orgate); - object_property_set_int(OBJECT(orgate), - "num-lines", nr_xrams, &error_fatal); - qdev_realize(orgate, NULL, &error_fatal); - qdev_connect_gpio_out(orgate, 0, pic[VERSAL_XRAM_IRQ_0]); + or = create_or_gate(s, OBJECT(s), "xram-orgate", map->num, map->irq); - for (i = 0; i < ARRAY_SIZE(s->lpd.xram.ctrl); i++) { - SysBusDevice *sbd; - MemoryRegion *mr; + for (i = 0; i < map->num; i++) { + hwaddr ctrl, mem; - object_initialize_child(OBJECT(s), "xram[*]", &s->lpd.xram.ctrl[i], - TYPE_XLNX_XRAM_CTRL); - sbd = SYS_BUS_DEVICE(&s->lpd.xram.ctrl[i]); - sysbus_realize(sbd, &error_fatal); + sbd = SYS_BUS_DEVICE(qdev_new(TYPE_XLNX_XRAM_CTRL)); + object_property_add_child(OBJECT(s), "xram[*]", OBJECT(sbd)); + sysbus_realize_and_unref(sbd, &error_fatal); + + ctrl = map->ctrl + map->ctrl_stride * i; + mem = map->mem + map->mem_stride * i; mr = sysbus_mmio_get_region(sbd, 0); - memory_region_add_subregion(&s->mr_ps, - MM_XRAMC + i * MM_XRAMC_SIZE, mr); + memory_region_add_subregion(&s->mr_ps, ctrl, mr); mr = sysbus_mmio_get_region(sbd, 1); - memory_region_add_subregion(&s->mr_ps, MM_XRAM + i * MiB, mr); + memory_region_add_subregion(&s->mr_ps, mem, mr); - sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(orgate, i)); + sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(or, i)); } } @@ -1196,11 +1206,12 @@ static void versal_realize(DeviceState *dev, Error **errp) versal_create_zdma(s, &map->zdma[i]); } + versal_create_xrams(s, &map->xram); + versal_create_usbs(s, pic); versal_create_pmc_apb_irq_orgate(s, pic); versal_create_rtc(s, pic); versal_create_trng(s, pic); - versal_create_xrams(s, pic); versal_create_bbram(s, pic); versal_create_efuse(s, pic); versal_create_pmc_iou_slcr(s, pic); -- 2.43.0