[PATCH 0/2] target/xtensa: Remove all uses of target_ulong type

[PATCH 0/2] target/xtensa: Remove all uses of target_ulong type

[Philippe Mathieu-Daudé]

Remove the left over target_ulong uses in Xtensa frontend.

Philippe Mathieu-Daudé (2):
  target/xtensa: Remove target_ulong use in xtensa_tr_translate_insn()
  target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state()

 target/xtensa/cpu.c       | 6 +++---
 target/xtensa/translate.c | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

-- 
2.51.0

[PATCH 1/2] target/xtensa: Remove target_ulong use in xtensa_tr_translate_insn()

[Philippe Mathieu-Daudé]

Since commit 85c19af63e7 ("include/exec: Use vaddr in DisasContextBase
for virtual addresses") the DisasContextBase::pc_first field is a
vaddr type.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/xtensa/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 34ae2f4e162..bb8d2ed86cf 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -1166,7 +1166,7 @@ static void xtensa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
 {
     DisasContext *dc = container_of(dcbase, DisasContext, base);
     CPUXtensaState *env = cpu_env(cpu);
-    target_ulong page_start;
+    vaddr page_start;
 
     /* These two conditions only apply to the first insn in the TB,
        but this is the first TranslateOps hook that allows exiting.  */
-- 
2.51.0

[PATCH 2/2] target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state()

[Philippe Mathieu-Daudé]

Since commit bb5de52524c ("target: Widen pc/cs_base in
cpu_get_tb_cpu_state"), cpu_get_tb_cpu_state() expects
a uint64_t type for cs_base.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/xtensa/cpu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index ea9b6df3aa2..1eeed44e336 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -59,13 +59,13 @@ static TCGTBCPUState xtensa_get_tb_cpu_state(CPUState *cs)
 {
     CPUXtensaState *env = cpu_env(cs);
     uint32_t flags = 0;
-    target_ulong cs_base = 0;
+    uint64_t cs_base = 0;
 
     flags |= xtensa_get_ring(env);
     if (env->sregs[PS] & PS_EXCM) {
         flags |= XTENSA_TBFLAG_EXCM;
     } else if (xtensa_option_enabled(env->config, XTENSA_OPTION_LOOP)) {
-        target_ulong lend_dist =
+        uint64_t lend_dist =
             env->sregs[LEND] - (env->pc & -(1u << TARGET_PAGE_BITS));
 
         /*
@@ -83,7 +83,7 @@ static TCGTBCPUState xtensa_get_tb_cpu_state(CPUState *cs)
          * for the TB that contains this instruction.
          */
         if (lend_dist < (1u << TARGET_PAGE_BITS) + env->config->max_insn_size) {
-            target_ulong lbeg_off = env->sregs[LEND] - env->sregs[LBEG];
+            uint64_t lbeg_off = env->sregs[LEND] - env->sregs[LBEG];
 
             cs_base = lend_dist;
             if (lbeg_off < 256) {
-- 
2.51.0

Re: [PATCH 1/2] target/xtensa: Remove target_ulong use in xtensa_tr_translate_insn()

[Anton Johansson via]

On 08/10/25, Philippe Mathieu-Daudé wrote:
> Since commit 85c19af63e7 ("include/exec: Use vaddr in DisasContextBase
> for virtual addresses") the DisasContextBase::pc_first field is a
> vaddr type.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  target/xtensa/translate.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
> index 34ae2f4e162..bb8d2ed86cf 100644
> --- a/target/xtensa/translate.c
> +++ b/target/xtensa/translate.c
> @@ -1166,7 +1166,7 @@ static void xtensa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
>  {
>      DisasContext *dc = container_of(dcbase, DisasContext, base);
>      CPUXtensaState *env = cpu_env(cpu);
> -    target_ulong page_start;
> +    vaddr page_start;
>  
>      /* These two conditions only apply to the first insn in the TB,
>         but this is the first TranslateOps hook that allows exiting.  */
> -- 
> 2.51.0
> 

Reviewed-by: Anton Johansson <anjo@rev.ng>

Re: [PATCH 2/2] target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state()

[Anton Johansson via]

On 08/10/25, Philippe Mathieu-Daudé wrote:
> Since commit bb5de52524c ("target: Widen pc/cs_base in
> cpu_get_tb_cpu_state"), cpu_get_tb_cpu_state() expects
> a uint64_t type for cs_base.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  target/xtensa/cpu.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Anton Johansson <anjo@rev.ng>

Re: [PATCH 0/2] target/xtensa: Remove all uses of target_ulong type

[Philippe Mathieu-Daudé]

On 8/10/25 07:15, Philippe Mathieu-Daudé wrote:
> Remove the left over target_ulong uses in Xtensa frontend.
> 
> Philippe Mathieu-Daudé (2):
>    target/xtensa: Remove target_ulong use in xtensa_tr_translate_insn()
>    target/xtensa: Remove target_ulong use in xtensa_get_tb_cpu_state()

Series queued, thanks.