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Thu, 09 Oct 2025 13:52:21 -0700 (PDT) Received: from [172.26.42.166] ([185.213.193.209]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-87bc3595df4sm2985426d6.51.2025.10.09.13.52.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Oct 2025 13:52:20 -0700 (PDT) From: Gabriel Brookman Date: Thu, 09 Oct 2025 16:51:11 -0400 Subject: [PATCH] target/hppa: correct size bit parity for fmpyadd MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-Id: <20251009-hppa-correct-fmpyadd-size-bit-decoding-v1-1-f63bb6c3290c@gmail.com> X-B4-Tracking: v=1; b=H4sIAD4g6GgC/x3NMQ6DMAxA0asgz7XkoGZIr1J1cGMDHppECapKE XcnYnzL/zs0raYNHsMOVb/WLKcOdxsgLpxmRZNuGGn0jijgUgpjzLVqXHH6lI1FsNlf8W0risY slmYkHzw5JtZ7gB4rVSf7XaPn6zhOiqe7sHgAAAA= X-Change-ID: 20251009-hppa-correct-fmpyadd-size-bit-decoding-059501a0ae49 To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller , Peter Maydell , =?utf-8?q?Andreas_H=C3=BCttel?= , Gabriel Brookman X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760043139; l=2657; i=brookmangabriel@gmail.com; s=20251009; h=from:subject:message-id; bh=i89NyhtNNnShtWBlfuC1TSS3ynCepKkxqLXcugH4S9I=; b=x7a6J/gy9+pP/vPzSjxhFU8W4TBdmf1ZnhzXVRdp4QnqyJl+dgAww0lYtGcmh+3dSLdPug/9i XNidzicfpphBGe18EFo7wTi6Fzs5CQveT0dIJEpmUrSgfM/Xob+B/n0 X-Developer-Key: i=brookmangabriel@gmail.com; a=ed25519; pk=m9TtPDal6WzoHNnQiHHKf8dTrv3DUCPUUTujuo8vNrw= Received-SPF: pass client-ip=2607:f8b0:4864:20::f2e; envelope-from=brookmangabriel@gmail.com; helo=mail-qv1-xf2e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For the fmpyadd instruction on the hppa architecture, there is a bit used to specify whether the instruction is operating on a 32 bit or 64 bit floating point register. For most instructions, such a bit is 0 when operating on the smaller register and 1 when operating on the larger register. However, according to page 6-57 of the PA-RISC 1.1 Architecture and Instruction Set Reference Manual, this convention is reversed for the fmpyadd instruction specifically, meaning the bit is 1 for operations on 32 bit registers and 0 for 64 bit registers. Previously, QEMU decoded this operation as operating on the other size of register, leading to bugs when translating the fmpyadd instruction. This patch fixes that issue. Reported-by: Andreas Hüttel Signed-off-by: Gabriel Brookman Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3096 --- Hi all, This patch fixes the decoding of the fmpyadd instruction on the hppa target, which uses an inverted bit convention to select between 32-bit and 64-bit floating-point registers. The issue was reported by Andreas Hüttel after observing incorrect behavior when running real binaries under that target. He kindly submitted a minimal reproducer which I was able to use to debug the issue. I used this reproducer to verify correct operation after my fix. Thanks, Gabriel Reported-by: Andreas Hüttel --- target/hppa/insns.decode | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 4eaac750ea..13c6a55bf2 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -365,10 +365,10 @@ fstd 011100 ..... ..... .. ............1. @ldstim11 &mpyadd rm1 rm2 ta ra tm @mpyadd ...... rm1:5 rm2:5 ta:5 ra:5 . tm:5 &mpyadd -fmpyadd_f 000110 ..... ..... ..... ..... 0 ..... @mpyadd -fmpyadd_d 000110 ..... ..... ..... ..... 1 ..... @mpyadd -fmpysub_f 100110 ..... ..... ..... ..... 0 ..... @mpyadd -fmpysub_d 100110 ..... ..... ..... ..... 1 ..... @mpyadd +fmpyadd_f 000110 ..... ..... ..... ..... 1 ..... @mpyadd +fmpyadd_d 000110 ..... ..... ..... ..... 0 ..... @mpyadd +fmpysub_f 100110 ..... ..... ..... ..... 1 ..... @mpyadd +fmpysub_d 100110 ..... ..... ..... ..... 0 ..... @mpyadd #### # Conditional Branches --- base-commit: 94474a7733a57365d5a27efc28c05462e90e8944 change-id: 20251009-hppa-correct-fmpyadd-size-bit-decoding-059501a0ae49 Best regards, -- Gabriel Brookman