From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Anton Johansson" <anjo@rev.ng>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
"Stafford Horne" <shorne@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH v2 02/10] target/openrisc: Explode MO_TExx -> MO_TE | MO_xx
Date: Thu, 9 Oct 2025 10:18:54 +0200 [thread overview]
Message-ID: <20251009081903.13426-3-philmd@linaro.org> (raw)
In-Reply-To: <20251009081903.13426-1-philmd@linaro.org>
Extract the implicit MO_TE definition in order to replace
it in the next commit.
Mechanical change using:
$ for n in UW UL UQ UO SW SL SQ; do \
sed -i -e "s/MO_TE$n/MO_TE | MO_$n/" \
$(git grep -l MO_TE$n target/openrisc); \
done
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/openrisc/translate.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c
index 5ab3bc7021d..df0ebcd3138 100644
--- a/target/openrisc/translate.c
+++ b/target/openrisc/translate.c
@@ -647,7 +647,7 @@ static bool trans_l_lwa(DisasContext *dc, arg_load *a)
check_r0_write(dc, a->d);
ea = tcg_temp_new();
tcg_gen_addi_tl(ea, cpu_R(dc, a->a), a->i);
- tcg_gen_qemu_ld_tl(cpu_R(dc, a->d), ea, dc->mem_idx, MO_TEUL);
+ tcg_gen_qemu_ld_tl(cpu_R(dc, a->d), ea, dc->mem_idx, MO_TE | MO_UL);
tcg_gen_mov_tl(cpu_lock_addr, ea);
tcg_gen_mov_tl(cpu_lock_value, cpu_R(dc, a->d));
return true;
@@ -665,13 +665,13 @@ static void do_load(DisasContext *dc, arg_load *a, MemOp mop)
static bool trans_l_lwz(DisasContext *dc, arg_load *a)
{
- do_load(dc, a, MO_TEUL);
+ do_load(dc, a, MO_TE | MO_UL);
return true;
}
static bool trans_l_lws(DisasContext *dc, arg_load *a)
{
- do_load(dc, a, MO_TESL);
+ do_load(dc, a, MO_TE | MO_SL);
return true;
}
@@ -689,13 +689,13 @@ static bool trans_l_lbs(DisasContext *dc, arg_load *a)
static bool trans_l_lhz(DisasContext *dc, arg_load *a)
{
- do_load(dc, a, MO_TEUW);
+ do_load(dc, a, MO_TE | MO_UW);
return true;
}
static bool trans_l_lhs(DisasContext *dc, arg_load *a)
{
- do_load(dc, a, MO_TESW);
+ do_load(dc, a, MO_TE | MO_SW);
return true;
}
@@ -713,7 +713,7 @@ static bool trans_l_swa(DisasContext *dc, arg_store *a)
val = tcg_temp_new();
tcg_gen_atomic_cmpxchg_tl(val, cpu_lock_addr, cpu_lock_value,
- cpu_R(dc, a->b), dc->mem_idx, MO_TEUL);
+ cpu_R(dc, a->b), dc->mem_idx, MO_TE | MO_UL);
tcg_gen_setcond_tl(TCG_COND_EQ, cpu_sr_f, val, cpu_lock_value);
tcg_gen_br(lab_done);
@@ -735,7 +735,7 @@ static void do_store(DisasContext *dc, arg_store *a, MemOp mop)
static bool trans_l_sw(DisasContext *dc, arg_store *a)
{
- do_store(dc, a, MO_TEUL);
+ do_store(dc, a, MO_TE | MO_UL);
return true;
}
@@ -747,7 +747,7 @@ static bool trans_l_sb(DisasContext *dc, arg_store *a)
static bool trans_l_sh(DisasContext *dc, arg_store *a)
{
- do_store(dc, a, MO_TEUW);
+ do_store(dc, a, MO_TE | MO_UW);
return true;
}
--
2.51.0
next prev parent reply other threads:[~2025-10-09 8:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-09 8:18 [PATCH v2 00/10] target/openrisc: Remove all uses of target_[u]long types Philippe Mathieu-Daudé
2025-10-09 8:18 ` [PATCH v2 01/10] target/openrisc: Replace VMSTATE_UINTTL() -> VMSTATE_UINT32() Philippe Mathieu-Daudé
2025-10-09 16:41 ` Richard Henderson
2025-10-09 8:18 ` Philippe Mathieu-Daudé [this message]
2025-10-09 16:43 ` [PATCH v2 02/10] target/openrisc: Explode MO_TExx -> MO_TE | MO_xx Richard Henderson
2025-10-10 6:56 ` Philippe Mathieu-Daudé
2025-10-09 8:18 ` [PATCH v2 03/10] target/openrisc: Replace MO_TE -> MO_BE Philippe Mathieu-Daudé
2025-10-09 9:19 ` Philippe Mathieu-Daudé
2025-10-09 8:18 ` [PATCH v2 04/10] target/openrisc: Do not use target_ulong for @mr in MTSPR helper Philippe Mathieu-Daudé
2025-10-09 16:45 ` Richard Henderson
2025-10-09 8:18 ` [PATCH v2 05/10] target/openrisc: Remove unused cpu_openrisc_map_address_*() handlers Philippe Mathieu-Daudé
2025-10-09 16:47 ` Richard Henderson
2025-10-09 8:18 ` [PATCH v2 06/10] target/openrisc: Remove target_ulong use in raise_mmu_exception() Philippe Mathieu-Daudé
2025-10-09 16:48 ` Richard Henderson
2025-10-09 8:18 ` [PATCH v2 07/10] target/openrisc: Use vaddr type for $pc jumps Philippe Mathieu-Daudé
2025-10-09 16:49 ` Richard Henderson
2025-10-09 8:19 ` [PATCH v2 08/10] target/openrisc: Remove 'TARGET_LONG_BITS != 32' dead code Philippe Mathieu-Daudé
2025-10-09 16:50 ` Richard Henderson
2025-10-09 8:19 ` [PATCH v2 09/10] target/openrisc: Inline tcg_gen_trunc_i64_tl() Philippe Mathieu-Daudé
2025-10-09 16:50 ` Richard Henderson
2025-10-09 8:19 ` [PATCH v2 10/10] target/openrisc: Replace target_ulong -> uint32_t Philippe Mathieu-Daudé
2025-10-09 16:52 ` Richard Henderson
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