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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fa9bf7f80sm72573535e9.1.2025.10.09.01.19.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 09 Oct 2025 01:19:37 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Anton Johansson , Pierrick Bouvier , Stafford Horne , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v2 07/10] target/openrisc: Use vaddr type for $pc jumps Date: Thu, 9 Oct 2025 10:18:59 +0200 Message-ID: <20251009081903.13426-8-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251009081903.13426-1-philmd@linaro.org> References: <20251009081903.13426-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=philmd@linaro.org; helo=mail-wm1-x342.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org translator_use_goto_tb() expects a vaddr type since commit b1c09220b4c ("accel/tcg: Replace target_ulong with vaddr in translator_*()"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Anton Johansson --- target/openrisc/translate.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 4ece2547614..06625367ae4 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -51,7 +51,7 @@ typedef struct DisasContext { uint32_t avr; /* If not -1, jmp_pc contains this value and so is a direct jump. */ - target_ulong jmp_pc_imm; + vaddr jmp_pc_imm; /* The temporary corresponding to register 0 for this compilation. */ TCGv R0; @@ -580,7 +580,7 @@ static bool trans_l_muldu(DisasContext *dc, arg_ab *a) static bool trans_l_j(DisasContext *dc, arg_l_j *a) { - target_ulong tmp_pc = dc->base.pc_next + a->n * 4; + vaddr tmp_pc = dc->base.pc_next + a->n * 4; tcg_gen_movi_tl(jmp_pc, tmp_pc); dc->jmp_pc_imm = tmp_pc; @@ -590,8 +590,8 @@ static bool trans_l_j(DisasContext *dc, arg_l_j *a) static bool trans_l_jal(DisasContext *dc, arg_l_jal *a) { - target_ulong tmp_pc = dc->base.pc_next + a->n * 4; - target_ulong ret_pc = dc->base.pc_next + 8; + vaddr tmp_pc = dc->base.pc_next + a->n * 4; + vaddr ret_pc = dc->base.pc_next + 8; tcg_gen_movi_tl(cpu_regs[9], ret_pc); /* Optimize jal being used to load the PC for PIC. */ @@ -605,7 +605,7 @@ static bool trans_l_jal(DisasContext *dc, arg_l_jal *a) static void do_bf(DisasContext *dc, arg_l_bf *a, TCGCond cond) { - target_ulong tmp_pc = dc->base.pc_next + a->n * 4; + vaddr tmp_pc = dc->base.pc_next + a->n * 4; TCGv t_next = tcg_constant_tl(dc->base.pc_next + 8); TCGv t_true = tcg_constant_tl(tmp_pc); @@ -1586,7 +1586,7 @@ static void openrisc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) static void openrisc_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); - target_ulong jmp_dest; + vaddr jmp_dest; /* If we have already exited the TB, nothing following has effect. */ if (dc->base.is_jmp == DISAS_NORETURN) { -- 2.51.0