From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
"Anton Johansson" <anjo@rev.ng>, "Helge Deller" <deller@gmx.de>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: [PATCH 5/9] target/hppa: Conceal MO_TE within do_load_32/64()
Date: Thu, 9 Oct 2025 12:10:35 +0200 [thread overview]
Message-ID: <20251009101040.18378-6-philmd@linaro.org> (raw)
In-Reply-To: <20251009101040.18378-1-philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
target/hppa/translate.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ee0c874342c..4680d826345 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -1599,6 +1599,7 @@ static void do_load_32(DisasContext *ctx, TCGv_i32 dest, unsigned rb,
/* Caller uses nullify_over/nullify_end. */
assert(ctx->null_cond.c == TCG_COND_NEVER);
+ mop |= MO_TE;
form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
MMU_DISABLED(ctx));
tcg_gen_qemu_ld_i32(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1617,6 +1618,7 @@ static void do_load_64(DisasContext *ctx, TCGv_i64 dest, unsigned rb,
/* Caller uses nullify_over/nullify_end. */
assert(ctx->null_cond.c == TCG_COND_NEVER);
+ mop |= MO_TE;
form_gva(ctx, &addr, &ofs, rb, rx, scale, disp, sp, modify,
MMU_DISABLED(ctx));
tcg_gen_qemu_ld_i64(dest, addr, ctx->mmu_idx, mop | UNALIGN(ctx));
@@ -1676,7 +1678,7 @@ static bool do_load(DisasContext *ctx, unsigned rt, unsigned rb,
/* Make sure if RT == RB, we see the result of the load. */
dest = tcg_temp_new_i64();
}
- do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, MO_TE | mop);
+ do_load_64(ctx, dest, rb, rx, scale, disp, sp, modify, mop);
save_gpr(ctx, rt, dest);
return nullify_end(ctx);
@@ -1691,7 +1693,7 @@ static bool do_floadw(DisasContext *ctx, unsigned rt, unsigned rb,
nullify_over(ctx);
tmp = tcg_temp_new_i32();
- do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UL);
+ do_load_32(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UL);
save_frw_i32(rt, tmp);
if (rt == 0) {
@@ -1716,7 +1718,7 @@ static bool do_floadd(DisasContext *ctx, unsigned rt, unsigned rb,
nullify_over(ctx);
tmp = tcg_temp_new_i64();
- do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_TE | MO_UQ);
+ do_load_64(ctx, tmp, rb, rx, scale, disp, sp, modify, MO_UQ);
save_frd(rt, tmp);
if (rt == 0) {
--
2.51.0
next prev parent reply other threads:[~2025-10-09 10:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-09 10:10 [PATCH 0/9] target/hppa: Remove use of MO_TE definition Philippe Mathieu-Daudé
2025-10-09 10:10 ` [PATCH 1/9] target/hppa: Use hwaddr type for HPPATLBEntry::pa Philippe Mathieu-Daudé
2025-10-09 16:54 ` Richard Henderson
2025-10-09 10:10 ` [PATCH 2/9] target/hppa: Have hppa_form_gva*() return vaddr type Philippe Mathieu-Daudé
2025-10-09 16:57 ` Richard Henderson
2025-10-09 10:10 ` [PATCH 3/9] target/hppa: Explode MO_TExx -> MO_TE | MO_xx Philippe Mathieu-Daudé
2025-10-09 16:58 ` Richard Henderson
2025-10-09 10:10 ` [PATCH 4/9] target/hppa: Conceal MO_TE within do_load() Philippe Mathieu-Daudé
2025-10-09 16:58 ` Richard Henderson
2025-10-09 10:10 ` Philippe Mathieu-Daudé [this message]
2025-10-09 16:59 ` [PATCH 5/9] target/hppa: Conceal MO_TE within do_load_32/64() Richard Henderson
2025-10-09 10:10 ` [PATCH 6/9] target/hppa: Conceal MO_TE within do_store() Philippe Mathieu-Daudé
2025-10-09 16:59 ` Richard Henderson
2025-10-09 10:10 ` [PATCH 7/9] target/hppa: Conceal MO_TE within do_store_32/64() Philippe Mathieu-Daudé
2025-10-09 16:59 ` Richard Henderson
2025-10-09 10:10 ` [PATCH 8/9] target/hppa: Introduce mo_endian() helper Philippe Mathieu-Daudé
2025-10-09 17:01 ` Richard Henderson
2025-10-09 10:10 ` [PATCH 9/9] target/hppa: Replace MO_TE -> MO_BE Philippe Mathieu-Daudé
2025-10-09 17:04 ` Richard Henderson
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