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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fab36a773sm45958475e9.0.2025.10.09.13.20.07 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 09 Oct 2025 13:20:08 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Song Gao , Bibo Mao , Pierrick Bouvier , Anton Johansson , Jiaxun Yang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 4/4] target/loongarch: Do not use target_ulong type for LDDIR level Date: Thu, 9 Oct 2025 22:19:46 +0200 Message-ID: <20251009201947.34643-5-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251009201947.34643-1-philmd@linaro.org> References: <20251009201947.34643-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The LDDIR level page table is a 5-bit immediate. Using the uint32_t type for it is sufficient. Avoid the target_ulong type. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu-mmu.h | 2 +- target/loongarch/tcg/helper.h | 2 +- target/loongarch/cpu_helper.c | 2 +- target/loongarch/tcg/tlb_helper.c | 4 ++-- target/loongarch/tcg/insn_trans/trans_privileged.c.inc | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) diff --git a/target/loongarch/cpu-mmu.h b/target/loongarch/cpu-mmu.h index 0068d22efcb..dbc69c7c0f2 100644 --- a/target/loongarch/cpu-mmu.h +++ b/target/loongarch/cpu-mmu.h @@ -34,7 +34,7 @@ TLBRet get_physical_address(CPULoongArchState *env, MMUContext *context, MMUAccessType access_type, int mmu_idx, int is_debug); void get_dir_base_width(CPULoongArchState *env, uint64_t *dir_base, - uint64_t *dir_width, target_ulong level); + uint64_t *dir_width, unsigned int level); hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); #endif /* LOONGARCH_CPU_MMU_H */ diff --git a/target/loongarch/tcg/helper.h b/target/loongarch/tcg/helper.h index db57dbfc167..7e508c5a7b9 100644 --- a/target/loongarch/tcg/helper.h +++ b/target/loongarch/tcg/helper.h @@ -129,7 +129,7 @@ DEF_HELPER_2(invtlb_all_asid, void, env, tl) DEF_HELPER_3(invtlb_page_asid, void, env, tl, tl) DEF_HELPER_3(invtlb_page_asid_or_g, void, env, tl, tl) -DEF_HELPER_4(lddir, tl, env, tl, tl, i32) +DEF_HELPER_4(lddir, tl, env, tl, i32, i32) DEF_HELPER_4(ldpte, void, env, tl, tl, i32) DEF_HELPER_1(ertn, void, env) DEF_HELPER_1(idle, void, env) diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c index 4a9db3ea4c1..867e7c88670 100644 --- a/target/loongarch/cpu_helper.c +++ b/target/loongarch/cpu_helper.c @@ -17,7 +17,7 @@ #include "tcg/tcg_loongarch.h" void get_dir_base_width(CPULoongArchState *env, uint64_t *dir_base, - uint64_t *dir_width, target_ulong level) + uint64_t *dir_width, unsigned int level) { switch (level) { case 1: diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c index 8cfce48a297..f85b68fa53d 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -595,7 +595,7 @@ bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } target_ulong helper_lddir(CPULoongArchState *env, target_ulong base, - target_ulong level, uint32_t mem_idx) + uint32_t level, uint32_t mem_idx) { CPUState *cs = env_cpu(env); target_ulong badvaddr, index, phys; @@ -603,7 +603,7 @@ target_ulong helper_lddir(CPULoongArchState *env, target_ulong base, if (unlikely((level == 0) || (level > 4))) { qemu_log_mask(LOG_GUEST_ERROR, - "Attepted LDDIR with level %"PRId64"\n", level); + "Attepted LDDIR with level %u\n", level); return base; } diff --git a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc index a407ab51b74..64e53a44606 100644 --- a/target/loongarch/tcg/insn_trans/trans_privileged.c.inc +++ b/target/loongarch/tcg/insn_trans/trans_privileged.c.inc @@ -380,7 +380,7 @@ static bool trans_lddir(DisasContext *ctx, arg_lddir *a) if (check_plv(ctx)) { return false; } - gen_helper_lddir(dest, tcg_env, src, tcg_constant_tl(a->imm), mem_idx); + gen_helper_lddir(dest, tcg_env, src, tcg_constant_i32(a->imm), mem_idx); return true; } -- 2.51.0