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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-46fb49c4027sm50904555e9.17.2025.10.10.08.51.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 10 Oct 2025 08:51:02 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Christoph Muellner , Heinrich Schuchardt , Palmer Dabbelt , Alistair Francis , Liu Zhiwei , Anton Johansson , Richard Henderson , Valentin Haudiquet , Weiwei Li , qemu-riscv@nongnu.org, Daniel Henrique Barboza , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 03/13] target/riscv: Conceal MO_TE within gen_amo() Date: Fri, 10 Oct 2025 17:50:34 +0200 Message-ID: <20251010155045.78220-4-philmd@linaro.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251010155045.78220-1-philmd@linaro.org> References: <20251010155045.78220-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org All callers of gen_amo() set the MO_TE flag. Set it once in the callee. Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/translate.c | 1 + target/riscv/insn_trans/trans_rva.c.inc | 36 ++++++++++----------- target/riscv/insn_trans/trans_rvzabha.c.inc | 18 +++++------ 3 files changed, 28 insertions(+), 27 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 9a53aecbfe9..94af9853cfe 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -1135,6 +1135,7 @@ static bool gen_amo(DisasContext *ctx, arg_atomic *a, TCGv src1, src2 = get_gpr(ctx, a->rs2, EXT_NONE); MemOp size = mop & MO_SIZE; + mop |= MO_TE; if (ctx->cfg_ptr->ext_zama16b && size >= MO_32) { mop |= MO_ATOM_WITHIN16; } else { diff --git a/target/riscv/insn_trans/trans_rva.c.inc b/target/riscv/insn_trans/trans_rva.c.inc index 10e4c55efda..e0fbfafdde4 100644 --- a/target/riscv/insn_trans/trans_rva.c.inc +++ b/target/riscv/insn_trans/trans_rva.c.inc @@ -111,55 +111,55 @@ static bool trans_sc_w(DisasContext *ctx, arg_sc_w *a) static bool trans_amoswap_w(DisasContext *ctx, arg_amoswap_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, MO_SL); } static bool trans_amoadd_w(DisasContext *ctx, arg_amoadd_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, MO_SL); } static bool trans_amoxor_w(DisasContext *ctx, arg_amoxor_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, MO_SL); } static bool trans_amoand_w(DisasContext *ctx, arg_amoand_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, MO_SL); } static bool trans_amoor_w(DisasContext *ctx, arg_amoor_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, MO_SL); } static bool trans_amomin_w(DisasContext *ctx, arg_amomin_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, MO_SL); } static bool trans_amomax_w(DisasContext *ctx, arg_amomax_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, MO_SL); } static bool trans_amominu_w(DisasContext *ctx, arg_amominu_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, MO_SL); } static bool trans_amomaxu_w(DisasContext *ctx, arg_amomaxu_w *a) { REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, MO_TE | MO_SL); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, MO_SL); } static bool trans_lr_d(DisasContext *ctx, arg_lr_d *a) @@ -180,61 +180,61 @@ static bool trans_amoswap_d(DisasContext *ctx, arg_amoswap_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, MO_UQ); } static bool trans_amoadd_d(DisasContext *ctx, arg_amoadd_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, MO_UQ); } static bool trans_amoxor_d(DisasContext *ctx, arg_amoxor_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, MO_UQ); } static bool trans_amoand_d(DisasContext *ctx, arg_amoand_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, MO_UQ); } static bool trans_amoor_d(DisasContext *ctx, arg_amoor_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, MO_UQ); } static bool trans_amomin_d(DisasContext *ctx, arg_amomin_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, MO_UQ); } static bool trans_amomax_d(DisasContext *ctx, arg_amomax_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, MO_UQ); } static bool trans_amominu_d(DisasContext *ctx, arg_amominu_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, MO_UQ); } static bool trans_amomaxu_d(DisasContext *ctx, arg_amomaxu_d *a) { REQUIRE_64BIT(ctx); REQUIRE_A_OR_ZAAMO(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, MO_TE | MO_UQ); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, MO_UQ); } diff --git a/target/riscv/insn_trans/trans_rvzabha.c.inc b/target/riscv/insn_trans/trans_rvzabha.c.inc index 25db42d24cd..c1f99b65f09 100644 --- a/target/riscv/insn_trans/trans_rvzabha.c.inc +++ b/target/riscv/insn_trans/trans_rvzabha.c.inc @@ -79,55 +79,55 @@ static bool trans_amomaxu_b(DisasContext *ctx, arg_amomaxu_b *a) static bool trans_amoswap_h(DisasContext *ctx, arg_amoswap_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_xchg_tl, MO_SW); } static bool trans_amoadd_h(DisasContext *ctx, arg_amoadd_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_add_tl, MO_SW); } static bool trans_amoxor_h(DisasContext *ctx, arg_amoxor_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_xor_tl, MO_SW); } static bool trans_amoand_h(DisasContext *ctx, arg_amoand_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_and_tl, MO_SW); } static bool trans_amoor_h(DisasContext *ctx, arg_amoor_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_or_tl, MO_SW); } static bool trans_amomin_h(DisasContext *ctx, arg_amomin_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smin_tl, MO_SW); } static bool trans_amomax_h(DisasContext *ctx, arg_amomax_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_smax_tl, MO_SW); } static bool trans_amominu_h(DisasContext *ctx, arg_amominu_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umin_tl, MO_SW); } static bool trans_amomaxu_h(DisasContext *ctx, arg_amomaxu_h *a) { REQUIRE_ZABHA(ctx); - return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, MO_TE | MO_SW); + return gen_amo(ctx, a, &tcg_gen_atomic_fetch_umax_tl, MO_SW); } static bool trans_amocas_b(DisasContext *ctx, arg_amocas_b *a) -- 2.51.0